1*e3008b7cSSrinivas Kandagatla /* SPDX-License-Identifier: GPL-2.0 */ 2*e3008b7cSSrinivas Kandagatla #ifndef __DT_BINDINGS_Q6_AUDIO_PORTS_H__ 3*e3008b7cSSrinivas Kandagatla #define __DT_BINDINGS_Q6_AUDIO_PORTS_H__ 4*e3008b7cSSrinivas Kandagatla 5*e3008b7cSSrinivas Kandagatla /* LPASS Audio virtual ports IDs */ 6*e3008b7cSSrinivas Kandagatla #define HDMI_RX 1 7*e3008b7cSSrinivas Kandagatla #define SLIMBUS_0_RX 2 8*e3008b7cSSrinivas Kandagatla #define SLIMBUS_0_TX 3 9*e3008b7cSSrinivas Kandagatla #define SLIMBUS_1_RX 4 10*e3008b7cSSrinivas Kandagatla #define SLIMBUS_1_TX 5 11*e3008b7cSSrinivas Kandagatla #define SLIMBUS_2_RX 6 12*e3008b7cSSrinivas Kandagatla #define SLIMBUS_2_TX 7 13*e3008b7cSSrinivas Kandagatla #define SLIMBUS_3_RX 8 14*e3008b7cSSrinivas Kandagatla #define SLIMBUS_3_TX 9 15*e3008b7cSSrinivas Kandagatla #define SLIMBUS_4_RX 10 16*e3008b7cSSrinivas Kandagatla #define SLIMBUS_4_TX 11 17*e3008b7cSSrinivas Kandagatla #define SLIMBUS_5_RX 12 18*e3008b7cSSrinivas Kandagatla #define SLIMBUS_5_TX 13 19*e3008b7cSSrinivas Kandagatla #define SLIMBUS_6_RX 14 20*e3008b7cSSrinivas Kandagatla #define SLIMBUS_6_TX 15 21*e3008b7cSSrinivas Kandagatla #define PRIMARY_MI2S_RX 16 22*e3008b7cSSrinivas Kandagatla #define PRIMARY_MI2S_TX 17 23*e3008b7cSSrinivas Kandagatla #define SECONDARY_MI2S_RX 18 24*e3008b7cSSrinivas Kandagatla #define SECONDARY_MI2S_TX 19 25*e3008b7cSSrinivas Kandagatla #define TERTIARY_MI2S_RX 20 26*e3008b7cSSrinivas Kandagatla #define TERTIARY_MI2S_TX 21 27*e3008b7cSSrinivas Kandagatla #define QUATERNARY_MI2S_RX 22 28*e3008b7cSSrinivas Kandagatla #define QUATERNARY_MI2S_TX 23 29*e3008b7cSSrinivas Kandagatla #define PRIMARY_TDM_RX_0 24 30*e3008b7cSSrinivas Kandagatla #define PRIMARY_TDM_TX_0 25 31*e3008b7cSSrinivas Kandagatla #define PRIMARY_TDM_RX_1 26 32*e3008b7cSSrinivas Kandagatla #define PRIMARY_TDM_TX_1 27 33*e3008b7cSSrinivas Kandagatla #define PRIMARY_TDM_RX_2 28 34*e3008b7cSSrinivas Kandagatla #define PRIMARY_TDM_TX_2 29 35*e3008b7cSSrinivas Kandagatla #define PRIMARY_TDM_RX_3 30 36*e3008b7cSSrinivas Kandagatla #define PRIMARY_TDM_TX_3 31 37*e3008b7cSSrinivas Kandagatla #define PRIMARY_TDM_RX_4 32 38*e3008b7cSSrinivas Kandagatla #define PRIMARY_TDM_TX_4 33 39*e3008b7cSSrinivas Kandagatla #define PRIMARY_TDM_RX_5 34 40*e3008b7cSSrinivas Kandagatla #define PRIMARY_TDM_TX_5 35 41*e3008b7cSSrinivas Kandagatla #define PRIMARY_TDM_RX_6 36 42*e3008b7cSSrinivas Kandagatla #define PRIMARY_TDM_TX_6 37 43*e3008b7cSSrinivas Kandagatla #define PRIMARY_TDM_RX_7 38 44*e3008b7cSSrinivas Kandagatla #define PRIMARY_TDM_TX_7 39 45*e3008b7cSSrinivas Kandagatla #define SECONDARY_TDM_RX_0 40 46*e3008b7cSSrinivas Kandagatla #define SECONDARY_TDM_TX_0 41 47*e3008b7cSSrinivas Kandagatla #define SECONDARY_TDM_RX_1 42 48*e3008b7cSSrinivas Kandagatla #define SECONDARY_TDM_TX_1 43 49*e3008b7cSSrinivas Kandagatla #define SECONDARY_TDM_RX_2 44 50*e3008b7cSSrinivas Kandagatla #define SECONDARY_TDM_TX_2 45 51*e3008b7cSSrinivas Kandagatla #define SECONDARY_TDM_RX_3 46 52*e3008b7cSSrinivas Kandagatla #define SECONDARY_TDM_TX_3 47 53*e3008b7cSSrinivas Kandagatla #define SECONDARY_TDM_RX_4 48 54*e3008b7cSSrinivas Kandagatla #define SECONDARY_TDM_TX_4 49 55*e3008b7cSSrinivas Kandagatla #define SECONDARY_TDM_RX_5 50 56*e3008b7cSSrinivas Kandagatla #define SECONDARY_TDM_TX_5 51 57*e3008b7cSSrinivas Kandagatla #define SECONDARY_TDM_RX_6 52 58*e3008b7cSSrinivas Kandagatla #define SECONDARY_TDM_TX_6 53 59*e3008b7cSSrinivas Kandagatla #define SECONDARY_TDM_RX_7 54 60*e3008b7cSSrinivas Kandagatla #define SECONDARY_TDM_TX_7 55 61*e3008b7cSSrinivas Kandagatla #define TERTIARY_TDM_RX_0 56 62*e3008b7cSSrinivas Kandagatla #define TERTIARY_TDM_TX_0 57 63*e3008b7cSSrinivas Kandagatla #define TERTIARY_TDM_RX_1 58 64*e3008b7cSSrinivas Kandagatla #define TERTIARY_TDM_TX_1 59 65*e3008b7cSSrinivas Kandagatla #define TERTIARY_TDM_RX_2 60 66*e3008b7cSSrinivas Kandagatla #define TERTIARY_TDM_TX_2 61 67*e3008b7cSSrinivas Kandagatla #define TERTIARY_TDM_RX_3 62 68*e3008b7cSSrinivas Kandagatla #define TERTIARY_TDM_TX_3 63 69*e3008b7cSSrinivas Kandagatla #define TERTIARY_TDM_RX_4 64 70*e3008b7cSSrinivas Kandagatla #define TERTIARY_TDM_TX_4 65 71*e3008b7cSSrinivas Kandagatla #define TERTIARY_TDM_RX_5 66 72*e3008b7cSSrinivas Kandagatla #define TERTIARY_TDM_TX_5 67 73*e3008b7cSSrinivas Kandagatla #define TERTIARY_TDM_RX_6 68 74*e3008b7cSSrinivas Kandagatla #define TERTIARY_TDM_TX_6 69 75*e3008b7cSSrinivas Kandagatla #define TERTIARY_TDM_RX_7 70 76*e3008b7cSSrinivas Kandagatla #define TERTIARY_TDM_TX_7 71 77*e3008b7cSSrinivas Kandagatla #define QUATERNARY_TDM_RX_0 72 78*e3008b7cSSrinivas Kandagatla #define QUATERNARY_TDM_TX_0 73 79*e3008b7cSSrinivas Kandagatla #define QUATERNARY_TDM_RX_1 74 80*e3008b7cSSrinivas Kandagatla #define QUATERNARY_TDM_TX_1 75 81*e3008b7cSSrinivas Kandagatla #define QUATERNARY_TDM_RX_2 76 82*e3008b7cSSrinivas Kandagatla #define QUATERNARY_TDM_TX_2 77 83*e3008b7cSSrinivas Kandagatla #define QUATERNARY_TDM_RX_3 78 84*e3008b7cSSrinivas Kandagatla #define QUATERNARY_TDM_TX_3 79 85*e3008b7cSSrinivas Kandagatla #define QUATERNARY_TDM_RX_4 80 86*e3008b7cSSrinivas Kandagatla #define QUATERNARY_TDM_TX_4 81 87*e3008b7cSSrinivas Kandagatla #define QUATERNARY_TDM_RX_5 82 88*e3008b7cSSrinivas Kandagatla #define QUATERNARY_TDM_TX_5 83 89*e3008b7cSSrinivas Kandagatla #define QUATERNARY_TDM_RX_6 84 90*e3008b7cSSrinivas Kandagatla #define QUATERNARY_TDM_TX_6 85 91*e3008b7cSSrinivas Kandagatla #define QUATERNARY_TDM_RX_7 86 92*e3008b7cSSrinivas Kandagatla #define QUATERNARY_TDM_TX_7 87 93*e3008b7cSSrinivas Kandagatla #define QUINARY_TDM_RX_0 88 94*e3008b7cSSrinivas Kandagatla #define QUINARY_TDM_TX_0 89 95*e3008b7cSSrinivas Kandagatla #define QUINARY_TDM_RX_1 90 96*e3008b7cSSrinivas Kandagatla #define QUINARY_TDM_TX_1 91 97*e3008b7cSSrinivas Kandagatla #define QUINARY_TDM_RX_2 92 98*e3008b7cSSrinivas Kandagatla #define QUINARY_TDM_TX_2 93 99*e3008b7cSSrinivas Kandagatla #define QUINARY_TDM_RX_3 94 100*e3008b7cSSrinivas Kandagatla #define QUINARY_TDM_TX_3 95 101*e3008b7cSSrinivas Kandagatla #define QUINARY_TDM_RX_4 96 102*e3008b7cSSrinivas Kandagatla #define QUINARY_TDM_TX_4 97 103*e3008b7cSSrinivas Kandagatla #define QUINARY_TDM_RX_5 98 104*e3008b7cSSrinivas Kandagatla #define QUINARY_TDM_TX_5 99 105*e3008b7cSSrinivas Kandagatla #define QUINARY_TDM_RX_6 100 106*e3008b7cSSrinivas Kandagatla #define QUINARY_TDM_TX_6 101 107*e3008b7cSSrinivas Kandagatla #define QUINARY_TDM_RX_7 102 108*e3008b7cSSrinivas Kandagatla #define QUINARY_TDM_TX_7 103 109*e3008b7cSSrinivas Kandagatla #define DISPLAY_PORT_RX 104 110*e3008b7cSSrinivas Kandagatla #define WSA_CODEC_DMA_RX_0 105 111*e3008b7cSSrinivas Kandagatla #define WSA_CODEC_DMA_TX_0 106 112*e3008b7cSSrinivas Kandagatla #define WSA_CODEC_DMA_RX_1 107 113*e3008b7cSSrinivas Kandagatla #define WSA_CODEC_DMA_TX_1 108 114*e3008b7cSSrinivas Kandagatla #define WSA_CODEC_DMA_TX_2 109 115*e3008b7cSSrinivas Kandagatla #define VA_CODEC_DMA_TX_0 110 116*e3008b7cSSrinivas Kandagatla #define VA_CODEC_DMA_TX_1 111 117*e3008b7cSSrinivas Kandagatla #define VA_CODEC_DMA_TX_2 112 118*e3008b7cSSrinivas Kandagatla #define RX_CODEC_DMA_RX_0 113 119*e3008b7cSSrinivas Kandagatla #define TX_CODEC_DMA_TX_0 114 120*e3008b7cSSrinivas Kandagatla #define RX_CODEC_DMA_RX_1 115 121*e3008b7cSSrinivas Kandagatla #define TX_CODEC_DMA_TX_1 116 122*e3008b7cSSrinivas Kandagatla #define RX_CODEC_DMA_RX_2 117 123*e3008b7cSSrinivas Kandagatla #define TX_CODEC_DMA_TX_2 118 124*e3008b7cSSrinivas Kandagatla #define RX_CODEC_DMA_RX_3 119 125*e3008b7cSSrinivas Kandagatla #define TX_CODEC_DMA_TX_3 120 126*e3008b7cSSrinivas Kandagatla #define RX_CODEC_DMA_RX_4 121 127*e3008b7cSSrinivas Kandagatla #define TX_CODEC_DMA_TX_4 122 128*e3008b7cSSrinivas Kandagatla #define RX_CODEC_DMA_RX_5 123 129*e3008b7cSSrinivas Kandagatla #define TX_CODEC_DMA_TX_5 124 130*e3008b7cSSrinivas Kandagatla #define RX_CODEC_DMA_RX_6 125 131*e3008b7cSSrinivas Kandagatla #define RX_CODEC_DMA_RX_7 126 132*e3008b7cSSrinivas Kandagatla #define QUINARY_MI2S_RX 127 133*e3008b7cSSrinivas Kandagatla #define QUINARY_MI2S_TX 128 134*e3008b7cSSrinivas Kandagatla 135*e3008b7cSSrinivas Kandagatla #define LPASS_CLK_ID_PRI_MI2S_IBIT 1 136*e3008b7cSSrinivas Kandagatla #define LPASS_CLK_ID_PRI_MI2S_EBIT 2 137*e3008b7cSSrinivas Kandagatla #define LPASS_CLK_ID_SEC_MI2S_IBIT 3 138*e3008b7cSSrinivas Kandagatla #define LPASS_CLK_ID_SEC_MI2S_EBIT 4 139*e3008b7cSSrinivas Kandagatla #define LPASS_CLK_ID_TER_MI2S_IBIT 5 140*e3008b7cSSrinivas Kandagatla #define LPASS_CLK_ID_TER_MI2S_EBIT 6 141*e3008b7cSSrinivas Kandagatla #define LPASS_CLK_ID_QUAD_MI2S_IBIT 7 142*e3008b7cSSrinivas Kandagatla #define LPASS_CLK_ID_QUAD_MI2S_EBIT 8 143*e3008b7cSSrinivas Kandagatla #define LPASS_CLK_ID_SPEAKER_I2S_IBIT 9 144*e3008b7cSSrinivas Kandagatla #define LPASS_CLK_ID_SPEAKER_I2S_EBIT 10 145*e3008b7cSSrinivas Kandagatla #define LPASS_CLK_ID_SPEAKER_I2S_OSR 11 146*e3008b7cSSrinivas Kandagatla #define LPASS_CLK_ID_QUI_MI2S_IBIT 12 147*e3008b7cSSrinivas Kandagatla #define LPASS_CLK_ID_QUI_MI2S_EBIT 13 148*e3008b7cSSrinivas Kandagatla #define LPASS_CLK_ID_SEN_MI2S_IBIT 14 149*e3008b7cSSrinivas Kandagatla #define LPASS_CLK_ID_SEN_MI2S_EBIT 15 150*e3008b7cSSrinivas Kandagatla #define LPASS_CLK_ID_INT0_MI2S_IBIT 16 151*e3008b7cSSrinivas Kandagatla #define LPASS_CLK_ID_INT1_MI2S_IBIT 17 152*e3008b7cSSrinivas Kandagatla #define LPASS_CLK_ID_INT2_MI2S_IBIT 18 153*e3008b7cSSrinivas Kandagatla #define LPASS_CLK_ID_INT3_MI2S_IBIT 19 154*e3008b7cSSrinivas Kandagatla #define LPASS_CLK_ID_INT4_MI2S_IBIT 20 155*e3008b7cSSrinivas Kandagatla #define LPASS_CLK_ID_INT5_MI2S_IBIT 21 156*e3008b7cSSrinivas Kandagatla #define LPASS_CLK_ID_INT6_MI2S_IBIT 22 157*e3008b7cSSrinivas Kandagatla #define LPASS_CLK_ID_QUI_MI2S_OSR 23 158*e3008b7cSSrinivas Kandagatla #define LPASS_CLK_ID_PRI_PCM_IBIT 24 159*e3008b7cSSrinivas Kandagatla #define LPASS_CLK_ID_PRI_PCM_EBIT 25 160*e3008b7cSSrinivas Kandagatla #define LPASS_CLK_ID_SEC_PCM_IBIT 26 161*e3008b7cSSrinivas Kandagatla #define LPASS_CLK_ID_SEC_PCM_EBIT 27 162*e3008b7cSSrinivas Kandagatla #define LPASS_CLK_ID_TER_PCM_IBIT 28 163*e3008b7cSSrinivas Kandagatla #define LPASS_CLK_ID_TER_PCM_EBIT 29 164*e3008b7cSSrinivas Kandagatla #define LPASS_CLK_ID_QUAD_PCM_IBIT 30 165*e3008b7cSSrinivas Kandagatla #define LPASS_CLK_ID_QUAD_PCM_EBIT 31 166*e3008b7cSSrinivas Kandagatla #define LPASS_CLK_ID_QUIN_PCM_IBIT 32 167*e3008b7cSSrinivas Kandagatla #define LPASS_CLK_ID_QUIN_PCM_EBIT 33 168*e3008b7cSSrinivas Kandagatla #define LPASS_CLK_ID_QUI_PCM_OSR 34 169*e3008b7cSSrinivas Kandagatla #define LPASS_CLK_ID_PRI_TDM_IBIT 35 170*e3008b7cSSrinivas Kandagatla #define LPASS_CLK_ID_PRI_TDM_EBIT 36 171*e3008b7cSSrinivas Kandagatla #define LPASS_CLK_ID_SEC_TDM_IBIT 37 172*e3008b7cSSrinivas Kandagatla #define LPASS_CLK_ID_SEC_TDM_EBIT 38 173*e3008b7cSSrinivas Kandagatla #define LPASS_CLK_ID_TER_TDM_IBIT 39 174*e3008b7cSSrinivas Kandagatla #define LPASS_CLK_ID_TER_TDM_EBIT 40 175*e3008b7cSSrinivas Kandagatla #define LPASS_CLK_ID_QUAD_TDM_IBIT 41 176*e3008b7cSSrinivas Kandagatla #define LPASS_CLK_ID_QUAD_TDM_EBIT 42 177*e3008b7cSSrinivas Kandagatla #define LPASS_CLK_ID_QUIN_TDM_IBIT 43 178*e3008b7cSSrinivas Kandagatla #define LPASS_CLK_ID_QUIN_TDM_EBIT 44 179*e3008b7cSSrinivas Kandagatla #define LPASS_CLK_ID_QUIN_TDM_OSR 45 180*e3008b7cSSrinivas Kandagatla #define LPASS_CLK_ID_MCLK_1 46 181*e3008b7cSSrinivas Kandagatla #define LPASS_CLK_ID_MCLK_2 47 182*e3008b7cSSrinivas Kandagatla #define LPASS_CLK_ID_MCLK_3 48 183*e3008b7cSSrinivas Kandagatla #define LPASS_CLK_ID_MCLK_4 49 184*e3008b7cSSrinivas Kandagatla #define LPASS_CLK_ID_INTERNAL_DIGITAL_CODEC_CORE 50 185*e3008b7cSSrinivas Kandagatla #define LPASS_CLK_ID_INT_MCLK_0 51 186*e3008b7cSSrinivas Kandagatla #define LPASS_CLK_ID_INT_MCLK_1 52 187*e3008b7cSSrinivas Kandagatla #define LPASS_CLK_ID_MCLK_5 53 188*e3008b7cSSrinivas Kandagatla #define LPASS_CLK_ID_WSA_CORE_MCLK 54 189*e3008b7cSSrinivas Kandagatla #define LPASS_CLK_ID_WSA_CORE_NPL_MCLK 55 190*e3008b7cSSrinivas Kandagatla #define LPASS_CLK_ID_VA_CORE_MCLK 56 191*e3008b7cSSrinivas Kandagatla #define LPASS_CLK_ID_TX_CORE_MCLK 57 192*e3008b7cSSrinivas Kandagatla #define LPASS_CLK_ID_TX_CORE_NPL_MCLK 58 193*e3008b7cSSrinivas Kandagatla #define LPASS_CLK_ID_RX_CORE_MCLK 59 194*e3008b7cSSrinivas Kandagatla #define LPASS_CLK_ID_RX_CORE_NPL_MCLK 60 195*e3008b7cSSrinivas Kandagatla #define LPASS_CLK_ID_VA_CORE_2X_MCLK 61 196*e3008b7cSSrinivas Kandagatla 197*e3008b7cSSrinivas Kandagatla #define LPASS_HW_AVTIMER_VOTE 101 198*e3008b7cSSrinivas Kandagatla #define LPASS_HW_MACRO_VOTE 102 199*e3008b7cSSrinivas Kandagatla #define LPASS_HW_DCODEC_VOTE 103 200*e3008b7cSSrinivas Kandagatla 201*e3008b7cSSrinivas Kandagatla #define Q6AFE_MAX_CLK_ID 104 202*e3008b7cSSrinivas Kandagatla 203*e3008b7cSSrinivas Kandagatla #define LPASS_CLK_ATTRIBUTE_INVALID 0x0 204*e3008b7cSSrinivas Kandagatla #define LPASS_CLK_ATTRIBUTE_COUPLE_NO 0x1 205*e3008b7cSSrinivas Kandagatla #define LPASS_CLK_ATTRIBUTE_COUPLE_DIVIDEND 0x2 206*e3008b7cSSrinivas Kandagatla #define LPASS_CLK_ATTRIBUTE_COUPLE_DIVISOR 0x3 207*e3008b7cSSrinivas Kandagatla 208*e3008b7cSSrinivas Kandagatla #endif /* __DT_BINDINGS_Q6_AUDIO_PORTS_H__ */ 209