1e3008b7cSSrinivas Kandagatla /* SPDX-License-Identifier: GPL-2.0 */ 2e3008b7cSSrinivas Kandagatla #ifndef __DT_BINDINGS_Q6_AUDIO_PORTS_H__ 3e3008b7cSSrinivas Kandagatla #define __DT_BINDINGS_Q6_AUDIO_PORTS_H__ 4e3008b7cSSrinivas Kandagatla 5e3008b7cSSrinivas Kandagatla /* LPASS Audio virtual ports IDs */ 6e3008b7cSSrinivas Kandagatla #define HDMI_RX 1 7e3008b7cSSrinivas Kandagatla #define SLIMBUS_0_RX 2 8e3008b7cSSrinivas Kandagatla #define SLIMBUS_0_TX 3 9e3008b7cSSrinivas Kandagatla #define SLIMBUS_1_RX 4 10e3008b7cSSrinivas Kandagatla #define SLIMBUS_1_TX 5 11e3008b7cSSrinivas Kandagatla #define SLIMBUS_2_RX 6 12e3008b7cSSrinivas Kandagatla #define SLIMBUS_2_TX 7 13e3008b7cSSrinivas Kandagatla #define SLIMBUS_3_RX 8 14e3008b7cSSrinivas Kandagatla #define SLIMBUS_3_TX 9 15e3008b7cSSrinivas Kandagatla #define SLIMBUS_4_RX 10 16e3008b7cSSrinivas Kandagatla #define SLIMBUS_4_TX 11 17e3008b7cSSrinivas Kandagatla #define SLIMBUS_5_RX 12 18e3008b7cSSrinivas Kandagatla #define SLIMBUS_5_TX 13 19e3008b7cSSrinivas Kandagatla #define SLIMBUS_6_RX 14 20e3008b7cSSrinivas Kandagatla #define SLIMBUS_6_TX 15 21e3008b7cSSrinivas Kandagatla #define PRIMARY_MI2S_RX 16 22e3008b7cSSrinivas Kandagatla #define PRIMARY_MI2S_TX 17 23e3008b7cSSrinivas Kandagatla #define SECONDARY_MI2S_RX 18 24e3008b7cSSrinivas Kandagatla #define SECONDARY_MI2S_TX 19 25e3008b7cSSrinivas Kandagatla #define TERTIARY_MI2S_RX 20 26e3008b7cSSrinivas Kandagatla #define TERTIARY_MI2S_TX 21 27e3008b7cSSrinivas Kandagatla #define QUATERNARY_MI2S_RX 22 28e3008b7cSSrinivas Kandagatla #define QUATERNARY_MI2S_TX 23 29e3008b7cSSrinivas Kandagatla #define PRIMARY_TDM_RX_0 24 30e3008b7cSSrinivas Kandagatla #define PRIMARY_TDM_TX_0 25 31e3008b7cSSrinivas Kandagatla #define PRIMARY_TDM_RX_1 26 32e3008b7cSSrinivas Kandagatla #define PRIMARY_TDM_TX_1 27 33e3008b7cSSrinivas Kandagatla #define PRIMARY_TDM_RX_2 28 34e3008b7cSSrinivas Kandagatla #define PRIMARY_TDM_TX_2 29 35e3008b7cSSrinivas Kandagatla #define PRIMARY_TDM_RX_3 30 36e3008b7cSSrinivas Kandagatla #define PRIMARY_TDM_TX_3 31 37e3008b7cSSrinivas Kandagatla #define PRIMARY_TDM_RX_4 32 38e3008b7cSSrinivas Kandagatla #define PRIMARY_TDM_TX_4 33 39e3008b7cSSrinivas Kandagatla #define PRIMARY_TDM_RX_5 34 40e3008b7cSSrinivas Kandagatla #define PRIMARY_TDM_TX_5 35 41e3008b7cSSrinivas Kandagatla #define PRIMARY_TDM_RX_6 36 42e3008b7cSSrinivas Kandagatla #define PRIMARY_TDM_TX_6 37 43e3008b7cSSrinivas Kandagatla #define PRIMARY_TDM_RX_7 38 44e3008b7cSSrinivas Kandagatla #define PRIMARY_TDM_TX_7 39 45e3008b7cSSrinivas Kandagatla #define SECONDARY_TDM_RX_0 40 46e3008b7cSSrinivas Kandagatla #define SECONDARY_TDM_TX_0 41 47e3008b7cSSrinivas Kandagatla #define SECONDARY_TDM_RX_1 42 48e3008b7cSSrinivas Kandagatla #define SECONDARY_TDM_TX_1 43 49e3008b7cSSrinivas Kandagatla #define SECONDARY_TDM_RX_2 44 50e3008b7cSSrinivas Kandagatla #define SECONDARY_TDM_TX_2 45 51e3008b7cSSrinivas Kandagatla #define SECONDARY_TDM_RX_3 46 52e3008b7cSSrinivas Kandagatla #define SECONDARY_TDM_TX_3 47 53e3008b7cSSrinivas Kandagatla #define SECONDARY_TDM_RX_4 48 54e3008b7cSSrinivas Kandagatla #define SECONDARY_TDM_TX_4 49 55e3008b7cSSrinivas Kandagatla #define SECONDARY_TDM_RX_5 50 56e3008b7cSSrinivas Kandagatla #define SECONDARY_TDM_TX_5 51 57e3008b7cSSrinivas Kandagatla #define SECONDARY_TDM_RX_6 52 58e3008b7cSSrinivas Kandagatla #define SECONDARY_TDM_TX_6 53 59e3008b7cSSrinivas Kandagatla #define SECONDARY_TDM_RX_7 54 60e3008b7cSSrinivas Kandagatla #define SECONDARY_TDM_TX_7 55 61e3008b7cSSrinivas Kandagatla #define TERTIARY_TDM_RX_0 56 62e3008b7cSSrinivas Kandagatla #define TERTIARY_TDM_TX_0 57 63e3008b7cSSrinivas Kandagatla #define TERTIARY_TDM_RX_1 58 64e3008b7cSSrinivas Kandagatla #define TERTIARY_TDM_TX_1 59 65e3008b7cSSrinivas Kandagatla #define TERTIARY_TDM_RX_2 60 66e3008b7cSSrinivas Kandagatla #define TERTIARY_TDM_TX_2 61 67e3008b7cSSrinivas Kandagatla #define TERTIARY_TDM_RX_3 62 68e3008b7cSSrinivas Kandagatla #define TERTIARY_TDM_TX_3 63 69e3008b7cSSrinivas Kandagatla #define TERTIARY_TDM_RX_4 64 70e3008b7cSSrinivas Kandagatla #define TERTIARY_TDM_TX_4 65 71e3008b7cSSrinivas Kandagatla #define TERTIARY_TDM_RX_5 66 72e3008b7cSSrinivas Kandagatla #define TERTIARY_TDM_TX_5 67 73e3008b7cSSrinivas Kandagatla #define TERTIARY_TDM_RX_6 68 74e3008b7cSSrinivas Kandagatla #define TERTIARY_TDM_TX_6 69 75e3008b7cSSrinivas Kandagatla #define TERTIARY_TDM_RX_7 70 76e3008b7cSSrinivas Kandagatla #define TERTIARY_TDM_TX_7 71 77e3008b7cSSrinivas Kandagatla #define QUATERNARY_TDM_RX_0 72 78e3008b7cSSrinivas Kandagatla #define QUATERNARY_TDM_TX_0 73 79e3008b7cSSrinivas Kandagatla #define QUATERNARY_TDM_RX_1 74 80e3008b7cSSrinivas Kandagatla #define QUATERNARY_TDM_TX_1 75 81e3008b7cSSrinivas Kandagatla #define QUATERNARY_TDM_RX_2 76 82e3008b7cSSrinivas Kandagatla #define QUATERNARY_TDM_TX_2 77 83e3008b7cSSrinivas Kandagatla #define QUATERNARY_TDM_RX_3 78 84e3008b7cSSrinivas Kandagatla #define QUATERNARY_TDM_TX_3 79 85e3008b7cSSrinivas Kandagatla #define QUATERNARY_TDM_RX_4 80 86e3008b7cSSrinivas Kandagatla #define QUATERNARY_TDM_TX_4 81 87e3008b7cSSrinivas Kandagatla #define QUATERNARY_TDM_RX_5 82 88e3008b7cSSrinivas Kandagatla #define QUATERNARY_TDM_TX_5 83 89e3008b7cSSrinivas Kandagatla #define QUATERNARY_TDM_RX_6 84 90e3008b7cSSrinivas Kandagatla #define QUATERNARY_TDM_TX_6 85 91e3008b7cSSrinivas Kandagatla #define QUATERNARY_TDM_RX_7 86 92e3008b7cSSrinivas Kandagatla #define QUATERNARY_TDM_TX_7 87 93e3008b7cSSrinivas Kandagatla #define QUINARY_TDM_RX_0 88 94e3008b7cSSrinivas Kandagatla #define QUINARY_TDM_TX_0 89 95e3008b7cSSrinivas Kandagatla #define QUINARY_TDM_RX_1 90 96e3008b7cSSrinivas Kandagatla #define QUINARY_TDM_TX_1 91 97e3008b7cSSrinivas Kandagatla #define QUINARY_TDM_RX_2 92 98e3008b7cSSrinivas Kandagatla #define QUINARY_TDM_TX_2 93 99e3008b7cSSrinivas Kandagatla #define QUINARY_TDM_RX_3 94 100e3008b7cSSrinivas Kandagatla #define QUINARY_TDM_TX_3 95 101e3008b7cSSrinivas Kandagatla #define QUINARY_TDM_RX_4 96 102e3008b7cSSrinivas Kandagatla #define QUINARY_TDM_TX_4 97 103e3008b7cSSrinivas Kandagatla #define QUINARY_TDM_RX_5 98 104e3008b7cSSrinivas Kandagatla #define QUINARY_TDM_TX_5 99 105e3008b7cSSrinivas Kandagatla #define QUINARY_TDM_RX_6 100 106e3008b7cSSrinivas Kandagatla #define QUINARY_TDM_TX_6 101 107e3008b7cSSrinivas Kandagatla #define QUINARY_TDM_RX_7 102 108e3008b7cSSrinivas Kandagatla #define QUINARY_TDM_TX_7 103 109e3008b7cSSrinivas Kandagatla #define DISPLAY_PORT_RX 104 110e3008b7cSSrinivas Kandagatla #define WSA_CODEC_DMA_RX_0 105 111e3008b7cSSrinivas Kandagatla #define WSA_CODEC_DMA_TX_0 106 112e3008b7cSSrinivas Kandagatla #define WSA_CODEC_DMA_RX_1 107 113e3008b7cSSrinivas Kandagatla #define WSA_CODEC_DMA_TX_1 108 114e3008b7cSSrinivas Kandagatla #define WSA_CODEC_DMA_TX_2 109 115e3008b7cSSrinivas Kandagatla #define VA_CODEC_DMA_TX_0 110 116e3008b7cSSrinivas Kandagatla #define VA_CODEC_DMA_TX_1 111 117e3008b7cSSrinivas Kandagatla #define VA_CODEC_DMA_TX_2 112 118e3008b7cSSrinivas Kandagatla #define RX_CODEC_DMA_RX_0 113 119e3008b7cSSrinivas Kandagatla #define TX_CODEC_DMA_TX_0 114 120e3008b7cSSrinivas Kandagatla #define RX_CODEC_DMA_RX_1 115 121e3008b7cSSrinivas Kandagatla #define TX_CODEC_DMA_TX_1 116 122e3008b7cSSrinivas Kandagatla #define RX_CODEC_DMA_RX_2 117 123e3008b7cSSrinivas Kandagatla #define TX_CODEC_DMA_TX_2 118 124e3008b7cSSrinivas Kandagatla #define RX_CODEC_DMA_RX_3 119 125e3008b7cSSrinivas Kandagatla #define TX_CODEC_DMA_TX_3 120 126e3008b7cSSrinivas Kandagatla #define RX_CODEC_DMA_RX_4 121 127e3008b7cSSrinivas Kandagatla #define TX_CODEC_DMA_TX_4 122 128e3008b7cSSrinivas Kandagatla #define RX_CODEC_DMA_RX_5 123 129e3008b7cSSrinivas Kandagatla #define TX_CODEC_DMA_TX_5 124 130e3008b7cSSrinivas Kandagatla #define RX_CODEC_DMA_RX_6 125 131e3008b7cSSrinivas Kandagatla #define RX_CODEC_DMA_RX_7 126 132e3008b7cSSrinivas Kandagatla #define QUINARY_MI2S_RX 127 133e3008b7cSSrinivas Kandagatla #define QUINARY_MI2S_TX 128 134*90848a25SSrinivas Kandagatla #define DISPLAY_PORT_RX_0 DISPLAY_PORT_RX 135*90848a25SSrinivas Kandagatla #define DISPLAY_PORT_RX_1 129 136*90848a25SSrinivas Kandagatla #define DISPLAY_PORT_RX_2 130 137*90848a25SSrinivas Kandagatla #define DISPLAY_PORT_RX_3 131 138*90848a25SSrinivas Kandagatla #define DISPLAY_PORT_RX_4 132 139*90848a25SSrinivas Kandagatla #define DISPLAY_PORT_RX_5 133 140*90848a25SSrinivas Kandagatla #define DISPLAY_PORT_RX_6 134 141*90848a25SSrinivas Kandagatla #define DISPLAY_PORT_RX_7 135 142e3008b7cSSrinivas Kandagatla 143e3008b7cSSrinivas Kandagatla #define LPASS_CLK_ID_PRI_MI2S_IBIT 1 144e3008b7cSSrinivas Kandagatla #define LPASS_CLK_ID_PRI_MI2S_EBIT 2 145e3008b7cSSrinivas Kandagatla #define LPASS_CLK_ID_SEC_MI2S_IBIT 3 146e3008b7cSSrinivas Kandagatla #define LPASS_CLK_ID_SEC_MI2S_EBIT 4 147e3008b7cSSrinivas Kandagatla #define LPASS_CLK_ID_TER_MI2S_IBIT 5 148e3008b7cSSrinivas Kandagatla #define LPASS_CLK_ID_TER_MI2S_EBIT 6 149e3008b7cSSrinivas Kandagatla #define LPASS_CLK_ID_QUAD_MI2S_IBIT 7 150e3008b7cSSrinivas Kandagatla #define LPASS_CLK_ID_QUAD_MI2S_EBIT 8 151e3008b7cSSrinivas Kandagatla #define LPASS_CLK_ID_SPEAKER_I2S_IBIT 9 152e3008b7cSSrinivas Kandagatla #define LPASS_CLK_ID_SPEAKER_I2S_EBIT 10 153e3008b7cSSrinivas Kandagatla #define LPASS_CLK_ID_SPEAKER_I2S_OSR 11 154e3008b7cSSrinivas Kandagatla #define LPASS_CLK_ID_QUI_MI2S_IBIT 12 155e3008b7cSSrinivas Kandagatla #define LPASS_CLK_ID_QUI_MI2S_EBIT 13 156e3008b7cSSrinivas Kandagatla #define LPASS_CLK_ID_SEN_MI2S_IBIT 14 157e3008b7cSSrinivas Kandagatla #define LPASS_CLK_ID_SEN_MI2S_EBIT 15 158e3008b7cSSrinivas Kandagatla #define LPASS_CLK_ID_INT0_MI2S_IBIT 16 159e3008b7cSSrinivas Kandagatla #define LPASS_CLK_ID_INT1_MI2S_IBIT 17 160e3008b7cSSrinivas Kandagatla #define LPASS_CLK_ID_INT2_MI2S_IBIT 18 161e3008b7cSSrinivas Kandagatla #define LPASS_CLK_ID_INT3_MI2S_IBIT 19 162e3008b7cSSrinivas Kandagatla #define LPASS_CLK_ID_INT4_MI2S_IBIT 20 163e3008b7cSSrinivas Kandagatla #define LPASS_CLK_ID_INT5_MI2S_IBIT 21 164e3008b7cSSrinivas Kandagatla #define LPASS_CLK_ID_INT6_MI2S_IBIT 22 165e3008b7cSSrinivas Kandagatla #define LPASS_CLK_ID_QUI_MI2S_OSR 23 166e3008b7cSSrinivas Kandagatla #define LPASS_CLK_ID_PRI_PCM_IBIT 24 167e3008b7cSSrinivas Kandagatla #define LPASS_CLK_ID_PRI_PCM_EBIT 25 168e3008b7cSSrinivas Kandagatla #define LPASS_CLK_ID_SEC_PCM_IBIT 26 169e3008b7cSSrinivas Kandagatla #define LPASS_CLK_ID_SEC_PCM_EBIT 27 170e3008b7cSSrinivas Kandagatla #define LPASS_CLK_ID_TER_PCM_IBIT 28 171e3008b7cSSrinivas Kandagatla #define LPASS_CLK_ID_TER_PCM_EBIT 29 172e3008b7cSSrinivas Kandagatla #define LPASS_CLK_ID_QUAD_PCM_IBIT 30 173e3008b7cSSrinivas Kandagatla #define LPASS_CLK_ID_QUAD_PCM_EBIT 31 174e3008b7cSSrinivas Kandagatla #define LPASS_CLK_ID_QUIN_PCM_IBIT 32 175e3008b7cSSrinivas Kandagatla #define LPASS_CLK_ID_QUIN_PCM_EBIT 33 176e3008b7cSSrinivas Kandagatla #define LPASS_CLK_ID_QUI_PCM_OSR 34 177e3008b7cSSrinivas Kandagatla #define LPASS_CLK_ID_PRI_TDM_IBIT 35 178e3008b7cSSrinivas Kandagatla #define LPASS_CLK_ID_PRI_TDM_EBIT 36 179e3008b7cSSrinivas Kandagatla #define LPASS_CLK_ID_SEC_TDM_IBIT 37 180e3008b7cSSrinivas Kandagatla #define LPASS_CLK_ID_SEC_TDM_EBIT 38 181e3008b7cSSrinivas Kandagatla #define LPASS_CLK_ID_TER_TDM_IBIT 39 182e3008b7cSSrinivas Kandagatla #define LPASS_CLK_ID_TER_TDM_EBIT 40 183e3008b7cSSrinivas Kandagatla #define LPASS_CLK_ID_QUAD_TDM_IBIT 41 184e3008b7cSSrinivas Kandagatla #define LPASS_CLK_ID_QUAD_TDM_EBIT 42 185e3008b7cSSrinivas Kandagatla #define LPASS_CLK_ID_QUIN_TDM_IBIT 43 186e3008b7cSSrinivas Kandagatla #define LPASS_CLK_ID_QUIN_TDM_EBIT 44 187e3008b7cSSrinivas Kandagatla #define LPASS_CLK_ID_QUIN_TDM_OSR 45 188e3008b7cSSrinivas Kandagatla #define LPASS_CLK_ID_MCLK_1 46 189e3008b7cSSrinivas Kandagatla #define LPASS_CLK_ID_MCLK_2 47 190e3008b7cSSrinivas Kandagatla #define LPASS_CLK_ID_MCLK_3 48 191e3008b7cSSrinivas Kandagatla #define LPASS_CLK_ID_MCLK_4 49 192e3008b7cSSrinivas Kandagatla #define LPASS_CLK_ID_INTERNAL_DIGITAL_CODEC_CORE 50 193e3008b7cSSrinivas Kandagatla #define LPASS_CLK_ID_INT_MCLK_0 51 194e3008b7cSSrinivas Kandagatla #define LPASS_CLK_ID_INT_MCLK_1 52 195e3008b7cSSrinivas Kandagatla #define LPASS_CLK_ID_MCLK_5 53 196e3008b7cSSrinivas Kandagatla #define LPASS_CLK_ID_WSA_CORE_MCLK 54 197e3008b7cSSrinivas Kandagatla #define LPASS_CLK_ID_WSA_CORE_NPL_MCLK 55 198e3008b7cSSrinivas Kandagatla #define LPASS_CLK_ID_VA_CORE_MCLK 56 199e3008b7cSSrinivas Kandagatla #define LPASS_CLK_ID_TX_CORE_MCLK 57 200e3008b7cSSrinivas Kandagatla #define LPASS_CLK_ID_TX_CORE_NPL_MCLK 58 201e3008b7cSSrinivas Kandagatla #define LPASS_CLK_ID_RX_CORE_MCLK 59 202e3008b7cSSrinivas Kandagatla #define LPASS_CLK_ID_RX_CORE_NPL_MCLK 60 203e3008b7cSSrinivas Kandagatla #define LPASS_CLK_ID_VA_CORE_2X_MCLK 61 204ea15d3bdSSrinivas Kandagatla /* Clock ID for MCLK for WSA2 core */ 205ea15d3bdSSrinivas Kandagatla #define LPASS_CLK_ID_WSA2_CORE_MCLK 62 206ea15d3bdSSrinivas Kandagatla /* Clock ID for NPL MCLK for WSA2 core */ 207ea15d3bdSSrinivas Kandagatla #define LPASS_CLK_ID_WSA2_CORE_2X_MCLK 63 208ea15d3bdSSrinivas Kandagatla /* Clock ID for RX Core TX MCLK */ 209ea15d3bdSSrinivas Kandagatla #define LPASS_CLK_ID_RX_CORE_TX_MCLK 64 210ea15d3bdSSrinivas Kandagatla /* Clock ID for RX CORE TX 2X MCLK */ 211ea15d3bdSSrinivas Kandagatla #define LPASS_CLK_ID_RX_CORE_TX_2X_MCLK 65 212ea15d3bdSSrinivas Kandagatla /* Clock ID for WSA core TX MCLK */ 213ea15d3bdSSrinivas Kandagatla #define LPASS_CLK_ID_WSA_CORE_TX_MCLK 66 214ea15d3bdSSrinivas Kandagatla /* Clock ID for WSA core TX 2X MCLK */ 215ea15d3bdSSrinivas Kandagatla #define LPASS_CLK_ID_WSA_CORE_TX_2X_MCLK 67 216ea15d3bdSSrinivas Kandagatla /* Clock ID for WSA2 core TX MCLK */ 217ea15d3bdSSrinivas Kandagatla #define LPASS_CLK_ID_WSA2_CORE_TX_MCLK 68 218ea15d3bdSSrinivas Kandagatla /* Clock ID for WSA2 core TX 2X MCLK */ 219ea15d3bdSSrinivas Kandagatla #define LPASS_CLK_ID_WSA2_CORE_TX_2X_MCLK 69 220ea15d3bdSSrinivas Kandagatla /* Clock ID for RX CORE MCLK2 2X MCLK */ 221ea15d3bdSSrinivas Kandagatla #define LPASS_CLK_ID_RX_CORE_MCLK2_2X_MCLK 70 222e3008b7cSSrinivas Kandagatla 223e3008b7cSSrinivas Kandagatla #define LPASS_HW_AVTIMER_VOTE 101 224e3008b7cSSrinivas Kandagatla #define LPASS_HW_MACRO_VOTE 102 225e3008b7cSSrinivas Kandagatla #define LPASS_HW_DCODEC_VOTE 103 226e3008b7cSSrinivas Kandagatla 227e3008b7cSSrinivas Kandagatla #define Q6AFE_MAX_CLK_ID 104 228e3008b7cSSrinivas Kandagatla 229e3008b7cSSrinivas Kandagatla #define LPASS_CLK_ATTRIBUTE_INVALID 0x0 230e3008b7cSSrinivas Kandagatla #define LPASS_CLK_ATTRIBUTE_COUPLE_NO 0x1 231e3008b7cSSrinivas Kandagatla #define LPASS_CLK_ATTRIBUTE_COUPLE_DIVIDEND 0x2 232e3008b7cSSrinivas Kandagatla #define LPASS_CLK_ATTRIBUTE_COUPLE_DIVISOR 0x3 233e3008b7cSSrinivas Kandagatla 234e3008b7cSSrinivas Kandagatla #endif /* __DT_BINDINGS_Q6_AUDIO_PORTS_H__ */ 235