1 /* SPDX-License-Identifier: GPL-2.0 */ 2 #ifndef __DT_FSL_IMX_AUDMUX_H 3 #define __DT_FSL_IMX_AUDMUX_H 4 5 #define MX27_AUDMUX_HPCR1_SSI0 0 6 #define MX27_AUDMUX_HPCR2_SSI1 1 7 #define MX27_AUDMUX_HPCR3_SSI_PINS_4 2 8 #define MX27_AUDMUX_PPCR1_SSI_PINS_1 3 9 #define MX27_AUDMUX_PPCR2_SSI_PINS_2 4 10 #define MX27_AUDMUX_PPCR3_SSI_PINS_3 5 11 12 #define MX31_AUDMUX_PORT1_SSI0 0 13 #define MX31_AUDMUX_PORT2_SSI1 1 14 #define MX31_AUDMUX_PORT3_SSI_PINS_3 2 15 #define MX31_AUDMUX_PORT4_SSI_PINS_4 3 16 #define MX31_AUDMUX_PORT5_SSI_PINS_5 4 17 #define MX31_AUDMUX_PORT6_SSI_PINS_6 5 18 #define MX31_AUDMUX_PORT7_SSI_PINS_7 6 19 20 #define MX51_AUDMUX_PORT1_SSI0 0 21 #define MX51_AUDMUX_PORT2_SSI1 1 22 #define MX51_AUDMUX_PORT3 2 23 #define MX51_AUDMUX_PORT4 3 24 #define MX51_AUDMUX_PORT5 4 25 #define MX51_AUDMUX_PORT6 5 26 #define MX51_AUDMUX_PORT7 6 27 28 /* Register definitions for the i.MX21/27 Digital Audio Multiplexer */ 29 #define IMX_AUDMUX_V1_PCR_INMMASK(x) ((x) & 0xff) 30 #define IMX_AUDMUX_V1_PCR_INMEN (1 << 8) 31 #define IMX_AUDMUX_V1_PCR_TXRXEN (1 << 10) 32 #define IMX_AUDMUX_V1_PCR_SYN (1 << 12) 33 #define IMX_AUDMUX_V1_PCR_RXDSEL(x) (((x) & 0x7) << 13) 34 #define IMX_AUDMUX_V1_PCR_RFCSEL(x) (((x) & 0xf) << 20) 35 #define IMX_AUDMUX_V1_PCR_RCLKDIR (1 << 24) 36 #define IMX_AUDMUX_V1_PCR_RFSDIR (1 << 25) 37 #define IMX_AUDMUX_V1_PCR_TFCSEL(x) (((x) & 0xf) << 26) 38 #define IMX_AUDMUX_V1_PCR_TCLKDIR (1 << 30) 39 #define IMX_AUDMUX_V1_PCR_TFSDIR (1 << 31) 40 41 /* Register definitions for the i.MX25/31/35/51 Digital Audio Multiplexer */ 42 #define IMX_AUDMUX_V2_PTCR_TFSDIR (1 << 31) 43 #define IMX_AUDMUX_V2_PTCR_TFSEL(x) (((x) & 0xf) << 27) 44 #define IMX_AUDMUX_V2_PTCR_TCLKDIR (1 << 26) 45 #define IMX_AUDMUX_V2_PTCR_TCSEL(x) (((x) & 0xf) << 22) 46 #define IMX_AUDMUX_V2_PTCR_RFSDIR (1 << 21) 47 #define IMX_AUDMUX_V2_PTCR_RFSEL(x) (((x) & 0xf) << 17) 48 #define IMX_AUDMUX_V2_PTCR_RCLKDIR (1 << 16) 49 #define IMX_AUDMUX_V2_PTCR_RCSEL(x) (((x) & 0xf) << 12) 50 #define IMX_AUDMUX_V2_PTCR_SYN (1 << 11) 51 52 #define IMX_AUDMUX_V2_PDCR_RXDSEL(x) (((x) & 0x7) << 13) 53 #define IMX_AUDMUX_V2_PDCR_TXRXEN (1 << 12) 54 #define IMX_AUDMUX_V2_PDCR_MODE(x) (((x) & 0x3) << 8) 55 #define IMX_AUDMUX_V2_PDCR_INMMASK(x) ((x) & 0xff) 56 57 #endif /* __DT_FSL_IMX_AUDMUX_H */ 58