1 #ifndef __DT_FSL_IMX_AUDMUX_H
2 #define __DT_FSL_IMX_AUDMUX_H
3 
4 #define MX27_AUDMUX_HPCR1_SSI0		0
5 #define MX27_AUDMUX_HPCR2_SSI1		1
6 #define MX27_AUDMUX_HPCR3_SSI_PINS_4	2
7 #define MX27_AUDMUX_PPCR1_SSI_PINS_1	3
8 #define MX27_AUDMUX_PPCR2_SSI_PINS_2	4
9 #define MX27_AUDMUX_PPCR3_SSI_PINS_3	5
10 
11 #define MX31_AUDMUX_PORT1_SSI0		0
12 #define MX31_AUDMUX_PORT2_SSI1		1
13 #define MX31_AUDMUX_PORT3_SSI_PINS_3	2
14 #define MX31_AUDMUX_PORT4_SSI_PINS_4	3
15 #define MX31_AUDMUX_PORT5_SSI_PINS_5	4
16 #define MX31_AUDMUX_PORT6_SSI_PINS_6	5
17 #define MX31_AUDMUX_PORT7_SSI_PINS_7	6
18 
19 #define MX51_AUDMUX_PORT1_SSI0		0
20 #define MX51_AUDMUX_PORT2_SSI1		1
21 #define MX51_AUDMUX_PORT3		2
22 #define MX51_AUDMUX_PORT4		3
23 #define MX51_AUDMUX_PORT5		4
24 #define MX51_AUDMUX_PORT6		5
25 #define MX51_AUDMUX_PORT7		6
26 
27 /* Register definitions for the i.MX21/27 Digital Audio Multiplexer */
28 #define IMX_AUDMUX_V1_PCR_INMMASK(x)	((x) & 0xff)
29 #define IMX_AUDMUX_V1_PCR_INMEN		(1 << 8)
30 #define IMX_AUDMUX_V1_PCR_TXRXEN	(1 << 10)
31 #define IMX_AUDMUX_V1_PCR_SYN		(1 << 12)
32 #define IMX_AUDMUX_V1_PCR_RXDSEL(x)	(((x) & 0x7) << 13)
33 #define IMX_AUDMUX_V1_PCR_RFCSEL(x)	(((x) & 0xf) << 20)
34 #define IMX_AUDMUX_V1_PCR_RCLKDIR	(1 << 24)
35 #define IMX_AUDMUX_V1_PCR_RFSDIR	(1 << 25)
36 #define IMX_AUDMUX_V1_PCR_TFCSEL(x)	(((x) & 0xf) << 26)
37 #define IMX_AUDMUX_V1_PCR_TCLKDIR	(1 << 30)
38 #define IMX_AUDMUX_V1_PCR_TFSDIR	(1 << 31)
39 
40 /* Register definitions for the i.MX25/31/35/51 Digital Audio Multiplexer */
41 #define IMX_AUDMUX_V2_PTCR_TFSDIR	(1 << 31)
42 #define IMX_AUDMUX_V2_PTCR_TFSEL(x)	(((x) & 0xf) << 27)
43 #define IMX_AUDMUX_V2_PTCR_TCLKDIR	(1 << 26)
44 #define IMX_AUDMUX_V2_PTCR_TCSEL(x)	(((x) & 0xf) << 22)
45 #define IMX_AUDMUX_V2_PTCR_RFSDIR	(1 << 21)
46 #define IMX_AUDMUX_V2_PTCR_RFSEL(x)	(((x) & 0xf) << 17)
47 #define IMX_AUDMUX_V2_PTCR_RCLKDIR	(1 << 16)
48 #define IMX_AUDMUX_V2_PTCR_RCSEL(x)	(((x) & 0xf) << 12)
49 #define IMX_AUDMUX_V2_PTCR_SYN		(1 << 11)
50 
51 #define IMX_AUDMUX_V2_PDCR_RXDSEL(x)	(((x) & 0x7) << 13)
52 #define IMX_AUDMUX_V2_PDCR_TXRXEN	(1 << 12)
53 #define IMX_AUDMUX_V2_PDCR_MODE(x)	(((x) & 0x3) << 8)
54 #define IMX_AUDMUX_V2_PDCR_INMMASK(x)	((x) & 0xff)
55 
56 #endif /* __DT_FSL_IMX_AUDMUX_H */
57