1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* Copyright (c) 2018-2020, NVIDIA CORPORATION. All rights reserved. */ 3 4 #ifndef DT_BINDINGS_RESET_TEGRA234_RESET_H 5 #define DT_BINDINGS_RESET_TEGRA234_RESET_H 6 7 /** 8 * @file 9 * @defgroup bpmp_reset_ids Reset ID's 10 * @brief Identifiers for Resets controllable by firmware 11 * @{ 12 */ 13 #define TEGRA234_RESET_I2C1 24U 14 #define TEGRA234_RESET_I2C2 29U 15 #define TEGRA234_RESET_I2C3 30U 16 #define TEGRA234_RESET_I2C4 31U 17 #define TEGRA234_RESET_I2C6 32U 18 #define TEGRA234_RESET_I2C7 33U 19 #define TEGRA234_RESET_I2C8 34U 20 #define TEGRA234_RESET_I2C9 35U 21 #define TEGRA234_RESET_PWM1 68U 22 #define TEGRA234_RESET_PWM2 69U 23 #define TEGRA234_RESET_PWM3 70U 24 #define TEGRA234_RESET_PWM4 71U 25 #define TEGRA234_RESET_PWM5 72U 26 #define TEGRA234_RESET_PWM6 73U 27 #define TEGRA234_RESET_PWM7 74U 28 #define TEGRA234_RESET_PWM8 75U 29 #define TEGRA234_RESET_SDMMC4 85U 30 #define TEGRA234_RESET_UARTA 100U 31 32 /** @} */ 33 34 #endif 35