163944891SThierry Reding /* SPDX-License-Identifier: GPL-2.0 */
263944891SThierry Reding /* Copyright (c) 2018-2020, NVIDIA CORPORATION. All rights reserved. */
363944891SThierry Reding 
463944891SThierry Reding #ifndef DT_BINDINGS_RESET_TEGRA234_RESET_H
563944891SThierry Reding #define DT_BINDINGS_RESET_TEGRA234_RESET_H
663944891SThierry Reding 
7fc5e0e37SMikko Perttunen /**
8fc5e0e37SMikko Perttunen  * @file
9fc5e0e37SMikko Perttunen  * @defgroup bpmp_reset_ids Reset ID's
10fc5e0e37SMikko Perttunen  * @brief Identifiers for Resets controllable by firmware
11fc5e0e37SMikko Perttunen  * @{
12fc5e0e37SMikko Perttunen  */
13*bb747becSAkhil R #define TEGRA234_RESET_I2C1			24U
14*bb747becSAkhil R #define TEGRA234_RESET_I2C2			29U
15*bb747becSAkhil R #define TEGRA234_RESET_I2C3			30U
16*bb747becSAkhil R #define TEGRA234_RESET_I2C4			31U
17*bb747becSAkhil R #define TEGRA234_RESET_I2C6			32U
18*bb747becSAkhil R #define TEGRA234_RESET_I2C7			33U
19*bb747becSAkhil R #define TEGRA234_RESET_I2C8			34U
20*bb747becSAkhil R #define TEGRA234_RESET_I2C9			35U
21fc5e0e37SMikko Perttunen #define TEGRA234_RESET_SDMMC4			85U
22fc5e0e37SMikko Perttunen #define TEGRA234_RESET_UARTA			100U
23fc5e0e37SMikko Perttunen 
24fc5e0e37SMikko Perttunen /** @} */
2563944891SThierry Reding 
2663944891SThierry Reding #endif
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