1efdf5aa8SPhilipp Zabel /* 2efdf5aa8SPhilipp Zabel * This header provides constants for the reset controller 3efdf5aa8SPhilipp Zabel * based peripheral powerdown requests on the STMicroelectronics 4efdf5aa8SPhilipp Zabel * STiH407 SoC. 5efdf5aa8SPhilipp Zabel */ 6efdf5aa8SPhilipp Zabel #ifndef _DT_BINDINGS_RESET_CONTROLLER_STIH407 7efdf5aa8SPhilipp Zabel #define _DT_BINDINGS_RESET_CONTROLLER_STIH407 8efdf5aa8SPhilipp Zabel 9efdf5aa8SPhilipp Zabel /* Powerdown requests control 0 */ 10efdf5aa8SPhilipp Zabel #define STIH407_EMISS_POWERDOWN 0 11efdf5aa8SPhilipp Zabel #define STIH407_NAND_POWERDOWN 1 12efdf5aa8SPhilipp Zabel 13efdf5aa8SPhilipp Zabel /* Synp GMAC PowerDown */ 14efdf5aa8SPhilipp Zabel #define STIH407_ETH1_POWERDOWN 2 15efdf5aa8SPhilipp Zabel 16efdf5aa8SPhilipp Zabel /* Powerdown requests control 1 */ 17efdf5aa8SPhilipp Zabel #define STIH407_USB3_POWERDOWN 3 18efdf5aa8SPhilipp Zabel #define STIH407_USB2_PORT1_POWERDOWN 4 19efdf5aa8SPhilipp Zabel #define STIH407_USB2_PORT0_POWERDOWN 5 20efdf5aa8SPhilipp Zabel #define STIH407_PCIE1_POWERDOWN 6 21efdf5aa8SPhilipp Zabel #define STIH407_PCIE0_POWERDOWN 7 22efdf5aa8SPhilipp Zabel #define STIH407_SATA1_POWERDOWN 8 23efdf5aa8SPhilipp Zabel #define STIH407_SATA0_POWERDOWN 9 24efdf5aa8SPhilipp Zabel 25efdf5aa8SPhilipp Zabel /* Reset defines */ 26efdf5aa8SPhilipp Zabel #define STIH407_ETH1_SOFTRESET 0 27efdf5aa8SPhilipp Zabel #define STIH407_MMC1_SOFTRESET 1 28efdf5aa8SPhilipp Zabel #define STIH407_PICOPHY_SOFTRESET 2 29efdf5aa8SPhilipp Zabel #define STIH407_IRB_SOFTRESET 3 30efdf5aa8SPhilipp Zabel #define STIH407_PCIE0_SOFTRESET 4 31efdf5aa8SPhilipp Zabel #define STIH407_PCIE1_SOFTRESET 5 32efdf5aa8SPhilipp Zabel #define STIH407_SATA0_SOFTRESET 6 33efdf5aa8SPhilipp Zabel #define STIH407_SATA1_SOFTRESET 7 34efdf5aa8SPhilipp Zabel #define STIH407_MIPHY0_SOFTRESET 8 35efdf5aa8SPhilipp Zabel #define STIH407_MIPHY1_SOFTRESET 9 36efdf5aa8SPhilipp Zabel #define STIH407_MIPHY2_SOFTRESET 10 37efdf5aa8SPhilipp Zabel #define STIH407_SATA0_PWR_SOFTRESET 11 38efdf5aa8SPhilipp Zabel #define STIH407_SATA1_PWR_SOFTRESET 12 39efdf5aa8SPhilipp Zabel #define STIH407_DELTA_SOFTRESET 13 40efdf5aa8SPhilipp Zabel #define STIH407_BLITTER_SOFTRESET 14 41efdf5aa8SPhilipp Zabel #define STIH407_HDTVOUT_SOFTRESET 15 42efdf5aa8SPhilipp Zabel #define STIH407_HDQVDP_SOFTRESET 16 43efdf5aa8SPhilipp Zabel #define STIH407_VDP_AUX_SOFTRESET 17 44efdf5aa8SPhilipp Zabel #define STIH407_COMPO_SOFTRESET 18 45efdf5aa8SPhilipp Zabel #define STIH407_HDMI_TX_PHY_SOFTRESET 19 46efdf5aa8SPhilipp Zabel #define STIH407_JPEG_DEC_SOFTRESET 20 47efdf5aa8SPhilipp Zabel #define STIH407_VP8_DEC_SOFTRESET 21 48efdf5aa8SPhilipp Zabel #define STIH407_GPU_SOFTRESET 22 49efdf5aa8SPhilipp Zabel #define STIH407_HVA_SOFTRESET 23 50efdf5aa8SPhilipp Zabel #define STIH407_ERAM_HVA_SOFTRESET 24 51efdf5aa8SPhilipp Zabel #define STIH407_LPM_SOFTRESET 25 52efdf5aa8SPhilipp Zabel #define STIH407_KEYSCAN_SOFTRESET 26 53efdf5aa8SPhilipp Zabel #define STIH407_USB2_PORT0_SOFTRESET 27 54efdf5aa8SPhilipp Zabel #define STIH407_USB2_PORT1_SOFTRESET 28 55efdf5aa8SPhilipp Zabel 56efdf5aa8SPhilipp Zabel /* Picophy reset defines */ 57efdf5aa8SPhilipp Zabel #define STIH407_PICOPHY0_RESET 0 58efdf5aa8SPhilipp Zabel #define STIH407_PICOPHY1_RESET 1 59efdf5aa8SPhilipp Zabel #define STIH407_PICOPHY2_RESET 2 60efdf5aa8SPhilipp Zabel 61efdf5aa8SPhilipp Zabel #endif /* _DT_BINDINGS_RESET_CONTROLLER_STIH407 */ 62