1 /* 2 * This file is provided under a dual BSD/GPLv2 license. When using or 3 * redistributing this file, you may do so under either license. 4 * 5 * GPL LICENSE SUMMARY 6 * 7 * Copyright (c) 2016 BayLibre, SAS. 8 * Author: Neil Armstrong <narmstrong@baylibre.com> 9 * 10 * This program is free software; you can redistribute it and/or modify 11 * it under the terms of version 2 of the GNU General Public License as 12 * published by the Free Software Foundation. 13 * 14 * This program is distributed in the hope that it will be useful, but 15 * WITHOUT ANY WARRANTY; without even the implied warranty of 16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 17 * General Public License for more details. 18 * 19 * You should have received a copy of the GNU General Public License 20 * along with this program; if not, see <http://www.gnu.org/licenses/>. 21 * The full GNU General Public License is included in this distribution 22 * in the file called COPYING. 23 * 24 * BSD LICENSE 25 * 26 * Copyright (c) 2016 BayLibre, SAS. 27 * Author: Neil Armstrong <narmstrong@baylibre.com> 28 * 29 * Redistribution and use in source and binary forms, with or without 30 * modification, are permitted provided that the following conditions 31 * are met: 32 * 33 * * Redistributions of source code must retain the above copyright 34 * notice, this list of conditions and the following disclaimer. 35 * * Redistributions in binary form must reproduce the above copyright 36 * notice, this list of conditions and the following disclaimer in 37 * the documentation and/or other materials provided with the 38 * distribution. 39 * * Neither the name of Intel Corporation nor the names of its 40 * contributors may be used to endorse or promote products derived 41 * from this software without specific prior written permission. 42 * 43 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 44 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 45 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 46 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 47 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 48 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 49 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 50 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 51 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 52 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 53 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 54 */ 55 #ifndef _DT_BINDINGS_AMLOGIC_MESON8B_RESET_H 56 #define _DT_BINDINGS_AMLOGIC_MESON8B_RESET_H 57 58 /* RESET0 */ 59 #define RESET_HIU 0 60 #define RESET_VLD 1 61 #define RESET_IQIDCT 2 62 #define RESET_MC 3 63 /* 8 */ 64 #define RESET_VIU 5 65 #define RESET_AIU 6 66 #define RESET_MCPU 7 67 #define RESET_CCPU 8 68 #define RESET_PMUX 9 69 #define RESET_VENC 10 70 #define RESET_ASSIST 11 71 #define RESET_AFIFO2 12 72 #define RESET_MDEC 13 73 #define RESET_VLD_PART 14 74 #define RESET_VIFIFO 15 75 /* 16-31 */ 76 /* RESET1 */ 77 /* 32 */ 78 #define RESET_DEMUX 33 79 #define RESET_USB_OTG 34 80 #define RESET_DDR 35 81 #define RESET_VDAC_1 36 82 #define RESET_BT656 37 83 #define RESET_AHB_SRAM 38 84 #define RESET_AHB_BRIDGE 39 85 #define RESET_PARSER 40 86 #define RESET_BLKMV 41 87 #define RESET_ISA 42 88 #define RESET_ETHERNET 43 89 #define RESET_ABUF 44 90 #define RESET_AHB_DATA 45 91 #define RESET_AHB_CNTL 46 92 #define RESET_ROM_BOOT 47 93 /* 48-63 */ 94 /* RESET2 */ 95 #define RESET_VD_RMEM 64 96 #define RESET_AUDIN 65 97 #define RESET_DBLK 66 98 #define RESET_PIC_DC 66 99 #define RESET_PSC 66 100 #define RESET_NAND 66 101 #define RESET_GE2D 70 102 #define RESET_PARSER_REG 71 103 #define RESET_PARSER_FETCH 72 104 #define RESET_PARSER_CTL 73 105 #define RESET_PARSER_TOP 74 106 #define RESET_HDMI_APB 75 107 #define RESET_AUDIO_APB 76 108 #define RESET_MEDIA_CPU 77 109 #define RESET_MALI 78 110 #define RESET_HDMI_SYSTEM_RESET 79 111 /* 80-95 */ 112 /* RESET3 */ 113 #define RESET_RING_OSCILLATOR 96 114 #define RESET_SYS_CPU_0 97 115 #define RESET_EFUSE 98 116 #define RESET_SYS_CPU_BVCI 99 117 #define RESET_AIFIFO 100 118 #define RESET_AUDIO_PLL_MODULATOR 101 119 #define RESET_AHB_BRIDGE_CNTL 102 120 #define RESET_SYS_CPU_1 103 121 #define RESET_AUDIO_DAC 104 122 #define RESET_DEMUX_TOP 105 123 #define RESET_DEMUX_DES 106 124 #define RESET_DEMUX_S2P_0 107 125 #define RESET_DEMUX_S2P_1 108 126 #define RESET_DEMUX_RESET_0 109 127 #define RESET_DEMUX_RESET_1 110 128 #define RESET_DEMUX_RESET_2 111 129 /* 112-127 */ 130 /* RESET4 */ 131 #define RESET_PL310 128 132 #define RESET_A5_APB 129 133 #define RESET_A5_AXI 130 134 #define RESET_A5 131 135 #define RESET_DVIN 132 136 #define RESET_RDMA 133 137 #define RESET_VENCI 134 138 #define RESET_VENCP 135 139 #define RESET_VENCT 136 140 #define RESET_VDAC_4 137 141 #define RESET_RTC 138 142 #define RESET_A5_DEBUG 139 143 #define RESET_VDI6 140 144 #define RESET_VENCL 141 145 /* 142-159 */ 146 /* RESET5 */ 147 #define RESET_DDR_PLL 160 148 #define RESET_MISC_PLL 161 149 #define RESET_SYS_PLL 162 150 #define RESET_HPLL_PLL 163 151 #define RESET_AUDIO_PLL 164 152 #define RESET_VID2_PLL 165 153 /* 166-191 */ 154 /* RESET6 */ 155 #define RESET_PERIPHS_GENERAL 192 156 #define RESET_PERIPHS_IR_REMOTE 193 157 #define RESET_PERIPHS_SMART_CARD 194 158 #define RESET_PERIPHS_SAR_ADC 195 159 #define RESET_PERIPHS_I2C_MASTER_0 196 160 #define RESET_PERIPHS_I2C_MASTER_1 197 161 #define RESET_PERIPHS_I2C_SLAVE 198 162 #define RESET_PERIPHS_STREAM_INTERFACE 199 163 #define RESET_PERIPHS_SDIO 200 164 #define RESET_PERIPHS_UART_0 201 165 #define RESET_PERIPHS_UART_1 202 166 #define RESET_PERIPHS_ASYNC_0 203 167 #define RESET_PERIPHS_ASYNC_1 204 168 #define RESET_PERIPHS_SPI_0 205 169 #define RESET_PERIPHS_SPI_1 206 170 #define RESET_PERIPHS_LED_PWM 207 171 /* 208-223 */ 172 /* RESET7 */ 173 /* 224-255 */ 174 175 #endif 176