18bf3560fSElaine Zhang #ifndef __DT_BINDINGS_POWER_RK3366_POWER_H__ 28bf3560fSElaine Zhang #define __DT_BINDINGS_POWER_RK3366_POWER_H__ 38bf3560fSElaine Zhang 48bf3560fSElaine Zhang /* VD_CORE */ 58bf3560fSElaine Zhang #define RK3366_PD_A53_0 0 68bf3560fSElaine Zhang #define RK3366_PD_A53_1 1 78bf3560fSElaine Zhang #define RK3366_PD_A53_2 2 88bf3560fSElaine Zhang #define RK3366_PD_A53_3 3 98bf3560fSElaine Zhang 108bf3560fSElaine Zhang /* VD_LOGIC */ 118bf3560fSElaine Zhang #define RK3366_PD_BUS 4 128bf3560fSElaine Zhang #define RK3366_PD_PERI 5 138bf3560fSElaine Zhang #define RK3366_PD_VIO 6 148bf3560fSElaine Zhang #define RK3366_PD_VIDEO 7 158bf3560fSElaine Zhang #define RK3366_PD_RKVDEC 8 168bf3560fSElaine Zhang #define RK3366_PD_WIFIBT 9 178bf3560fSElaine Zhang #define RK3366_PD_VPU 10 188bf3560fSElaine Zhang #define RK3366_PD_GPU 11 198bf3560fSElaine Zhang #define RK3366_PD_ALIVE 12 208bf3560fSElaine Zhang 218bf3560fSElaine Zhang /* VD_PMU */ 228bf3560fSElaine Zhang #define RK3366_PD_PMU 13 238bf3560fSElaine Zhang 248bf3560fSElaine Zhang #endif 25