17755b40dSSergei Shtylyov /* SPDX-License-Identifier: GPL-2.0
27755b40dSSergei Shtylyov  *
37755b40dSSergei Shtylyov  * Copyright (C) 2018 Renesas Electronics Corp.
47755b40dSSergei Shtylyov  * Copyright (C) 2018 Cogent Embedded, Inc.
57755b40dSSergei Shtylyov  */
67755b40dSSergei Shtylyov #ifndef __DT_BINDINGS_POWER_R8A77980_SYSC_H__
77755b40dSSergei Shtylyov #define __DT_BINDINGS_POWER_R8A77980_SYSC_H__
87755b40dSSergei Shtylyov 
97755b40dSSergei Shtylyov /*
107755b40dSSergei Shtylyov  * These power domain indices match the numbers of the interrupt bits
117755b40dSSergei Shtylyov  * representing the power areas in the various Interrupt Registers
127755b40dSSergei Shtylyov  * (e.g. SYSCISR, Interrupt Status Register)
137755b40dSSergei Shtylyov  */
147755b40dSSergei Shtylyov 
157755b40dSSergei Shtylyov #define R8A77980_PD_A2SC2		0
167755b40dSSergei Shtylyov #define R8A77980_PD_A2SC3		1
177755b40dSSergei Shtylyov #define R8A77980_PD_A2SC4		2
1897473bc8SGeert Uytterhoeven #define R8A77980_PD_A2DP0		3
1997473bc8SGeert Uytterhoeven #define R8A77980_PD_A2DP1		4
207755b40dSSergei Shtylyov #define R8A77980_PD_CA53_CPU0		5
217755b40dSSergei Shtylyov #define R8A77980_PD_CA53_CPU1		6
227755b40dSSergei Shtylyov #define R8A77980_PD_CA53_CPU2		7
237755b40dSSergei Shtylyov #define R8A77980_PD_CA53_CPU3		8
247755b40dSSergei Shtylyov #define R8A77980_PD_A2CN		10
25160bfa7cSGeert Uytterhoeven #define R8A77980_PD_A3VIP0		11
267755b40dSSergei Shtylyov #define R8A77980_PD_A2IR5		12
277755b40dSSergei Shtylyov #define R8A77980_PD_CR7			13
287755b40dSSergei Shtylyov #define R8A77980_PD_A2IR4		15
297755b40dSSergei Shtylyov #define R8A77980_PD_CA53_SCU		21
307755b40dSSergei Shtylyov #define R8A77980_PD_A2IR0		23
317755b40dSSergei Shtylyov #define R8A77980_PD_A3IR		24
327755b40dSSergei Shtylyov #define R8A77980_PD_A3VIP1		25
337755b40dSSergei Shtylyov #define R8A77980_PD_A3VIP2		26
347755b40dSSergei Shtylyov #define R8A77980_PD_A2IR1		27
357755b40dSSergei Shtylyov #define R8A77980_PD_A2IR2		28
367755b40dSSergei Shtylyov #define R8A77980_PD_A2IR3		29
377755b40dSSergei Shtylyov #define R8A77980_PD_A2SC0		30
387755b40dSSergei Shtylyov #define R8A77980_PD_A2SC1		31
397755b40dSSergei Shtylyov 
407755b40dSSergei Shtylyov /* Always-on power area */
417755b40dSSergei Shtylyov #define R8A77980_PD_ALWAYS_ON		32
427755b40dSSergei Shtylyov 
437755b40dSSergei Shtylyov #endif /* __DT_BINDINGS_POWER_R8A77980_SYSC_H__ */
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