1a527709bSJacopo Mondi /* SPDX-License-Identifier: GPL-2.0 */ 2a527709bSJacopo Mondi /* 3a527709bSJacopo Mondi * Copyright (C) 2018 Jacopo Mondi <jacopo+renesas@jmondi.org> 4a527709bSJacopo Mondi * Copyright (C) 2016 Glider bvba 5a527709bSJacopo Mondi */ 6a527709bSJacopo Mondi 7a527709bSJacopo Mondi #ifndef __DT_BINDINGS_POWER_R8A77965_SYSC_H__ 8a527709bSJacopo Mondi #define __DT_BINDINGS_POWER_R8A77965_SYSC_H__ 9a527709bSJacopo Mondi 10a527709bSJacopo Mondi /* 11a527709bSJacopo Mondi * These power domain indices match the numbers of the interrupt bits 12a527709bSJacopo Mondi * representing the power areas in the various Interrupt Registers 13a527709bSJacopo Mondi * (e.g. SYSCISR, Interrupt Status Register) 14a527709bSJacopo Mondi */ 15a527709bSJacopo Mondi 16a527709bSJacopo Mondi #define R8A77965_PD_CA57_CPU0 0 17a527709bSJacopo Mondi #define R8A77965_PD_CA57_CPU1 1 18a527709bSJacopo Mondi #define R8A77965_PD_A3VP 9 19a527709bSJacopo Mondi #define R8A77965_PD_CA57_SCU 12 20a527709bSJacopo Mondi #define R8A77965_PD_CR7 13 21a527709bSJacopo Mondi #define R8A77965_PD_A3VC 14 22a527709bSJacopo Mondi #define R8A77965_PD_3DG_A 17 23a527709bSJacopo Mondi #define R8A77965_PD_3DG_B 18 24a527709bSJacopo Mondi #define R8A77965_PD_A2VC1 26 25a527709bSJacopo Mondi 26a527709bSJacopo Mondi /* Always-on power area */ 27a527709bSJacopo Mondi #define R8A77965_PD_ALWAYS_ON 32 28a527709bSJacopo Mondi 29a527709bSJacopo Mondi #endif /* __DT_BINDINGS_POWER_R8A77965_SYSC_H__ */ 30