1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* Copyright (c) 2018, The Linux Foundation. All rights reserved. */ 3 4 #ifndef _DT_BINDINGS_POWER_QCOM_RPMPD_H 5 #define _DT_BINDINGS_POWER_QCOM_RPMPD_H 6 7 /* SDM845 Power Domain Indexes */ 8 #define SDM845_EBI 0 9 #define SDM845_MX 1 10 #define SDM845_MX_AO 2 11 #define SDM845_CX 3 12 #define SDM845_CX_AO 4 13 #define SDM845_LMX 5 14 #define SDM845_LCX 6 15 #define SDM845_GFX 7 16 #define SDM845_MSS 8 17 18 /* SDX55 Power Domain Indexes */ 19 #define SDX55_MSS 0 20 #define SDX55_MX 1 21 #define SDX55_CX 2 22 23 /* SM8150 Power Domain Indexes */ 24 #define SM8150_MSS 0 25 #define SM8150_EBI 1 26 #define SM8150_LMX 2 27 #define SM8150_LCX 3 28 #define SM8150_GFX 4 29 #define SM8150_MX 5 30 #define SM8150_MX_AO 6 31 #define SM8150_CX 7 32 #define SM8150_CX_AO 8 33 #define SM8150_MMCX 9 34 #define SM8150_MMCX_AO 10 35 36 /* SM8250 Power Domain Indexes */ 37 #define SM8250_CX 0 38 #define SM8250_CX_AO 1 39 #define SM8250_EBI 2 40 #define SM8250_GFX 3 41 #define SM8250_LCX 4 42 #define SM8250_LMX 5 43 #define SM8250_MMCX 6 44 #define SM8250_MMCX_AO 7 45 #define SM8250_MX 8 46 #define SM8250_MX_AO 9 47 48 /* SM8350 Power Domain Indexes */ 49 #define SM8350_CX 0 50 #define SM8350_CX_AO 1 51 #define SM8350_EBI 2 52 #define SM8350_GFX 3 53 #define SM8350_LCX 4 54 #define SM8350_LMX 5 55 #define SM8350_MMCX 6 56 #define SM8350_MMCX_AO 7 57 #define SM8350_MX 8 58 #define SM8350_MX_AO 9 59 #define SM8350_MXC 10 60 #define SM8350_MXC_AO 11 61 #define SM8350_MSS 12 62 63 /* SC7180 Power Domain Indexes */ 64 #define SC7180_CX 0 65 #define SC7180_CX_AO 1 66 #define SC7180_GFX 2 67 #define SC7180_MX 3 68 #define SC7180_MX_AO 4 69 #define SC7180_LMX 5 70 #define SC7180_LCX 6 71 #define SC7180_MSS 7 72 73 /* SDM845 Power Domain performance levels */ 74 #define RPMH_REGULATOR_LEVEL_RETENTION 16 75 #define RPMH_REGULATOR_LEVEL_MIN_SVS 48 76 #define RPMH_REGULATOR_LEVEL_LOW_SVS 64 77 #define RPMH_REGULATOR_LEVEL_SVS 128 78 #define RPMH_REGULATOR_LEVEL_SVS_L0 144 79 #define RPMH_REGULATOR_LEVEL_SVS_L1 192 80 #define RPMH_REGULATOR_LEVEL_SVS_L2 224 81 #define RPMH_REGULATOR_LEVEL_NOM 256 82 #define RPMH_REGULATOR_LEVEL_NOM_L1 320 83 #define RPMH_REGULATOR_LEVEL_NOM_L2 336 84 #define RPMH_REGULATOR_LEVEL_TURBO 384 85 #define RPMH_REGULATOR_LEVEL_TURBO_L1 416 86 87 /* MSM8939 Power Domains */ 88 #define MSM8939_VDDMDCX 0 89 #define MSM8939_VDDMDCX_AO 1 90 #define MSM8939_VDDMDCX_VFC 2 91 #define MSM8939_VDDCX 3 92 #define MSM8939_VDDCX_AO 4 93 #define MSM8939_VDDCX_VFC 5 94 #define MSM8939_VDDMX 6 95 #define MSM8939_VDDMX_AO 7 96 97 /* MSM8916 Power Domain Indexes */ 98 #define MSM8916_VDDCX 0 99 #define MSM8916_VDDCX_AO 1 100 #define MSM8916_VDDCX_VFC 2 101 #define MSM8916_VDDMX 3 102 #define MSM8916_VDDMX_AO 4 103 104 /* MSM8976 Power Domain Indexes */ 105 #define MSM8976_VDDCX 0 106 #define MSM8976_VDDCX_AO 1 107 #define MSM8976_VDDCX_VFL 2 108 #define MSM8976_VDDMX 3 109 #define MSM8976_VDDMX_AO 4 110 #define MSM8976_VDDMX_VFL 5 111 112 /* MSM8994 Power Domain Indexes */ 113 #define MSM8994_VDDCX 0 114 #define MSM8994_VDDCX_AO 1 115 #define MSM8994_VDDCX_VFC 2 116 #define MSM8994_VDDMX 3 117 #define MSM8994_VDDMX_AO 4 118 #define MSM8994_VDDGFX 5 119 #define MSM8994_VDDGFX_VFC 6 120 121 /* MSM8996 Power Domain Indexes */ 122 #define MSM8996_VDDCX 0 123 #define MSM8996_VDDCX_AO 1 124 #define MSM8996_VDDCX_VFC 2 125 #define MSM8996_VDDMX 3 126 #define MSM8996_VDDMX_AO 4 127 #define MSM8996_VDDSSCX 5 128 #define MSM8996_VDDSSCX_VFC 6 129 130 /* MSM8998 Power Domain Indexes */ 131 #define MSM8998_VDDCX 0 132 #define MSM8998_VDDCX_AO 1 133 #define MSM8998_VDDCX_VFL 2 134 #define MSM8998_VDDMX 3 135 #define MSM8998_VDDMX_AO 4 136 #define MSM8998_VDDMX_VFL 5 137 #define MSM8998_SSCCX 6 138 #define MSM8998_SSCCX_VFL 7 139 #define MSM8998_SSCMX 8 140 #define MSM8998_SSCMX_VFL 9 141 142 /* QCS404 Power Domains */ 143 #define QCS404_VDDMX 0 144 #define QCS404_VDDMX_AO 1 145 #define QCS404_VDDMX_VFL 2 146 #define QCS404_LPICX 3 147 #define QCS404_LPICX_VFL 4 148 #define QCS404_LPIMX 5 149 #define QCS404_LPIMX_VFL 6 150 151 /* SDM660 Power Domains */ 152 #define SDM660_VDDCX 0 153 #define SDM660_VDDCX_AO 1 154 #define SDM660_VDDCX_VFL 2 155 #define SDM660_VDDMX 3 156 #define SDM660_VDDMX_AO 4 157 #define SDM660_VDDMX_VFL 5 158 #define SDM660_SSCCX 6 159 #define SDM660_SSCCX_VFL 7 160 #define SDM660_SSCMX 8 161 #define SDM660_SSCMX_VFL 9 162 163 /* RPM SMD Power Domain performance levels */ 164 #define RPM_SMD_LEVEL_RETENTION 16 165 #define RPM_SMD_LEVEL_RETENTION_PLUS 32 166 #define RPM_SMD_LEVEL_MIN_SVS 48 167 #define RPM_SMD_LEVEL_LOW_SVS 64 168 #define RPM_SMD_LEVEL_SVS 128 169 #define RPM_SMD_LEVEL_SVS_PLUS 192 170 #define RPM_SMD_LEVEL_NOM 256 171 #define RPM_SMD_LEVEL_NOM_PLUS 320 172 #define RPM_SMD_LEVEL_TURBO 384 173 #define RPM_SMD_LEVEL_TURBO_NO_CPR 416 174 #define RPM_SMD_LEVEL_TURBO_HIGH 448 175 #define RPM_SMD_LEVEL_BINNING 512 176 177 #endif 178