1 /* SPDX-License-Identifier: GPL-2.0 */
2 /* Copyright (c) 2018, The Linux Foundation. All rights reserved. */
3 
4 #ifndef _DT_BINDINGS_POWER_QCOM_RPMPD_H
5 #define _DT_BINDINGS_POWER_QCOM_RPMPD_H
6 
7 /* SDM845 Power Domain Indexes */
8 #define SDM845_EBI	0
9 #define SDM845_MX	1
10 #define SDM845_MX_AO	2
11 #define SDM845_CX	3
12 #define SDM845_CX_AO	4
13 #define SDM845_LMX	5
14 #define SDM845_LCX	6
15 #define SDM845_GFX	7
16 #define SDM845_MSS	8
17 
18 /* SDX55 Power Domain Indexes */
19 #define SDX55_MSS	0
20 #define SDX55_MX	1
21 #define SDX55_CX	2
22 
23 /* SM8150 Power Domain Indexes */
24 #define SM8150_MSS	0
25 #define SM8150_EBI	1
26 #define SM8150_LMX	2
27 #define SM8150_LCX	3
28 #define SM8150_GFX	4
29 #define SM8150_MX	5
30 #define SM8150_MX_AO	6
31 #define SM8150_CX	7
32 #define SM8150_CX_AO	8
33 #define SM8150_MMCX	9
34 #define SM8150_MMCX_AO	10
35 
36 /* SM8250 Power Domain Indexes */
37 #define SM8250_CX	0
38 #define SM8250_CX_AO	1
39 #define SM8250_EBI	2
40 #define SM8250_GFX	3
41 #define SM8250_LCX	4
42 #define SM8250_LMX	5
43 #define SM8250_MMCX	6
44 #define SM8250_MMCX_AO	7
45 #define SM8250_MX	8
46 #define SM8250_MX_AO	9
47 
48 /* SC7180 Power Domain Indexes */
49 #define SC7180_CX	0
50 #define SC7180_CX_AO	1
51 #define SC7180_GFX	2
52 #define SC7180_MX	3
53 #define SC7180_MX_AO	4
54 #define SC7180_LMX	5
55 #define SC7180_LCX	6
56 #define SC7180_MSS	7
57 
58 /* SDM845 Power Domain performance levels */
59 #define RPMH_REGULATOR_LEVEL_RETENTION	16
60 #define RPMH_REGULATOR_LEVEL_MIN_SVS	48
61 #define RPMH_REGULATOR_LEVEL_LOW_SVS	64
62 #define RPMH_REGULATOR_LEVEL_SVS	128
63 #define RPMH_REGULATOR_LEVEL_SVS_L0	144
64 #define RPMH_REGULATOR_LEVEL_SVS_L1	192
65 #define RPMH_REGULATOR_LEVEL_SVS_L2	224
66 #define RPMH_REGULATOR_LEVEL_NOM	256
67 #define RPMH_REGULATOR_LEVEL_NOM_L1	320
68 #define RPMH_REGULATOR_LEVEL_NOM_L2	336
69 #define RPMH_REGULATOR_LEVEL_TURBO	384
70 #define RPMH_REGULATOR_LEVEL_TURBO_L1	416
71 
72 /* MSM8939 Power Domains */
73 #define MSM8939_VDDMDCX		0
74 #define MSM8939_VDDMDCX_AO	1
75 #define MSM8939_VDDMDCX_VFC	2
76 #define MSM8939_VDDCX		3
77 #define MSM8939_VDDCX_AO	4
78 #define MSM8939_VDDCX_VFC	5
79 #define MSM8939_VDDMX		6
80 #define MSM8939_VDDMX_AO	7
81 
82 /* MSM8916 Power Domain Indexes */
83 #define MSM8916_VDDCX		0
84 #define MSM8916_VDDCX_AO	1
85 #define MSM8916_VDDCX_VFC	2
86 #define MSM8916_VDDMX		3
87 #define MSM8916_VDDMX_AO	4
88 
89 /* MSM8976 Power Domain Indexes */
90 #define MSM8976_VDDCX		0
91 #define MSM8976_VDDCX_AO	1
92 #define MSM8976_VDDCX_VFL	2
93 #define MSM8976_VDDMX		3
94 #define MSM8976_VDDMX_AO	4
95 #define MSM8976_VDDMX_VFL	5
96 
97 /* MSM8994 Power Domain Indexes */
98 #define MSM8994_VDDCX		0
99 #define MSM8994_VDDCX_AO	1
100 #define MSM8994_VDDCX_VFC	2
101 #define MSM8994_VDDMX		3
102 #define MSM8994_VDDMX_AO	4
103 #define MSM8994_VDDGFX		5
104 #define MSM8994_VDDGFX_VFC	6
105 
106 /* MSM8996 Power Domain Indexes */
107 #define MSM8996_VDDCX		0
108 #define MSM8996_VDDCX_AO	1
109 #define MSM8996_VDDCX_VFC	2
110 #define MSM8996_VDDMX		3
111 #define MSM8996_VDDMX_AO	4
112 #define MSM8996_VDDSSCX		5
113 #define MSM8996_VDDSSCX_VFC	6
114 
115 /* MSM8998 Power Domain Indexes */
116 #define MSM8998_VDDCX		0
117 #define MSM8998_VDDCX_AO	1
118 #define MSM8998_VDDCX_VFL	2
119 #define MSM8998_VDDMX		3
120 #define MSM8998_VDDMX_AO	4
121 #define MSM8998_VDDMX_VFL	5
122 #define MSM8998_SSCCX		6
123 #define MSM8998_SSCCX_VFL	7
124 #define MSM8998_SSCMX		8
125 #define MSM8998_SSCMX_VFL	9
126 
127 /* QCS404 Power Domains */
128 #define QCS404_VDDMX		0
129 #define QCS404_VDDMX_AO		1
130 #define QCS404_VDDMX_VFL	2
131 #define QCS404_LPICX		3
132 #define QCS404_LPICX_VFL	4
133 #define QCS404_LPIMX		5
134 #define QCS404_LPIMX_VFL	6
135 
136 /* SDM660 Power Domains */
137 #define SDM660_VDDCX		0
138 #define SDM660_VDDCX_AO		1
139 #define SDM660_VDDCX_VFL	2
140 #define SDM660_VDDMX		3
141 #define SDM660_VDDMX_AO		4
142 #define SDM660_VDDMX_VFL	5
143 #define SDM660_SSCCX		6
144 #define SDM660_SSCCX_VFL	7
145 #define SDM660_SSCMX		8
146 #define SDM660_SSCMX_VFL	9
147 
148 /* RPM SMD Power Domain performance levels */
149 #define RPM_SMD_LEVEL_RETENTION       16
150 #define RPM_SMD_LEVEL_RETENTION_PLUS  32
151 #define RPM_SMD_LEVEL_MIN_SVS         48
152 #define RPM_SMD_LEVEL_LOW_SVS         64
153 #define RPM_SMD_LEVEL_SVS             128
154 #define RPM_SMD_LEVEL_SVS_PLUS        192
155 #define RPM_SMD_LEVEL_NOM             256
156 #define RPM_SMD_LEVEL_NOM_PLUS        320
157 #define RPM_SMD_LEVEL_TURBO           384
158 #define RPM_SMD_LEVEL_TURBO_NO_CPR    416
159 #define RPM_SMD_LEVEL_TURBO_HIGH      448
160 #define RPM_SMD_LEVEL_BINNING         512
161 
162 #endif
163