1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* Copyright (c) 2018, The Linux Foundation. All rights reserved. */ 3 4 #ifndef _DT_BINDINGS_POWER_QCOM_RPMPD_H 5 #define _DT_BINDINGS_POWER_QCOM_RPMPD_H 6 7 /* SDM845 Power Domain Indexes */ 8 #define SDM845_EBI 0 9 #define SDM845_MX 1 10 #define SDM845_MX_AO 2 11 #define SDM845_CX 3 12 #define SDM845_CX_AO 4 13 #define SDM845_LMX 5 14 #define SDM845_LCX 6 15 #define SDM845_GFX 7 16 #define SDM845_MSS 8 17 18 /* SM8150 Power Domain Indexes */ 19 #define SM8150_MSS 0 20 #define SM8150_EBI 1 21 #define SM8150_LMX 2 22 #define SM8150_LCX 3 23 #define SM8150_GFX 4 24 #define SM8150_MX 5 25 #define SM8150_MX_AO 6 26 #define SM8150_CX 7 27 #define SM8150_CX_AO 8 28 #define SM8150_MMCX 9 29 #define SM8150_MMCX_AO 10 30 31 /* SC7180 Power Domain Indexes */ 32 #define SC7180_CX 0 33 #define SC7180_CX_AO 1 34 #define SC7180_GFX 2 35 #define SC7180_MX 3 36 #define SC7180_MX_AO 4 37 #define SC7180_LMX 5 38 #define SC7180_LCX 6 39 #define SC7180_MSS 7 40 41 /* SDM845 Power Domain performance levels */ 42 #define RPMH_REGULATOR_LEVEL_RETENTION 16 43 #define RPMH_REGULATOR_LEVEL_MIN_SVS 48 44 #define RPMH_REGULATOR_LEVEL_LOW_SVS 64 45 #define RPMH_REGULATOR_LEVEL_SVS 128 46 #define RPMH_REGULATOR_LEVEL_SVS_L1 192 47 #define RPMH_REGULATOR_LEVEL_SVS_L2 224 48 #define RPMH_REGULATOR_LEVEL_NOM 256 49 #define RPMH_REGULATOR_LEVEL_NOM_L1 320 50 #define RPMH_REGULATOR_LEVEL_NOM_L2 336 51 #define RPMH_REGULATOR_LEVEL_TURBO 384 52 #define RPMH_REGULATOR_LEVEL_TURBO_L1 416 53 54 /* MSM8976 Power Domain Indexes */ 55 #define MSM8976_VDDCX 0 56 #define MSM8976_VDDCX_AO 1 57 #define MSM8976_VDDCX_VFL 2 58 #define MSM8976_VDDMX 3 59 #define MSM8976_VDDMX_AO 4 60 #define MSM8976_VDDMX_VFL 5 61 62 /* MSM8996 Power Domain Indexes */ 63 #define MSM8996_VDDCX 0 64 #define MSM8996_VDDCX_AO 1 65 #define MSM8996_VDDCX_VFC 2 66 #define MSM8996_VDDMX 3 67 #define MSM8996_VDDMX_AO 4 68 #define MSM8996_VDDSSCX 5 69 #define MSM8996_VDDSSCX_VFC 6 70 71 /* MSM8998 Power Domain Indexes */ 72 #define MSM8998_VDDCX 0 73 #define MSM8998_VDDCX_AO 1 74 #define MSM8998_VDDCX_VFL 2 75 #define MSM8998_VDDMX 3 76 #define MSM8998_VDDMX_AO 4 77 #define MSM8998_VDDMX_VFL 5 78 #define MSM8998_SSCCX 6 79 #define MSM8998_SSCCX_VFL 7 80 #define MSM8998_SSCMX 8 81 #define MSM8998_SSCMX_VFL 9 82 83 /* QCS404 Power Domains */ 84 #define QCS404_VDDMX 0 85 #define QCS404_VDDMX_AO 1 86 #define QCS404_VDDMX_VFL 2 87 #define QCS404_LPICX 3 88 #define QCS404_LPICX_VFL 4 89 #define QCS404_LPIMX 5 90 #define QCS404_LPIMX_VFL 6 91 92 /* RPM SMD Power Domain performance levels */ 93 #define RPM_SMD_LEVEL_RETENTION 16 94 #define RPM_SMD_LEVEL_RETENTION_PLUS 32 95 #define RPM_SMD_LEVEL_MIN_SVS 48 96 #define RPM_SMD_LEVEL_LOW_SVS 64 97 #define RPM_SMD_LEVEL_SVS 128 98 #define RPM_SMD_LEVEL_SVS_PLUS 192 99 #define RPM_SMD_LEVEL_NOM 256 100 #define RPM_SMD_LEVEL_NOM_PLUS 320 101 #define RPM_SMD_LEVEL_TURBO 384 102 #define RPM_SMD_LEVEL_TURBO_NO_CPR 416 103 #define RPM_SMD_LEVEL_TURBO_HIGH 448 104 #define RPM_SMD_LEVEL_BINNING 512 105 106 #endif 107