1 /* SPDX-License-Identifier: GPL-2.0 */
2 /* Copyright (c) 2018, The Linux Foundation. All rights reserved. */
3 
4 #ifndef _DT_BINDINGS_POWER_QCOM_RPMPD_H
5 #define _DT_BINDINGS_POWER_QCOM_RPMPD_H
6 
7 /* SDM845 Power Domain Indexes */
8 #define SDM845_EBI	0
9 #define SDM845_MX	1
10 #define SDM845_MX_AO	2
11 #define SDM845_CX	3
12 #define SDM845_CX_AO	4
13 #define SDM845_LMX	5
14 #define SDM845_LCX	6
15 #define SDM845_GFX	7
16 #define SDM845_MSS	8
17 
18 /* SDX55 Power Domain Indexes */
19 #define SDX55_MSS	0
20 #define SDX55_MX	1
21 #define SDX55_CX	2
22 
23 /* SM6350 Power Domain Indexes */
24 #define SM6350_CX	0
25 #define SM6350_GFX	1
26 #define SM6350_LCX	2
27 #define SM6350_LMX	3
28 #define SM6350_MSS	4
29 #define SM6350_MX	5
30 
31 /* SM8150 Power Domain Indexes */
32 #define SM8150_MSS	0
33 #define SM8150_EBI	1
34 #define SM8150_LMX	2
35 #define SM8150_LCX	3
36 #define SM8150_GFX	4
37 #define SM8150_MX	5
38 #define SM8150_MX_AO	6
39 #define SM8150_CX	7
40 #define SM8150_CX_AO	8
41 #define SM8150_MMCX	9
42 #define SM8150_MMCX_AO	10
43 
44 /* SM8250 Power Domain Indexes */
45 #define SM8250_CX	0
46 #define SM8250_CX_AO	1
47 #define SM8250_EBI	2
48 #define SM8250_GFX	3
49 #define SM8250_LCX	4
50 #define SM8250_LMX	5
51 #define SM8250_MMCX	6
52 #define SM8250_MMCX_AO	7
53 #define SM8250_MX	8
54 #define SM8250_MX_AO	9
55 
56 /* SM8350 Power Domain Indexes */
57 #define SM8350_CX	0
58 #define SM8350_CX_AO	1
59 #define SM8350_EBI	2
60 #define SM8350_GFX	3
61 #define SM8350_LCX	4
62 #define SM8350_LMX	5
63 #define SM8350_MMCX	6
64 #define SM8350_MMCX_AO	7
65 #define SM8350_MX	8
66 #define SM8350_MX_AO	9
67 #define SM8350_MXC	10
68 #define SM8350_MXC_AO	11
69 #define SM8350_MSS	12
70 
71 /* SC7180 Power Domain Indexes */
72 #define SC7180_CX	0
73 #define SC7180_CX_AO	1
74 #define SC7180_GFX	2
75 #define SC7180_MX	3
76 #define SC7180_MX_AO	4
77 #define SC7180_LMX	5
78 #define SC7180_LCX	6
79 #define SC7180_MSS	7
80 
81 /* SC7280 Power Domain Indexes */
82 #define SC7280_CX	0
83 #define SC7280_CX_AO	1
84 #define SC7280_EBI	2
85 #define SC7280_GFX	3
86 #define SC7280_MX	4
87 #define SC7280_MX_AO	5
88 #define SC7280_LMX	6
89 #define SC7280_LCX	7
90 #define SC7280_MSS	8
91 
92 /* SC8180X Power Domain Indexes */
93 #define SC8180X_CX	0
94 #define SC8180X_CX_AO	1
95 #define SC8180X_EBI	2
96 #define SC8180X_GFX	3
97 #define SC8180X_LCX	4
98 #define SC8180X_LMX	5
99 #define SC8180X_MMCX	6
100 #define SC8180X_MMCX_AO	7
101 #define SC8180X_MSS	8
102 #define SC8180X_MX	9
103 #define SC8180X_MX_AO	10
104 
105 /* SDM845 Power Domain performance levels */
106 #define RPMH_REGULATOR_LEVEL_RETENTION	16
107 #define RPMH_REGULATOR_LEVEL_MIN_SVS	48
108 #define RPMH_REGULATOR_LEVEL_LOW_SVS	64
109 #define RPMH_REGULATOR_LEVEL_SVS	128
110 #define RPMH_REGULATOR_LEVEL_SVS_L0	144
111 #define RPMH_REGULATOR_LEVEL_SVS_L1	192
112 #define RPMH_REGULATOR_LEVEL_SVS_L2	224
113 #define RPMH_REGULATOR_LEVEL_NOM	256
114 #define RPMH_REGULATOR_LEVEL_NOM_L1	320
115 #define RPMH_REGULATOR_LEVEL_NOM_L2	336
116 #define RPMH_REGULATOR_LEVEL_TURBO	384
117 #define RPMH_REGULATOR_LEVEL_TURBO_L1	416
118 
119 /* MDM9607 Power Domains */
120 #define MDM9607_VDDCX		0
121 #define MDM9607_VDDCX_AO	1
122 #define MDM9607_VDDCX_VFL	2
123 #define MDM9607_VDDMX		3
124 #define MDM9607_VDDMX_AO	4
125 #define MDM9607_VDDMX_VFL	5
126 
127 /* MSM8939 Power Domains */
128 #define MSM8939_VDDMDCX		0
129 #define MSM8939_VDDMDCX_AO	1
130 #define MSM8939_VDDMDCX_VFC	2
131 #define MSM8939_VDDCX		3
132 #define MSM8939_VDDCX_AO	4
133 #define MSM8939_VDDCX_VFC	5
134 #define MSM8939_VDDMX		6
135 #define MSM8939_VDDMX_AO	7
136 
137 /* MSM8916 Power Domain Indexes */
138 #define MSM8916_VDDCX		0
139 #define MSM8916_VDDCX_AO	1
140 #define MSM8916_VDDCX_VFC	2
141 #define MSM8916_VDDMX		3
142 #define MSM8916_VDDMX_AO	4
143 
144 /* MSM8953 Power Domain Indexes */
145 #define MSM8953_VDDMD		0
146 #define MSM8953_VDDMD_AO	1
147 #define MSM8953_VDDCX		2
148 #define MSM8953_VDDCX_AO	3
149 #define MSM8953_VDDCX_VFL	4
150 #define MSM8953_VDDMX		5
151 #define MSM8953_VDDMX_AO	6
152 
153 /* MSM8976 Power Domain Indexes */
154 #define MSM8976_VDDCX		0
155 #define MSM8976_VDDCX_AO	1
156 #define MSM8976_VDDCX_VFL	2
157 #define MSM8976_VDDMX		3
158 #define MSM8976_VDDMX_AO	4
159 #define MSM8976_VDDMX_VFL	5
160 
161 /* MSM8994 Power Domain Indexes */
162 #define MSM8994_VDDCX		0
163 #define MSM8994_VDDCX_AO	1
164 #define MSM8994_VDDCX_VFC	2
165 #define MSM8994_VDDMX		3
166 #define MSM8994_VDDMX_AO	4
167 #define MSM8994_VDDGFX		5
168 #define MSM8994_VDDGFX_VFC	6
169 
170 /* MSM8996 Power Domain Indexes */
171 #define MSM8996_VDDCX		0
172 #define MSM8996_VDDCX_AO	1
173 #define MSM8996_VDDCX_VFC	2
174 #define MSM8996_VDDMX		3
175 #define MSM8996_VDDMX_AO	4
176 #define MSM8996_VDDSSCX		5
177 #define MSM8996_VDDSSCX_VFC	6
178 
179 /* MSM8998 Power Domain Indexes */
180 #define MSM8998_VDDCX		0
181 #define MSM8998_VDDCX_AO	1
182 #define MSM8998_VDDCX_VFL	2
183 #define MSM8998_VDDMX		3
184 #define MSM8998_VDDMX_AO	4
185 #define MSM8998_VDDMX_VFL	5
186 #define MSM8998_SSCCX		6
187 #define MSM8998_SSCCX_VFL	7
188 #define MSM8998_SSCMX		8
189 #define MSM8998_SSCMX_VFL	9
190 
191 /* QCS404 Power Domains */
192 #define QCS404_VDDMX		0
193 #define QCS404_VDDMX_AO		1
194 #define QCS404_VDDMX_VFL	2
195 #define QCS404_LPICX		3
196 #define QCS404_LPICX_VFL	4
197 #define QCS404_LPIMX		5
198 #define QCS404_LPIMX_VFL	6
199 
200 /* SDM660 Power Domains */
201 #define SDM660_VDDCX		0
202 #define SDM660_VDDCX_AO		1
203 #define SDM660_VDDCX_VFL	2
204 #define SDM660_VDDMX		3
205 #define SDM660_VDDMX_AO		4
206 #define SDM660_VDDMX_VFL	5
207 #define SDM660_SSCCX		6
208 #define SDM660_SSCCX_VFL	7
209 #define SDM660_SSCMX		8
210 #define SDM660_SSCMX_VFL	9
211 
212 /* SM6115 Power Domains */
213 #define SM6115_VDDCX		0
214 #define SM6115_VDDCX_AO		1
215 #define SM6115_VDDCX_VFL	2
216 #define SM6115_VDDMX		3
217 #define SM6115_VDDMX_AO		4
218 #define SM6115_VDDMX_VFL	5
219 #define SM6115_VDD_LPI_CX	6
220 #define SM6115_VDD_LPI_MX	7
221 
222 /* RPM SMD Power Domain performance levels */
223 #define RPM_SMD_LEVEL_RETENTION       16
224 #define RPM_SMD_LEVEL_RETENTION_PLUS  32
225 #define RPM_SMD_LEVEL_MIN_SVS         48
226 #define RPM_SMD_LEVEL_LOW_SVS         64
227 #define RPM_SMD_LEVEL_SVS             128
228 #define RPM_SMD_LEVEL_SVS_PLUS        192
229 #define RPM_SMD_LEVEL_NOM             256
230 #define RPM_SMD_LEVEL_NOM_PLUS        320
231 #define RPM_SMD_LEVEL_TURBO           384
232 #define RPM_SMD_LEVEL_TURBO_NO_CPR    416
233 #define RPM_SMD_LEVEL_TURBO_HIGH      448
234 #define RPM_SMD_LEVEL_BINNING         512
235 
236 #endif
237