1 /* SPDX-License-Identifier: GPL-2.0 */
2 /* Copyright (c) 2018, The Linux Foundation. All rights reserved. */
3 
4 #ifndef _DT_BINDINGS_POWER_QCOM_RPMPD_H
5 #define _DT_BINDINGS_POWER_QCOM_RPMPD_H
6 
7 /* SDM845 Power Domain Indexes */
8 #define SDM845_EBI	0
9 #define SDM845_MX	1
10 #define SDM845_MX_AO	2
11 #define SDM845_CX	3
12 #define SDM845_CX_AO	4
13 #define SDM845_LMX	5
14 #define SDM845_LCX	6
15 #define SDM845_GFX	7
16 #define SDM845_MSS	8
17 
18 /* SDX55 Power Domain Indexes */
19 #define SDX55_MSS	0
20 #define SDX55_MX	1
21 #define SDX55_CX	2
22 
23 /* SDX65 Power Domain Indexes */
24 #define SDX65_MSS	0
25 #define SDX65_MX	1
26 #define SDX65_MX_AO	2
27 #define SDX65_CX	3
28 #define SDX65_CX_AO	4
29 #define SDX65_MXC	5
30 
31 /* SM6350 Power Domain Indexes */
32 #define SM6350_CX	0
33 #define SM6350_GFX	1
34 #define SM6350_LCX	2
35 #define SM6350_LMX	3
36 #define SM6350_MSS	4
37 #define SM6350_MX	5
38 
39 /* SM6350 Power Domain Indexes */
40 #define SM6375_VDDCX		0
41 #define SM6375_VDDCX_AO	1
42 #define SM6375_VDDCX_VFL	2
43 #define SM6375_VDDMX		3
44 #define SM6375_VDDMX_AO	4
45 #define SM6375_VDDMX_VFL	5
46 #define SM6375_VDDGX		6
47 #define SM6375_VDDGX_AO	7
48 #define SM6375_VDD_LPI_CX	8
49 #define SM6375_VDD_LPI_MX	9
50 
51 /* SM8150 Power Domain Indexes */
52 #define SM8150_MSS	0
53 #define SM8150_EBI	1
54 #define SM8150_LMX	2
55 #define SM8150_LCX	3
56 #define SM8150_GFX	4
57 #define SM8150_MX	5
58 #define SM8150_MX_AO	6
59 #define SM8150_CX	7
60 #define SM8150_CX_AO	8
61 #define SM8150_MMCX	9
62 #define SM8150_MMCX_AO	10
63 
64 /* SM8250 Power Domain Indexes */
65 #define SM8250_CX	0
66 #define SM8250_CX_AO	1
67 #define SM8250_EBI	2
68 #define SM8250_GFX	3
69 #define SM8250_LCX	4
70 #define SM8250_LMX	5
71 #define SM8250_MMCX	6
72 #define SM8250_MMCX_AO	7
73 #define SM8250_MX	8
74 #define SM8250_MX_AO	9
75 
76 /* SM8350 Power Domain Indexes */
77 #define SM8350_CX	0
78 #define SM8350_CX_AO	1
79 #define SM8350_EBI	2
80 #define SM8350_GFX	3
81 #define SM8350_LCX	4
82 #define SM8350_LMX	5
83 #define SM8350_MMCX	6
84 #define SM8350_MMCX_AO	7
85 #define SM8350_MX	8
86 #define SM8350_MX_AO	9
87 #define SM8350_MXC	10
88 #define SM8350_MXC_AO	11
89 #define SM8350_MSS	12
90 
91 /* SM8450 Power Domain Indexes */
92 #define SM8450_CX	0
93 #define SM8450_CX_AO	1
94 #define SM8450_EBI	2
95 #define SM8450_GFX	3
96 #define SM8450_LCX	4
97 #define SM8450_LMX	5
98 #define SM8450_MMCX	6
99 #define SM8450_MMCX_AO	7
100 #define SM8450_MX	8
101 #define SM8450_MX_AO	9
102 #define SM8450_MXC	10
103 #define SM8450_MXC_AO	11
104 #define SM8450_MSS	12
105 
106 /* SC7180 Power Domain Indexes */
107 #define SC7180_CX	0
108 #define SC7180_CX_AO	1
109 #define SC7180_GFX	2
110 #define SC7180_MX	3
111 #define SC7180_MX_AO	4
112 #define SC7180_LMX	5
113 #define SC7180_LCX	6
114 #define SC7180_MSS	7
115 
116 /* SC7280 Power Domain Indexes */
117 #define SC7280_CX	0
118 #define SC7280_CX_AO	1
119 #define SC7280_EBI	2
120 #define SC7280_GFX	3
121 #define SC7280_MX	4
122 #define SC7280_MX_AO	5
123 #define SC7280_LMX	6
124 #define SC7280_LCX	7
125 #define SC7280_MSS	8
126 
127 /* SC8180X Power Domain Indexes */
128 #define SC8180X_CX	0
129 #define SC8180X_CX_AO	1
130 #define SC8180X_EBI	2
131 #define SC8180X_GFX	3
132 #define SC8180X_LCX	4
133 #define SC8180X_LMX	5
134 #define SC8180X_MMCX	6
135 #define SC8180X_MMCX_AO	7
136 #define SC8180X_MSS	8
137 #define SC8180X_MX	9
138 #define SC8180X_MX_AO	10
139 
140 /* SC8280XP Power Domain Indexes */
141 #define SC8280XP_CX		0
142 #define SC8280XP_CX_AO		1
143 #define SC8280XP_DDR		2
144 #define SC8280XP_EBI		3
145 #define SC8280XP_GFX		4
146 #define SC8280XP_LCX		5
147 #define SC8280XP_LMX		6
148 #define SC8280XP_MMCX		7
149 #define SC8280XP_MMCX_AO	8
150 #define SC8280XP_MSS		9
151 #define SC8280XP_MX		10
152 #define SC8280XP_MXC		12
153 #define SC8280XP_MX_AO		11
154 #define SC8280XP_NSP		13
155 #define SC8280XP_QPHY		14
156 #define SC8280XP_XO		15
157 
158 /* SDM845 Power Domain performance levels */
159 #define RPMH_REGULATOR_LEVEL_RETENTION	16
160 #define RPMH_REGULATOR_LEVEL_MIN_SVS	48
161 #define RPMH_REGULATOR_LEVEL_LOW_SVS	64
162 #define RPMH_REGULATOR_LEVEL_SVS	128
163 #define RPMH_REGULATOR_LEVEL_SVS_L0	144
164 #define RPMH_REGULATOR_LEVEL_SVS_L1	192
165 #define RPMH_REGULATOR_LEVEL_SVS_L2	224
166 #define RPMH_REGULATOR_LEVEL_NOM	256
167 #define RPMH_REGULATOR_LEVEL_NOM_L1	320
168 #define RPMH_REGULATOR_LEVEL_NOM_L2	336
169 #define RPMH_REGULATOR_LEVEL_TURBO	384
170 #define RPMH_REGULATOR_LEVEL_TURBO_L1	416
171 
172 /* MDM9607 Power Domains */
173 #define MDM9607_VDDCX		0
174 #define MDM9607_VDDCX_AO	1
175 #define MDM9607_VDDCX_VFL	2
176 #define MDM9607_VDDMX		3
177 #define MDM9607_VDDMX_AO	4
178 #define MDM9607_VDDMX_VFL	5
179 
180 /* MSM8226 Power Domain Indexes */
181 #define MSM8226_VDDCX		0
182 #define MSM8226_VDDCX_AO	1
183 #define MSM8226_VDDCX_VFC	2
184 
185 /* MSM8939 Power Domains */
186 #define MSM8939_VDDMDCX		0
187 #define MSM8939_VDDMDCX_AO	1
188 #define MSM8939_VDDMDCX_VFC	2
189 #define MSM8939_VDDCX		3
190 #define MSM8939_VDDCX_AO	4
191 #define MSM8939_VDDCX_VFC	5
192 #define MSM8939_VDDMX		6
193 #define MSM8939_VDDMX_AO	7
194 
195 /* MSM8916 Power Domain Indexes */
196 #define MSM8916_VDDCX		0
197 #define MSM8916_VDDCX_AO	1
198 #define MSM8916_VDDCX_VFC	2
199 #define MSM8916_VDDMX		3
200 #define MSM8916_VDDMX_AO	4
201 
202 /* MSM8909 Power Domain Indexes */
203 #define MSM8909_VDDCX		MSM8916_VDDCX
204 #define MSM8909_VDDCX_AO	MSM8916_VDDCX_AO
205 #define MSM8909_VDDCX_VFC	MSM8916_VDDCX_VFC
206 #define MSM8909_VDDMX		MSM8916_VDDMX
207 #define MSM8909_VDDMX_AO	MSM8916_VDDMX_AO
208 
209 /* MSM8953 Power Domain Indexes */
210 #define MSM8953_VDDMD		0
211 #define MSM8953_VDDMD_AO	1
212 #define MSM8953_VDDCX		2
213 #define MSM8953_VDDCX_AO	3
214 #define MSM8953_VDDCX_VFL	4
215 #define MSM8953_VDDMX		5
216 #define MSM8953_VDDMX_AO	6
217 
218 /* MSM8976 Power Domain Indexes */
219 #define MSM8976_VDDCX		0
220 #define MSM8976_VDDCX_AO	1
221 #define MSM8976_VDDCX_VFL	2
222 #define MSM8976_VDDMX		3
223 #define MSM8976_VDDMX_AO	4
224 #define MSM8976_VDDMX_VFL	5
225 
226 /* MSM8994 Power Domain Indexes */
227 #define MSM8994_VDDCX		0
228 #define MSM8994_VDDCX_AO	1
229 #define MSM8994_VDDCX_VFC	2
230 #define MSM8994_VDDMX		3
231 #define MSM8994_VDDMX_AO	4
232 #define MSM8994_VDDGFX		5
233 #define MSM8994_VDDGFX_VFC	6
234 
235 /* MSM8996 Power Domain Indexes */
236 #define MSM8996_VDDCX		0
237 #define MSM8996_VDDCX_AO	1
238 #define MSM8996_VDDCX_VFC	2
239 #define MSM8996_VDDMX		3
240 #define MSM8996_VDDMX_AO	4
241 #define MSM8996_VDDSSCX		5
242 #define MSM8996_VDDSSCX_VFC	6
243 
244 /* MSM8998 Power Domain Indexes */
245 #define MSM8998_VDDCX		0
246 #define MSM8998_VDDCX_AO	1
247 #define MSM8998_VDDCX_VFL	2
248 #define MSM8998_VDDMX		3
249 #define MSM8998_VDDMX_AO	4
250 #define MSM8998_VDDMX_VFL	5
251 #define MSM8998_SSCCX		6
252 #define MSM8998_SSCCX_VFL	7
253 #define MSM8998_SSCMX		8
254 #define MSM8998_SSCMX_VFL	9
255 
256 /* QCS404 Power Domains */
257 #define QCS404_VDDMX		0
258 #define QCS404_VDDMX_AO		1
259 #define QCS404_VDDMX_VFL	2
260 #define QCS404_LPICX		3
261 #define QCS404_LPICX_VFL	4
262 #define QCS404_LPIMX		5
263 #define QCS404_LPIMX_VFL	6
264 
265 /* SDM660 Power Domains */
266 #define SDM660_VDDCX		0
267 #define SDM660_VDDCX_AO		1
268 #define SDM660_VDDCX_VFL	2
269 #define SDM660_VDDMX		3
270 #define SDM660_VDDMX_AO		4
271 #define SDM660_VDDMX_VFL	5
272 #define SDM660_SSCCX		6
273 #define SDM660_SSCCX_VFL	7
274 #define SDM660_SSCMX		8
275 #define SDM660_SSCMX_VFL	9
276 
277 /* SM6115 Power Domains */
278 #define SM6115_VDDCX		0
279 #define SM6115_VDDCX_AO		1
280 #define SM6115_VDDCX_VFL	2
281 #define SM6115_VDDMX		3
282 #define SM6115_VDDMX_AO		4
283 #define SM6115_VDDMX_VFL	5
284 #define SM6115_VDD_LPI_CX	6
285 #define SM6115_VDD_LPI_MX	7
286 
287 /* SM6125 Power Domains */
288 #define SM6125_VDDCX		0
289 #define SM6125_VDDCX_AO		1
290 #define SM6125_VDDCX_VFL	2
291 #define SM6125_VDDMX		3
292 #define SM6125_VDDMX_AO		4
293 #define SM6125_VDDMX_VFL	5
294 
295 /* QCM2290 Power Domains */
296 #define QCM2290_VDDCX		0
297 #define QCM2290_VDDCX_AO	1
298 #define QCM2290_VDDCX_VFL	2
299 #define QCM2290_VDDMX		3
300 #define QCM2290_VDDMX_AO	4
301 #define QCM2290_VDDMX_VFL	5
302 #define QCM2290_VDD_LPI_CX	6
303 #define QCM2290_VDD_LPI_MX	7
304 
305 /* RPM SMD Power Domain performance levels */
306 #define RPM_SMD_LEVEL_RETENTION       16
307 #define RPM_SMD_LEVEL_RETENTION_PLUS  32
308 #define RPM_SMD_LEVEL_MIN_SVS         48
309 #define RPM_SMD_LEVEL_LOW_SVS         64
310 #define RPM_SMD_LEVEL_SVS             128
311 #define RPM_SMD_LEVEL_SVS_PLUS        192
312 #define RPM_SMD_LEVEL_NOM             256
313 #define RPM_SMD_LEVEL_NOM_PLUS        320
314 #define RPM_SMD_LEVEL_TURBO           384
315 #define RPM_SMD_LEVEL_TURBO_NO_CPR    416
316 #define RPM_SMD_LEVEL_TURBO_HIGH      448
317 #define RPM_SMD_LEVEL_BINNING         512
318 
319 #endif
320