1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* Copyright (c) 2018, The Linux Foundation. All rights reserved. */ 3 4 #ifndef _DT_BINDINGS_POWER_QCOM_RPMPD_H 5 #define _DT_BINDINGS_POWER_QCOM_RPMPD_H 6 7 /* SDM845 Power Domain Indexes */ 8 #define SDM845_EBI 0 9 #define SDM845_MX 1 10 #define SDM845_MX_AO 2 11 #define SDM845_CX 3 12 #define SDM845_CX_AO 4 13 #define SDM845_LMX 5 14 #define SDM845_LCX 6 15 #define SDM845_GFX 7 16 #define SDM845_MSS 8 17 18 /* SM8150 Power Domain Indexes */ 19 #define SM8150_MSS 0 20 #define SM8150_EBI 1 21 #define SM8150_LMX 2 22 #define SM8150_LCX 3 23 #define SM8150_GFX 4 24 #define SM8150_MX 5 25 #define SM8150_MX_AO 6 26 #define SM8150_CX 7 27 #define SM8150_CX_AO 8 28 #define SM8150_MMCX 9 29 #define SM8150_MMCX_AO 10 30 31 /* SDM845 Power Domain performance levels */ 32 #define RPMH_REGULATOR_LEVEL_RETENTION 16 33 #define RPMH_REGULATOR_LEVEL_MIN_SVS 48 34 #define RPMH_REGULATOR_LEVEL_LOW_SVS 64 35 #define RPMH_REGULATOR_LEVEL_SVS 128 36 #define RPMH_REGULATOR_LEVEL_SVS_L1 192 37 #define RPMH_REGULATOR_LEVEL_SVS_L2 224 38 #define RPMH_REGULATOR_LEVEL_NOM 256 39 #define RPMH_REGULATOR_LEVEL_NOM_L1 320 40 #define RPMH_REGULATOR_LEVEL_NOM_L2 336 41 #define RPMH_REGULATOR_LEVEL_TURBO 384 42 #define RPMH_REGULATOR_LEVEL_TURBO_L1 416 43 44 /* MSM8976 Power Domain Indexes */ 45 #define MSM8976_VDDCX 0 46 #define MSM8976_VDDCX_AO 1 47 #define MSM8976_VDDCX_VFL 2 48 #define MSM8976_VDDMX 3 49 #define MSM8976_VDDMX_AO 4 50 #define MSM8976_VDDMX_VFL 5 51 52 /* MSM8996 Power Domain Indexes */ 53 #define MSM8996_VDDCX 0 54 #define MSM8996_VDDCX_AO 1 55 #define MSM8996_VDDCX_VFC 2 56 #define MSM8996_VDDMX 3 57 #define MSM8996_VDDMX_AO 4 58 #define MSM8996_VDDSSCX 5 59 #define MSM8996_VDDSSCX_VFC 6 60 61 /* MSM8998 Power Domain Indexes */ 62 #define MSM8998_VDDCX 0 63 #define MSM8998_VDDCX_AO 1 64 #define MSM8998_VDDCX_VFL 2 65 #define MSM8998_VDDMX 3 66 #define MSM8998_VDDMX_AO 4 67 #define MSM8998_VDDMX_VFL 5 68 #define MSM8998_SSCCX 6 69 #define MSM8998_SSCCX_VFL 7 70 #define MSM8998_SSCMX 8 71 #define MSM8998_SSCMX_VFL 9 72 73 /* QCS404 Power Domains */ 74 #define QCS404_VDDMX 0 75 #define QCS404_VDDMX_AO 1 76 #define QCS404_VDDMX_VFL 2 77 #define QCS404_LPICX 3 78 #define QCS404_LPICX_VFL 4 79 #define QCS404_LPIMX 5 80 #define QCS404_LPIMX_VFL 6 81 82 /* RPM SMD Power Domain performance levels */ 83 #define RPM_SMD_LEVEL_RETENTION 16 84 #define RPM_SMD_LEVEL_RETENTION_PLUS 32 85 #define RPM_SMD_LEVEL_MIN_SVS 48 86 #define RPM_SMD_LEVEL_LOW_SVS 64 87 #define RPM_SMD_LEVEL_SVS 128 88 #define RPM_SMD_LEVEL_SVS_PLUS 192 89 #define RPM_SMD_LEVEL_NOM 256 90 #define RPM_SMD_LEVEL_NOM_PLUS 320 91 #define RPM_SMD_LEVEL_TURBO 384 92 #define RPM_SMD_LEVEL_TURBO_NO_CPR 416 93 #define RPM_SMD_LEVEL_TURBO_HIGH 448 94 #define RPM_SMD_LEVEL_BINNING 512 95 96 #endif 97