1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* Copyright (c) 2018, The Linux Foundation. All rights reserved. */ 3 4 #ifndef _DT_BINDINGS_POWER_QCOM_RPMPD_H 5 #define _DT_BINDINGS_POWER_QCOM_RPMPD_H 6 7 /* SA8775P Power Domain Indexes */ 8 #define SA8775P_CX 0 9 #define SA8775P_CX_AO 1 10 #define SA8775P_DDR 2 11 #define SA8775P_EBI 3 12 #define SA8775P_GFX 4 13 #define SA8775P_LCX 5 14 #define SA8775P_LMX 6 15 #define SA8775P_MMCX 7 16 #define SA8775P_MMCX_AO 8 17 #define SA8775P_MSS 9 18 #define SA8775P_MX 10 19 #define SA8775P_MX_AO 11 20 #define SA8775P_MXC 12 21 #define SA8775P_MXC_AO 13 22 #define SA8775P_NSP0 14 23 #define SA8775P_NSP1 15 24 #define SA8775P_XO 16 25 26 /* SDM670 Power Domain Indexes */ 27 #define SDM670_MX 0 28 #define SDM670_MX_AO 1 29 #define SDM670_CX 2 30 #define SDM670_CX_AO 3 31 #define SDM670_LMX 4 32 #define SDM670_LCX 5 33 #define SDM670_GFX 6 34 #define SDM670_MSS 7 35 36 /* SDM845 Power Domain Indexes */ 37 #define SDM845_EBI 0 38 #define SDM845_MX 1 39 #define SDM845_MX_AO 2 40 #define SDM845_CX 3 41 #define SDM845_CX_AO 4 42 #define SDM845_LMX 5 43 #define SDM845_LCX 6 44 #define SDM845_GFX 7 45 #define SDM845_MSS 8 46 47 /* SDX55 Power Domain Indexes */ 48 #define SDX55_MSS 0 49 #define SDX55_MX 1 50 #define SDX55_CX 2 51 52 /* SDX65 Power Domain Indexes */ 53 #define SDX65_MSS 0 54 #define SDX65_MX 1 55 #define SDX65_MX_AO 2 56 #define SDX65_CX 3 57 #define SDX65_CX_AO 4 58 #define SDX65_MXC 5 59 60 /* SM6350 Power Domain Indexes */ 61 #define SM6350_CX 0 62 #define SM6350_GFX 1 63 #define SM6350_LCX 2 64 #define SM6350_LMX 3 65 #define SM6350_MSS 4 66 #define SM6350_MX 5 67 68 /* SM6350 Power Domain Indexes */ 69 #define SM6375_VDDCX 0 70 #define SM6375_VDDCX_AO 1 71 #define SM6375_VDDCX_VFL 2 72 #define SM6375_VDDMX 3 73 #define SM6375_VDDMX_AO 4 74 #define SM6375_VDDMX_VFL 5 75 #define SM6375_VDDGX 6 76 #define SM6375_VDDGX_AO 7 77 #define SM6375_VDD_LPI_CX 8 78 #define SM6375_VDD_LPI_MX 9 79 80 /* SM8150 Power Domain Indexes */ 81 #define SM8150_MSS 0 82 #define SM8150_EBI 1 83 #define SM8150_LMX 2 84 #define SM8150_LCX 3 85 #define SM8150_GFX 4 86 #define SM8150_MX 5 87 #define SM8150_MX_AO 6 88 #define SM8150_CX 7 89 #define SM8150_CX_AO 8 90 #define SM8150_MMCX 9 91 #define SM8150_MMCX_AO 10 92 93 /* SM8250 Power Domain Indexes */ 94 #define SM8250_CX 0 95 #define SM8250_CX_AO 1 96 #define SM8250_EBI 2 97 #define SM8250_GFX 3 98 #define SM8250_LCX 4 99 #define SM8250_LMX 5 100 #define SM8250_MMCX 6 101 #define SM8250_MMCX_AO 7 102 #define SM8250_MX 8 103 #define SM8250_MX_AO 9 104 105 /* SM8350 Power Domain Indexes */ 106 #define SM8350_CX 0 107 #define SM8350_CX_AO 1 108 #define SM8350_EBI 2 109 #define SM8350_GFX 3 110 #define SM8350_LCX 4 111 #define SM8350_LMX 5 112 #define SM8350_MMCX 6 113 #define SM8350_MMCX_AO 7 114 #define SM8350_MX 8 115 #define SM8350_MX_AO 9 116 #define SM8350_MXC 10 117 #define SM8350_MXC_AO 11 118 #define SM8350_MSS 12 119 120 /* SM8450 Power Domain Indexes */ 121 #define SM8450_CX 0 122 #define SM8450_CX_AO 1 123 #define SM8450_EBI 2 124 #define SM8450_GFX 3 125 #define SM8450_LCX 4 126 #define SM8450_LMX 5 127 #define SM8450_MMCX 6 128 #define SM8450_MMCX_AO 7 129 #define SM8450_MX 8 130 #define SM8450_MX_AO 9 131 #define SM8450_MXC 10 132 #define SM8450_MXC_AO 11 133 #define SM8450_MSS 12 134 135 /* SM8550 Power Domain Indexes */ 136 #define SM8550_CX 0 137 #define SM8550_CX_AO 1 138 #define SM8550_EBI 2 139 #define SM8550_GFX 3 140 #define SM8550_LCX 4 141 #define SM8550_LMX 5 142 #define SM8550_MMCX 6 143 #define SM8550_MMCX_AO 7 144 #define SM8550_MX 8 145 #define SM8550_MX_AO 9 146 #define SM8550_MXC 10 147 #define SM8550_MXC_AO 11 148 #define SM8550_MSS 12 149 #define SM8550_NSP 13 150 151 /* QDU1000/QRU1000 Power Domain Indexes */ 152 #define QDU1000_EBI 0 153 #define QDU1000_MSS 1 154 #define QDU1000_CX 2 155 #define QDU1000_MX 3 156 157 /* SC7180 Power Domain Indexes */ 158 #define SC7180_CX 0 159 #define SC7180_CX_AO 1 160 #define SC7180_GFX 2 161 #define SC7180_MX 3 162 #define SC7180_MX_AO 4 163 #define SC7180_LMX 5 164 #define SC7180_LCX 6 165 #define SC7180_MSS 7 166 167 /* SC7280 Power Domain Indexes */ 168 #define SC7280_CX 0 169 #define SC7280_CX_AO 1 170 #define SC7280_EBI 2 171 #define SC7280_GFX 3 172 #define SC7280_MX 4 173 #define SC7280_MX_AO 5 174 #define SC7280_LMX 6 175 #define SC7280_LCX 7 176 #define SC7280_MSS 8 177 178 /* SC8180X Power Domain Indexes */ 179 #define SC8180X_CX 0 180 #define SC8180X_CX_AO 1 181 #define SC8180X_EBI 2 182 #define SC8180X_GFX 3 183 #define SC8180X_LCX 4 184 #define SC8180X_LMX 5 185 #define SC8180X_MMCX 6 186 #define SC8180X_MMCX_AO 7 187 #define SC8180X_MSS 8 188 #define SC8180X_MX 9 189 #define SC8180X_MX_AO 10 190 191 /* SC8280XP Power Domain Indexes */ 192 #define SC8280XP_CX 0 193 #define SC8280XP_CX_AO 1 194 #define SC8280XP_DDR 2 195 #define SC8280XP_EBI 3 196 #define SC8280XP_GFX 4 197 #define SC8280XP_LCX 5 198 #define SC8280XP_LMX 6 199 #define SC8280XP_MMCX 7 200 #define SC8280XP_MMCX_AO 8 201 #define SC8280XP_MSS 9 202 #define SC8280XP_MX 10 203 #define SC8280XP_MXC 12 204 #define SC8280XP_MX_AO 11 205 #define SC8280XP_NSP 13 206 #define SC8280XP_QPHY 14 207 #define SC8280XP_XO 15 208 209 /* SDM845 Power Domain performance levels */ 210 #define RPMH_REGULATOR_LEVEL_RETENTION 16 211 #define RPMH_REGULATOR_LEVEL_MIN_SVS 48 212 #define RPMH_REGULATOR_LEVEL_LOW_SVS_D2 52 213 #define RPMH_REGULATOR_LEVEL_LOW_SVS_D1 56 214 #define RPMH_REGULATOR_LEVEL_LOW_SVS_D0 60 215 #define RPMH_REGULATOR_LEVEL_LOW_SVS 64 216 #define RPMH_REGULATOR_LEVEL_LOW_SVS_P1 72 217 #define RPMH_REGULATOR_LEVEL_LOW_SVS_L1 80 218 #define RPMH_REGULATOR_LEVEL_LOW_SVS_L2 96 219 #define RPMH_REGULATOR_LEVEL_SVS 128 220 #define RPMH_REGULATOR_LEVEL_SVS_L0 144 221 #define RPMH_REGULATOR_LEVEL_SVS_L1 192 222 #define RPMH_REGULATOR_LEVEL_SVS_L2 224 223 #define RPMH_REGULATOR_LEVEL_NOM 256 224 #define RPMH_REGULATOR_LEVEL_NOM_L0 288 225 #define RPMH_REGULATOR_LEVEL_NOM_L1 320 226 #define RPMH_REGULATOR_LEVEL_NOM_L2 336 227 #define RPMH_REGULATOR_LEVEL_TURBO 384 228 #define RPMH_REGULATOR_LEVEL_TURBO_L0 400 229 #define RPMH_REGULATOR_LEVEL_TURBO_L1 416 230 #define RPMH_REGULATOR_LEVEL_TURBO_L2 432 231 #define RPMH_REGULATOR_LEVEL_TURBO_L3 448 232 #define RPMH_REGULATOR_LEVEL_SUPER_TURBO 464 233 #define RPMH_REGULATOR_LEVEL_SUPER_TURBO_NO_CPR 480 234 235 /* MDM9607 Power Domains */ 236 #define MDM9607_VDDCX 0 237 #define MDM9607_VDDCX_AO 1 238 #define MDM9607_VDDCX_VFL 2 239 #define MDM9607_VDDMX 3 240 #define MDM9607_VDDMX_AO 4 241 #define MDM9607_VDDMX_VFL 5 242 243 /* MSM8226 Power Domain Indexes */ 244 #define MSM8226_VDDCX 0 245 #define MSM8226_VDDCX_AO 1 246 #define MSM8226_VDDCX_VFC 2 247 248 /* MSM8939 Power Domains */ 249 #define MSM8939_VDDMDCX 0 250 #define MSM8939_VDDMDCX_AO 1 251 #define MSM8939_VDDMDCX_VFC 2 252 #define MSM8939_VDDCX 3 253 #define MSM8939_VDDCX_AO 4 254 #define MSM8939_VDDCX_VFC 5 255 #define MSM8939_VDDMX 6 256 #define MSM8939_VDDMX_AO 7 257 258 /* MSM8916 Power Domain Indexes */ 259 #define MSM8916_VDDCX 0 260 #define MSM8916_VDDCX_AO 1 261 #define MSM8916_VDDCX_VFC 2 262 #define MSM8916_VDDMX 3 263 #define MSM8916_VDDMX_AO 4 264 265 /* MSM8909 Power Domain Indexes */ 266 #define MSM8909_VDDCX MSM8916_VDDCX 267 #define MSM8909_VDDCX_AO MSM8916_VDDCX_AO 268 #define MSM8909_VDDCX_VFC MSM8916_VDDCX_VFC 269 #define MSM8909_VDDMX MSM8916_VDDMX 270 #define MSM8909_VDDMX_AO MSM8916_VDDMX_AO 271 272 /* MSM8953 Power Domain Indexes */ 273 #define MSM8953_VDDMD 0 274 #define MSM8953_VDDMD_AO 1 275 #define MSM8953_VDDCX 2 276 #define MSM8953_VDDCX_AO 3 277 #define MSM8953_VDDCX_VFL 4 278 #define MSM8953_VDDMX 5 279 #define MSM8953_VDDMX_AO 6 280 281 /* MSM8976 Power Domain Indexes */ 282 #define MSM8976_VDDCX 0 283 #define MSM8976_VDDCX_AO 1 284 #define MSM8976_VDDCX_VFL 2 285 #define MSM8976_VDDMX 3 286 #define MSM8976_VDDMX_AO 4 287 #define MSM8976_VDDMX_VFL 5 288 289 /* MSM8994 Power Domain Indexes */ 290 #define MSM8994_VDDCX 0 291 #define MSM8994_VDDCX_AO 1 292 #define MSM8994_VDDCX_VFC 2 293 #define MSM8994_VDDMX 3 294 #define MSM8994_VDDMX_AO 4 295 #define MSM8994_VDDGFX 5 296 #define MSM8994_VDDGFX_VFC 6 297 298 /* MSM8996 Power Domain Indexes */ 299 #define MSM8996_VDDCX 0 300 #define MSM8996_VDDCX_AO 1 301 #define MSM8996_VDDCX_VFC 2 302 #define MSM8996_VDDMX 3 303 #define MSM8996_VDDMX_AO 4 304 #define MSM8996_VDDSSCX 5 305 #define MSM8996_VDDSSCX_VFC 6 306 307 /* MSM8998 Power Domain Indexes */ 308 #define MSM8998_VDDCX 0 309 #define MSM8998_VDDCX_AO 1 310 #define MSM8998_VDDCX_VFL 2 311 #define MSM8998_VDDMX 3 312 #define MSM8998_VDDMX_AO 4 313 #define MSM8998_VDDMX_VFL 5 314 #define MSM8998_SSCCX 6 315 #define MSM8998_SSCCX_VFL 7 316 #define MSM8998_SSCMX 8 317 #define MSM8998_SSCMX_VFL 9 318 319 /* QCS404 Power Domains */ 320 #define QCS404_VDDMX 0 321 #define QCS404_VDDMX_AO 1 322 #define QCS404_VDDMX_VFL 2 323 #define QCS404_LPICX 3 324 #define QCS404_LPICX_VFL 4 325 #define QCS404_LPIMX 5 326 #define QCS404_LPIMX_VFL 6 327 328 /* SDM660 Power Domains */ 329 #define SDM660_VDDCX 0 330 #define SDM660_VDDCX_AO 1 331 #define SDM660_VDDCX_VFL 2 332 #define SDM660_VDDMX 3 333 #define SDM660_VDDMX_AO 4 334 #define SDM660_VDDMX_VFL 5 335 #define SDM660_SSCCX 6 336 #define SDM660_SSCCX_VFL 7 337 #define SDM660_SSCMX 8 338 #define SDM660_SSCMX_VFL 9 339 340 /* SM6115 Power Domains */ 341 #define SM6115_VDDCX 0 342 #define SM6115_VDDCX_AO 1 343 #define SM6115_VDDCX_VFL 2 344 #define SM6115_VDDMX 3 345 #define SM6115_VDDMX_AO 4 346 #define SM6115_VDDMX_VFL 5 347 #define SM6115_VDD_LPI_CX 6 348 #define SM6115_VDD_LPI_MX 7 349 350 /* SM6125 Power Domains */ 351 #define SM6125_VDDCX 0 352 #define SM6125_VDDCX_AO 1 353 #define SM6125_VDDCX_VFL 2 354 #define SM6125_VDDMX 3 355 #define SM6125_VDDMX_AO 4 356 #define SM6125_VDDMX_VFL 5 357 358 /* QCM2290 Power Domains */ 359 #define QCM2290_VDDCX 0 360 #define QCM2290_VDDCX_AO 1 361 #define QCM2290_VDDCX_VFL 2 362 #define QCM2290_VDDMX 3 363 #define QCM2290_VDDMX_AO 4 364 #define QCM2290_VDDMX_VFL 5 365 #define QCM2290_VDD_LPI_CX 6 366 #define QCM2290_VDD_LPI_MX 7 367 368 /* RPM SMD Power Domain performance levels */ 369 #define RPM_SMD_LEVEL_RETENTION 16 370 #define RPM_SMD_LEVEL_RETENTION_PLUS 32 371 #define RPM_SMD_LEVEL_MIN_SVS 48 372 #define RPM_SMD_LEVEL_LOW_SVS 64 373 #define RPM_SMD_LEVEL_SVS 128 374 #define RPM_SMD_LEVEL_SVS_PLUS 192 375 #define RPM_SMD_LEVEL_NOM 256 376 #define RPM_SMD_LEVEL_NOM_PLUS 320 377 #define RPM_SMD_LEVEL_TURBO 384 378 #define RPM_SMD_LEVEL_TURBO_NO_CPR 416 379 #define RPM_SMD_LEVEL_TURBO_HIGH 448 380 #define RPM_SMD_LEVEL_BINNING 512 381 382 #endif 383