1c6e6eff4SRajendra Nayak /* SPDX-License-Identifier: GPL-2.0 */
2c6e6eff4SRajendra Nayak /* Copyright (c) 2018, The Linux Foundation. All rights reserved. */
3c6e6eff4SRajendra Nayak 
4c6e6eff4SRajendra Nayak #ifndef _DT_BINDINGS_POWER_QCOM_RPMPD_H
5c6e6eff4SRajendra Nayak #define _DT_BINDINGS_POWER_QCOM_RPMPD_H
6c6e6eff4SRajendra Nayak 
7c6e6eff4SRajendra Nayak /* SDM845 Power Domain Indexes */
8c6e6eff4SRajendra Nayak #define SDM845_EBI	0
9c6e6eff4SRajendra Nayak #define SDM845_MX	1
10c6e6eff4SRajendra Nayak #define SDM845_MX_AO	2
11c6e6eff4SRajendra Nayak #define SDM845_CX	3
12c6e6eff4SRajendra Nayak #define SDM845_CX_AO	4
13c6e6eff4SRajendra Nayak #define SDM845_LMX	5
14c6e6eff4SRajendra Nayak #define SDM845_LCX	6
15c6e6eff4SRajendra Nayak #define SDM845_GFX	7
16c6e6eff4SRajendra Nayak #define SDM845_MSS	8
17c6e6eff4SRajendra Nayak 
18c6e6eff4SRajendra Nayak /* SDM845 Power Domain performance levels */
19c6e6eff4SRajendra Nayak #define RPMH_REGULATOR_LEVEL_RETENTION	16
20c6e6eff4SRajendra Nayak #define RPMH_REGULATOR_LEVEL_MIN_SVS	48
21c6e6eff4SRajendra Nayak #define RPMH_REGULATOR_LEVEL_LOW_SVS	64
22c6e6eff4SRajendra Nayak #define RPMH_REGULATOR_LEVEL_SVS	128
23c6e6eff4SRajendra Nayak #define RPMH_REGULATOR_LEVEL_SVS_L1	192
24c6e6eff4SRajendra Nayak #define RPMH_REGULATOR_LEVEL_NOM	256
25c6e6eff4SRajendra Nayak #define RPMH_REGULATOR_LEVEL_NOM_L1	320
26c6e6eff4SRajendra Nayak #define RPMH_REGULATOR_LEVEL_NOM_L2	336
27c6e6eff4SRajendra Nayak #define RPMH_REGULATOR_LEVEL_TURBO	384
28c6e6eff4SRajendra Nayak #define RPMH_REGULATOR_LEVEL_TURBO_L1	416
29c6e6eff4SRajendra Nayak 
30c6e6eff4SRajendra Nayak /* MSM8996 Power Domain Indexes */
31c6e6eff4SRajendra Nayak #define MSM8996_VDDCX		0
32c6e6eff4SRajendra Nayak #define MSM8996_VDDCX_AO	1
33c6e6eff4SRajendra Nayak #define MSM8996_VDDCX_VFC	2
34c6e6eff4SRajendra Nayak #define MSM8996_VDDMX		3
35c6e6eff4SRajendra Nayak #define MSM8996_VDDMX_AO	4
36c6e6eff4SRajendra Nayak #define MSM8996_VDDSSCX		5
37c6e6eff4SRajendra Nayak #define MSM8996_VDDSSCX_VFC	6
38c6e6eff4SRajendra Nayak 
39dec9a05aSSibi Sankar /* MSM8998 Power Domain Indexes */
40dec9a05aSSibi Sankar #define MSM8998_VDDCX		0
41dec9a05aSSibi Sankar #define MSM8998_VDDCX_AO	1
42dec9a05aSSibi Sankar #define MSM8998_VDDCX_VFL	2
43dec9a05aSSibi Sankar #define MSM8998_VDDMX		3
44dec9a05aSSibi Sankar #define MSM8998_VDDMX_AO	4
45dec9a05aSSibi Sankar #define MSM8998_VDDMX_VFL	5
46dec9a05aSSibi Sankar #define MSM8998_SSCCX		6
47dec9a05aSSibi Sankar #define MSM8998_SSCCX_VFL	7
48dec9a05aSSibi Sankar #define MSM8998_SSCMX		8
49dec9a05aSSibi Sankar #define MSM8998_SSCMX_VFL	9
50dec9a05aSSibi Sankar 
510cb93b15SBjorn Andersson /* QCS404 Power Domains */
520cb93b15SBjorn Andersson #define QCS404_VDDMX		0
530cb93b15SBjorn Andersson #define QCS404_VDDMX_AO		1
540cb93b15SBjorn Andersson #define QCS404_VDDMX_VFL	2
550cb93b15SBjorn Andersson #define QCS404_LPICX		3
560cb93b15SBjorn Andersson #define QCS404_LPICX_VFL	4
570cb93b15SBjorn Andersson #define QCS404_LPIMX		5
580cb93b15SBjorn Andersson #define QCS404_LPIMX_VFL	6
590cb93b15SBjorn Andersson 
600cb93b15SBjorn Andersson /* RPM SMD Power Domain performance levels */
610cb93b15SBjorn Andersson #define RPM_SMD_LEVEL_RETENTION       16
620cb93b15SBjorn Andersson #define RPM_SMD_LEVEL_RETENTION_PLUS  32
630cb93b15SBjorn Andersson #define RPM_SMD_LEVEL_MIN_SVS         48
640cb93b15SBjorn Andersson #define RPM_SMD_LEVEL_LOW_SVS         64
650cb93b15SBjorn Andersson #define RPM_SMD_LEVEL_SVS             128
660cb93b15SBjorn Andersson #define RPM_SMD_LEVEL_SVS_PLUS        192
670cb93b15SBjorn Andersson #define RPM_SMD_LEVEL_NOM             256
680cb93b15SBjorn Andersson #define RPM_SMD_LEVEL_NOM_PLUS        320
690cb93b15SBjorn Andersson #define RPM_SMD_LEVEL_TURBO           384
700cb93b15SBjorn Andersson #define RPM_SMD_LEVEL_TURBO_NO_CPR    416
710cb93b15SBjorn Andersson #define RPM_SMD_LEVEL_BINNING         512
720cb93b15SBjorn Andersson 
73c6e6eff4SRajendra Nayak #endif
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