1c6e6eff4SRajendra Nayak /* SPDX-License-Identifier: GPL-2.0 */ 2c6e6eff4SRajendra Nayak /* Copyright (c) 2018, The Linux Foundation. All rights reserved. */ 3c6e6eff4SRajendra Nayak 4c6e6eff4SRajendra Nayak #ifndef _DT_BINDINGS_POWER_QCOM_RPMPD_H 5c6e6eff4SRajendra Nayak #define _DT_BINDINGS_POWER_QCOM_RPMPD_H 6c6e6eff4SRajendra Nayak 7c6e6eff4SRajendra Nayak /* SDM845 Power Domain Indexes */ 8c6e6eff4SRajendra Nayak #define SDM845_EBI 0 9c6e6eff4SRajendra Nayak #define SDM845_MX 1 10c6e6eff4SRajendra Nayak #define SDM845_MX_AO 2 11c6e6eff4SRajendra Nayak #define SDM845_CX 3 12c6e6eff4SRajendra Nayak #define SDM845_CX_AO 4 13c6e6eff4SRajendra Nayak #define SDM845_LMX 5 14c6e6eff4SRajendra Nayak #define SDM845_LCX 6 15c6e6eff4SRajendra Nayak #define SDM845_GFX 7 16c6e6eff4SRajendra Nayak #define SDM845_MSS 8 17c6e6eff4SRajendra Nayak 18c6e6eff4SRajendra Nayak /* SDM845 Power Domain performance levels */ 19c6e6eff4SRajendra Nayak #define RPMH_REGULATOR_LEVEL_RETENTION 16 20c6e6eff4SRajendra Nayak #define RPMH_REGULATOR_LEVEL_MIN_SVS 48 21c6e6eff4SRajendra Nayak #define RPMH_REGULATOR_LEVEL_LOW_SVS 64 22c6e6eff4SRajendra Nayak #define RPMH_REGULATOR_LEVEL_SVS 128 23c6e6eff4SRajendra Nayak #define RPMH_REGULATOR_LEVEL_SVS_L1 192 24c6e6eff4SRajendra Nayak #define RPMH_REGULATOR_LEVEL_NOM 256 25c6e6eff4SRajendra Nayak #define RPMH_REGULATOR_LEVEL_NOM_L1 320 26c6e6eff4SRajendra Nayak #define RPMH_REGULATOR_LEVEL_NOM_L2 336 27c6e6eff4SRajendra Nayak #define RPMH_REGULATOR_LEVEL_TURBO 384 28c6e6eff4SRajendra Nayak #define RPMH_REGULATOR_LEVEL_TURBO_L1 416 29c6e6eff4SRajendra Nayak 30c6e6eff4SRajendra Nayak /* MSM8996 Power Domain Indexes */ 31c6e6eff4SRajendra Nayak #define MSM8996_VDDCX 0 32c6e6eff4SRajendra Nayak #define MSM8996_VDDCX_AO 1 33c6e6eff4SRajendra Nayak #define MSM8996_VDDCX_VFC 2 34c6e6eff4SRajendra Nayak #define MSM8996_VDDMX 3 35c6e6eff4SRajendra Nayak #define MSM8996_VDDMX_AO 4 36c6e6eff4SRajendra Nayak #define MSM8996_VDDSSCX 5 37c6e6eff4SRajendra Nayak #define MSM8996_VDDSSCX_VFC 6 38c6e6eff4SRajendra Nayak 390cb93b15SBjorn Andersson /* QCS404 Power Domains */ 400cb93b15SBjorn Andersson #define QCS404_VDDMX 0 410cb93b15SBjorn Andersson #define QCS404_VDDMX_AO 1 420cb93b15SBjorn Andersson #define QCS404_VDDMX_VFL 2 430cb93b15SBjorn Andersson #define QCS404_LPICX 3 440cb93b15SBjorn Andersson #define QCS404_LPICX_VFL 4 450cb93b15SBjorn Andersson #define QCS404_LPIMX 5 460cb93b15SBjorn Andersson #define QCS404_LPIMX_VFL 6 470cb93b15SBjorn Andersson 480cb93b15SBjorn Andersson /* RPM SMD Power Domain performance levels */ 490cb93b15SBjorn Andersson #define RPM_SMD_LEVEL_RETENTION 16 500cb93b15SBjorn Andersson #define RPM_SMD_LEVEL_RETENTION_PLUS 32 510cb93b15SBjorn Andersson #define RPM_SMD_LEVEL_MIN_SVS 48 520cb93b15SBjorn Andersson #define RPM_SMD_LEVEL_LOW_SVS 64 530cb93b15SBjorn Andersson #define RPM_SMD_LEVEL_SVS 128 540cb93b15SBjorn Andersson #define RPM_SMD_LEVEL_SVS_PLUS 192 550cb93b15SBjorn Andersson #define RPM_SMD_LEVEL_NOM 256 560cb93b15SBjorn Andersson #define RPM_SMD_LEVEL_NOM_PLUS 320 570cb93b15SBjorn Andersson #define RPM_SMD_LEVEL_TURBO 384 580cb93b15SBjorn Andersson #define RPM_SMD_LEVEL_TURBO_NO_CPR 416 590cb93b15SBjorn Andersson #define RPM_SMD_LEVEL_BINNING 512 600cb93b15SBjorn Andersson 61c6e6eff4SRajendra Nayak #endif 62