139d01d9cSLucas Stach /* SPDX-License-Identifier: (GPL-2.0 OR MIT) */ 239d01d9cSLucas Stach /* 339d01d9cSLucas Stach * Copyright (C) 2020 Pengutronix, Sascha Hauer <kernel@pengutronix.de> 439d01d9cSLucas Stach */ 539d01d9cSLucas Stach 639d01d9cSLucas Stach #ifndef __DT_BINDINGS_IMX8MP_POWER_DOMAIN_POWER_H__ 739d01d9cSLucas Stach #define __DT_BINDINGS_IMX8MP_POWER_DOMAIN_POWER_H__ 839d01d9cSLucas Stach 939d01d9cSLucas Stach #define IMX8MP_POWER_DOMAIN_MIPI_PHY1 0 1039d01d9cSLucas Stach #define IMX8MP_POWER_DOMAIN_PCIE_PHY 1 1139d01d9cSLucas Stach #define IMX8MP_POWER_DOMAIN_USB1_PHY 2 1239d01d9cSLucas Stach #define IMX8MP_POWER_DOMAIN_USB2_PHY 3 1339d01d9cSLucas Stach #define IMX8MP_POWER_DOMAIN_MLMIX 4 1439d01d9cSLucas Stach #define IMX8MP_POWER_DOMAIN_AUDIOMIX 5 1539d01d9cSLucas Stach #define IMX8MP_POWER_DOMAIN_GPU2D 6 1639d01d9cSLucas Stach #define IMX8MP_POWER_DOMAIN_GPUMIX 7 1739d01d9cSLucas Stach #define IMX8MP_POWER_DOMAIN_VPUMIX 8 1839d01d9cSLucas Stach #define IMX8MP_POWER_DOMAIN_GPU3D 9 1939d01d9cSLucas Stach #define IMX8MP_POWER_DOMAIN_MEDIAMIX 10 2039d01d9cSLucas Stach #define IMX8MP_POWER_DOMAIN_VPU_G1 11 2139d01d9cSLucas Stach #define IMX8MP_POWER_DOMAIN_VPU_G2 12 2239d01d9cSLucas Stach #define IMX8MP_POWER_DOMAIN_VPU_VC8000E 13 2339d01d9cSLucas Stach #define IMX8MP_POWER_DOMAIN_HDMIMIX 14 2439d01d9cSLucas Stach #define IMX8MP_POWER_DOMAIN_HDMI_PHY 15 2539d01d9cSLucas Stach #define IMX8MP_POWER_DOMAIN_MIPI_PHY2 16 2639d01d9cSLucas Stach #define IMX8MP_POWER_DOMAIN_HSIOMIX 17 2739d01d9cSLucas Stach #define IMX8MP_POWER_DOMAIN_MEDIAMIX_ISPDWP 18 2839d01d9cSLucas Stach 29*38294f61SLucas Stach #define IMX8MP_HSIOBLK_PD_USB 0 30*38294f61SLucas Stach #define IMX8MP_HSIOBLK_PD_USB_PHY1 1 31*38294f61SLucas Stach #define IMX8MP_HSIOBLK_PD_USB_PHY2 2 32*38294f61SLucas Stach #define IMX8MP_HSIOBLK_PD_PCIE 3 33*38294f61SLucas Stach #define IMX8MP_HSIOBLK_PD_PCIE_PHY 4 34*38294f61SLucas Stach 3539d01d9cSLucas Stach #endif 36