188cc9fc4SAisheng Dong /* SPDX-License-Identifier: GPL-2.0+ */ 288cc9fc4SAisheng Dong /* 388cc9fc4SAisheng Dong * Copyright (C) 2016 Freescale Semiconductor, Inc. 488cc9fc4SAisheng Dong * Copyright 2017~2018 NXP 588cc9fc4SAisheng Dong */ 688cc9fc4SAisheng Dong 788cc9fc4SAisheng Dong #ifndef _IMX8QM_PADS_H 888cc9fc4SAisheng Dong #define _IMX8QM_PADS_H 988cc9fc4SAisheng Dong 1088cc9fc4SAisheng Dong /* pin id */ 1188cc9fc4SAisheng Dong #define IMX8QM_SIM0_CLK 0 1288cc9fc4SAisheng Dong #define IMX8QM_SIM0_RST 1 1388cc9fc4SAisheng Dong #define IMX8QM_SIM0_IO 2 1488cc9fc4SAisheng Dong #define IMX8QM_SIM0_PD 3 1588cc9fc4SAisheng Dong #define IMX8QM_SIM0_POWER_EN 4 1688cc9fc4SAisheng Dong #define IMX8QM_SIM0_GPIO0_00 5 1788cc9fc4SAisheng Dong #define IMX8QM_COMP_CTL_GPIO_1V8_3V3_SIM 6 1888cc9fc4SAisheng Dong #define IMX8QM_M40_I2C0_SCL 7 1988cc9fc4SAisheng Dong #define IMX8QM_M40_I2C0_SDA 8 2088cc9fc4SAisheng Dong #define IMX8QM_M40_GPIO0_00 9 2188cc9fc4SAisheng Dong #define IMX8QM_M40_GPIO0_01 10 2288cc9fc4SAisheng Dong #define IMX8QM_M41_I2C0_SCL 11 2388cc9fc4SAisheng Dong #define IMX8QM_M41_I2C0_SDA 12 2488cc9fc4SAisheng Dong #define IMX8QM_M41_GPIO0_00 13 2588cc9fc4SAisheng Dong #define IMX8QM_M41_GPIO0_01 14 2688cc9fc4SAisheng Dong #define IMX8QM_GPT0_CLK 15 2788cc9fc4SAisheng Dong #define IMX8QM_GPT0_CAPTURE 16 2888cc9fc4SAisheng Dong #define IMX8QM_GPT0_COMPARE 17 2988cc9fc4SAisheng Dong #define IMX8QM_GPT1_CLK 18 3088cc9fc4SAisheng Dong #define IMX8QM_GPT1_CAPTURE 19 3188cc9fc4SAisheng Dong #define IMX8QM_GPT1_COMPARE 20 3288cc9fc4SAisheng Dong #define IMX8QM_UART0_RX 21 3388cc9fc4SAisheng Dong #define IMX8QM_UART0_TX 22 3488cc9fc4SAisheng Dong #define IMX8QM_UART0_RTS_B 23 3588cc9fc4SAisheng Dong #define IMX8QM_UART0_CTS_B 24 3688cc9fc4SAisheng Dong #define IMX8QM_UART1_TX 25 3788cc9fc4SAisheng Dong #define IMX8QM_UART1_RX 26 3888cc9fc4SAisheng Dong #define IMX8QM_UART1_RTS_B 27 3988cc9fc4SAisheng Dong #define IMX8QM_UART1_CTS_B 28 4088cc9fc4SAisheng Dong #define IMX8QM_COMP_CTL_GPIO_1V8_3V3_GPIOLH 29 4188cc9fc4SAisheng Dong #define IMX8QM_SCU_PMIC_MEMC_ON 30 4288cc9fc4SAisheng Dong #define IMX8QM_SCU_WDOG_OUT 31 4388cc9fc4SAisheng Dong #define IMX8QM_PMIC_I2C_SDA 32 4488cc9fc4SAisheng Dong #define IMX8QM_PMIC_I2C_SCL 33 4588cc9fc4SAisheng Dong #define IMX8QM_PMIC_EARLY_WARNING 34 4688cc9fc4SAisheng Dong #define IMX8QM_PMIC_INT_B 35 4788cc9fc4SAisheng Dong #define IMX8QM_SCU_GPIO0_00 36 4888cc9fc4SAisheng Dong #define IMX8QM_SCU_GPIO0_01 37 4988cc9fc4SAisheng Dong #define IMX8QM_SCU_GPIO0_02 38 5088cc9fc4SAisheng Dong #define IMX8QM_SCU_GPIO0_03 39 5188cc9fc4SAisheng Dong #define IMX8QM_SCU_GPIO0_04 40 5288cc9fc4SAisheng Dong #define IMX8QM_SCU_GPIO0_05 41 5388cc9fc4SAisheng Dong #define IMX8QM_SCU_GPIO0_06 42 5488cc9fc4SAisheng Dong #define IMX8QM_SCU_GPIO0_07 43 5588cc9fc4SAisheng Dong #define IMX8QM_SCU_BOOT_MODE0 44 5688cc9fc4SAisheng Dong #define IMX8QM_SCU_BOOT_MODE1 45 5788cc9fc4SAisheng Dong #define IMX8QM_SCU_BOOT_MODE2 46 5888cc9fc4SAisheng Dong #define IMX8QM_SCU_BOOT_MODE3 47 5988cc9fc4SAisheng Dong #define IMX8QM_SCU_BOOT_MODE4 48 6088cc9fc4SAisheng Dong #define IMX8QM_SCU_BOOT_MODE5 49 6188cc9fc4SAisheng Dong #define IMX8QM_LVDS0_GPIO00 50 6288cc9fc4SAisheng Dong #define IMX8QM_LVDS0_GPIO01 51 6388cc9fc4SAisheng Dong #define IMX8QM_LVDS0_I2C0_SCL 52 6488cc9fc4SAisheng Dong #define IMX8QM_LVDS0_I2C0_SDA 53 6588cc9fc4SAisheng Dong #define IMX8QM_LVDS0_I2C1_SCL 54 6688cc9fc4SAisheng Dong #define IMX8QM_LVDS0_I2C1_SDA 55 6788cc9fc4SAisheng Dong #define IMX8QM_LVDS1_GPIO00 56 6888cc9fc4SAisheng Dong #define IMX8QM_LVDS1_GPIO01 57 6988cc9fc4SAisheng Dong #define IMX8QM_LVDS1_I2C0_SCL 58 7088cc9fc4SAisheng Dong #define IMX8QM_LVDS1_I2C0_SDA 59 7188cc9fc4SAisheng Dong #define IMX8QM_LVDS1_I2C1_SCL 60 7288cc9fc4SAisheng Dong #define IMX8QM_LVDS1_I2C1_SDA 61 7388cc9fc4SAisheng Dong #define IMX8QM_COMP_CTL_GPIO_1V8_3V3_LVDSGPIO 62 7488cc9fc4SAisheng Dong #define IMX8QM_MIPI_DSI0_I2C0_SCL 63 7588cc9fc4SAisheng Dong #define IMX8QM_MIPI_DSI0_I2C0_SDA 64 7688cc9fc4SAisheng Dong #define IMX8QM_MIPI_DSI0_GPIO0_00 65 7788cc9fc4SAisheng Dong #define IMX8QM_MIPI_DSI0_GPIO0_01 66 7888cc9fc4SAisheng Dong #define IMX8QM_MIPI_DSI1_I2C0_SCL 67 7988cc9fc4SAisheng Dong #define IMX8QM_MIPI_DSI1_I2C0_SDA 68 8088cc9fc4SAisheng Dong #define IMX8QM_MIPI_DSI1_GPIO0_00 69 8188cc9fc4SAisheng Dong #define IMX8QM_MIPI_DSI1_GPIO0_01 70 8288cc9fc4SAisheng Dong #define IMX8QM_COMP_CTL_GPIO_1V8_3V3_MIPIDSIGPIO 71 8388cc9fc4SAisheng Dong #define IMX8QM_MIPI_CSI0_MCLK_OUT 72 8488cc9fc4SAisheng Dong #define IMX8QM_MIPI_CSI0_I2C0_SCL 73 8588cc9fc4SAisheng Dong #define IMX8QM_MIPI_CSI0_I2C0_SDA 74 8688cc9fc4SAisheng Dong #define IMX8QM_MIPI_CSI0_GPIO0_00 75 8788cc9fc4SAisheng Dong #define IMX8QM_MIPI_CSI0_GPIO0_01 76 8888cc9fc4SAisheng Dong #define IMX8QM_MIPI_CSI1_MCLK_OUT 77 8988cc9fc4SAisheng Dong #define IMX8QM_MIPI_CSI1_GPIO0_00 78 9088cc9fc4SAisheng Dong #define IMX8QM_MIPI_CSI1_GPIO0_01 79 9188cc9fc4SAisheng Dong #define IMX8QM_MIPI_CSI1_I2C0_SCL 80 9288cc9fc4SAisheng Dong #define IMX8QM_MIPI_CSI1_I2C0_SDA 81 9388cc9fc4SAisheng Dong #define IMX8QM_HDMI_TX0_TS_SCL 82 9488cc9fc4SAisheng Dong #define IMX8QM_HDMI_TX0_TS_SDA 83 9588cc9fc4SAisheng Dong #define IMX8QM_COMP_CTL_GPIO_3V3_HDMIGPIO 84 9688cc9fc4SAisheng Dong #define IMX8QM_ESAI1_FSR 85 9788cc9fc4SAisheng Dong #define IMX8QM_ESAI1_FST 86 9888cc9fc4SAisheng Dong #define IMX8QM_ESAI1_SCKR 87 9988cc9fc4SAisheng Dong #define IMX8QM_ESAI1_SCKT 88 10088cc9fc4SAisheng Dong #define IMX8QM_ESAI1_TX0 89 10188cc9fc4SAisheng Dong #define IMX8QM_ESAI1_TX1 90 10288cc9fc4SAisheng Dong #define IMX8QM_ESAI1_TX2_RX3 91 10388cc9fc4SAisheng Dong #define IMX8QM_ESAI1_TX3_RX2 92 10488cc9fc4SAisheng Dong #define IMX8QM_ESAI1_TX4_RX1 93 10588cc9fc4SAisheng Dong #define IMX8QM_ESAI1_TX5_RX0 94 10688cc9fc4SAisheng Dong #define IMX8QM_SPDIF0_RX 95 10788cc9fc4SAisheng Dong #define IMX8QM_SPDIF0_TX 96 10888cc9fc4SAisheng Dong #define IMX8QM_SPDIF0_EXT_CLK 97 10988cc9fc4SAisheng Dong #define IMX8QM_SPI3_SCK 98 11088cc9fc4SAisheng Dong #define IMX8QM_SPI3_SDO 99 11188cc9fc4SAisheng Dong #define IMX8QM_SPI3_SDI 100 11288cc9fc4SAisheng Dong #define IMX8QM_SPI3_CS0 101 11388cc9fc4SAisheng Dong #define IMX8QM_SPI3_CS1 102 11488cc9fc4SAisheng Dong #define IMX8QM_COMP_CTL_GPIO_1V8_3V3_GPIORHB 103 11588cc9fc4SAisheng Dong #define IMX8QM_ESAI0_FSR 104 11688cc9fc4SAisheng Dong #define IMX8QM_ESAI0_FST 105 11788cc9fc4SAisheng Dong #define IMX8QM_ESAI0_SCKR 106 11888cc9fc4SAisheng Dong #define IMX8QM_ESAI0_SCKT 107 11988cc9fc4SAisheng Dong #define IMX8QM_ESAI0_TX0 108 12088cc9fc4SAisheng Dong #define IMX8QM_ESAI0_TX1 109 12188cc9fc4SAisheng Dong #define IMX8QM_ESAI0_TX2_RX3 110 12288cc9fc4SAisheng Dong #define IMX8QM_ESAI0_TX3_RX2 111 12388cc9fc4SAisheng Dong #define IMX8QM_ESAI0_TX4_RX1 112 12488cc9fc4SAisheng Dong #define IMX8QM_ESAI0_TX5_RX0 113 12588cc9fc4SAisheng Dong #define IMX8QM_MCLK_IN0 114 12688cc9fc4SAisheng Dong #define IMX8QM_MCLK_OUT0 115 12788cc9fc4SAisheng Dong #define IMX8QM_COMP_CTL_GPIO_1V8_3V3_GPIORHC 116 12888cc9fc4SAisheng Dong #define IMX8QM_SPI0_SCK 117 12988cc9fc4SAisheng Dong #define IMX8QM_SPI0_SDO 118 13088cc9fc4SAisheng Dong #define IMX8QM_SPI0_SDI 119 13188cc9fc4SAisheng Dong #define IMX8QM_SPI0_CS0 120 13288cc9fc4SAisheng Dong #define IMX8QM_SPI0_CS1 121 13388cc9fc4SAisheng Dong #define IMX8QM_SPI2_SCK 122 13488cc9fc4SAisheng Dong #define IMX8QM_SPI2_SDO 123 13588cc9fc4SAisheng Dong #define IMX8QM_SPI2_SDI 124 13688cc9fc4SAisheng Dong #define IMX8QM_SPI2_CS0 125 13788cc9fc4SAisheng Dong #define IMX8QM_SPI2_CS1 126 13888cc9fc4SAisheng Dong #define IMX8QM_SAI1_RXC 127 13988cc9fc4SAisheng Dong #define IMX8QM_SAI1_RXD 128 14088cc9fc4SAisheng Dong #define IMX8QM_SAI1_RXFS 129 14188cc9fc4SAisheng Dong #define IMX8QM_SAI1_TXC 130 14288cc9fc4SAisheng Dong #define IMX8QM_SAI1_TXD 131 14388cc9fc4SAisheng Dong #define IMX8QM_SAI1_TXFS 132 14488cc9fc4SAisheng Dong #define IMX8QM_COMP_CTL_GPIO_1V8_3V3_GPIORHT 133 14588cc9fc4SAisheng Dong #define IMX8QM_ADC_IN7 134 14688cc9fc4SAisheng Dong #define IMX8QM_ADC_IN6 135 14788cc9fc4SAisheng Dong #define IMX8QM_ADC_IN5 136 14888cc9fc4SAisheng Dong #define IMX8QM_ADC_IN4 137 14988cc9fc4SAisheng Dong #define IMX8QM_ADC_IN3 138 15088cc9fc4SAisheng Dong #define IMX8QM_ADC_IN2 139 15188cc9fc4SAisheng Dong #define IMX8QM_ADC_IN1 140 15288cc9fc4SAisheng Dong #define IMX8QM_ADC_IN0 141 15388cc9fc4SAisheng Dong #define IMX8QM_MLB_SIG 142 15488cc9fc4SAisheng Dong #define IMX8QM_MLB_CLK 143 15588cc9fc4SAisheng Dong #define IMX8QM_MLB_DATA 144 15688cc9fc4SAisheng Dong #define IMX8QM_COMP_CTL_GPIO_1V8_3V3_GPIOLHT 145 15788cc9fc4SAisheng Dong #define IMX8QM_FLEXCAN0_RX 146 15888cc9fc4SAisheng Dong #define IMX8QM_FLEXCAN0_TX 147 15988cc9fc4SAisheng Dong #define IMX8QM_FLEXCAN1_RX 148 16088cc9fc4SAisheng Dong #define IMX8QM_FLEXCAN1_TX 149 16188cc9fc4SAisheng Dong #define IMX8QM_FLEXCAN2_RX 150 16288cc9fc4SAisheng Dong #define IMX8QM_FLEXCAN2_TX 151 16388cc9fc4SAisheng Dong #define IMX8QM_COMP_CTL_GPIO_1V8_3V3_GPIOTHR 152 16488cc9fc4SAisheng Dong #define IMX8QM_USB_SS3_TC0 153 16588cc9fc4SAisheng Dong #define IMX8QM_USB_SS3_TC1 154 16688cc9fc4SAisheng Dong #define IMX8QM_USB_SS3_TC2 155 16788cc9fc4SAisheng Dong #define IMX8QM_USB_SS3_TC3 156 16888cc9fc4SAisheng Dong #define IMX8QM_COMP_CTL_GPIO_3V3_USB3IO 157 16988cc9fc4SAisheng Dong #define IMX8QM_USDHC1_RESET_B 158 17088cc9fc4SAisheng Dong #define IMX8QM_USDHC1_VSELECT 159 17188cc9fc4SAisheng Dong #define IMX8QM_USDHC2_RESET_B 160 17288cc9fc4SAisheng Dong #define IMX8QM_USDHC2_VSELECT 161 17388cc9fc4SAisheng Dong #define IMX8QM_USDHC2_WP 162 17488cc9fc4SAisheng Dong #define IMX8QM_USDHC2_CD_B 163 17588cc9fc4SAisheng Dong #define IMX8QM_COMP_CTL_GPIO_1V8_3V3_VSELSEP 164 17688cc9fc4SAisheng Dong #define IMX8QM_ENET0_MDIO 165 17788cc9fc4SAisheng Dong #define IMX8QM_ENET0_MDC 166 17888cc9fc4SAisheng Dong #define IMX8QM_ENET0_REFCLK_125M_25M 167 17988cc9fc4SAisheng Dong #define IMX8QM_ENET1_REFCLK_125M_25M 168 18088cc9fc4SAisheng Dong #define IMX8QM_ENET1_MDIO 169 18188cc9fc4SAisheng Dong #define IMX8QM_ENET1_MDC 170 18288cc9fc4SAisheng Dong #define IMX8QM_COMP_CTL_GPIO_1V8_3V3_GPIOCT 171 18388cc9fc4SAisheng Dong #define IMX8QM_QSPI1A_SS0_B 172 18488cc9fc4SAisheng Dong #define IMX8QM_QSPI1A_SS1_B 173 18588cc9fc4SAisheng Dong #define IMX8QM_QSPI1A_SCLK 174 18688cc9fc4SAisheng Dong #define IMX8QM_QSPI1A_DQS 175 18788cc9fc4SAisheng Dong #define IMX8QM_QSPI1A_DATA3 176 18888cc9fc4SAisheng Dong #define IMX8QM_QSPI1A_DATA2 177 18988cc9fc4SAisheng Dong #define IMX8QM_QSPI1A_DATA1 178 19088cc9fc4SAisheng Dong #define IMX8QM_QSPI1A_DATA0 179 19188cc9fc4SAisheng Dong #define IMX8QM_COMP_CTL_GPIO_1V8_3V3_QSPI1 180 19288cc9fc4SAisheng Dong #define IMX8QM_QSPI0A_DATA0 181 19388cc9fc4SAisheng Dong #define IMX8QM_QSPI0A_DATA1 182 19488cc9fc4SAisheng Dong #define IMX8QM_QSPI0A_DATA2 183 19588cc9fc4SAisheng Dong #define IMX8QM_QSPI0A_DATA3 184 19688cc9fc4SAisheng Dong #define IMX8QM_QSPI0A_DQS 185 19788cc9fc4SAisheng Dong #define IMX8QM_QSPI0A_SS0_B 186 19888cc9fc4SAisheng Dong #define IMX8QM_QSPI0A_SS1_B 187 19988cc9fc4SAisheng Dong #define IMX8QM_QSPI0A_SCLK 188 20088cc9fc4SAisheng Dong #define IMX8QM_QSPI0B_SCLK 189 20188cc9fc4SAisheng Dong #define IMX8QM_QSPI0B_DATA0 190 20288cc9fc4SAisheng Dong #define IMX8QM_QSPI0B_DATA1 191 20388cc9fc4SAisheng Dong #define IMX8QM_QSPI0B_DATA2 192 20488cc9fc4SAisheng Dong #define IMX8QM_QSPI0B_DATA3 193 20588cc9fc4SAisheng Dong #define IMX8QM_QSPI0B_DQS 194 20688cc9fc4SAisheng Dong #define IMX8QM_QSPI0B_SS0_B 195 20788cc9fc4SAisheng Dong #define IMX8QM_QSPI0B_SS1_B 196 20888cc9fc4SAisheng Dong #define IMX8QM_COMP_CTL_GPIO_1V8_3V3_QSPI0 197 20988cc9fc4SAisheng Dong #define IMX8QM_PCIE_CTRL0_CLKREQ_B 198 21088cc9fc4SAisheng Dong #define IMX8QM_PCIE_CTRL0_WAKE_B 199 21188cc9fc4SAisheng Dong #define IMX8QM_PCIE_CTRL0_PERST_B 200 21288cc9fc4SAisheng Dong #define IMX8QM_PCIE_CTRL1_CLKREQ_B 201 21388cc9fc4SAisheng Dong #define IMX8QM_PCIE_CTRL1_WAKE_B 202 21488cc9fc4SAisheng Dong #define IMX8QM_PCIE_CTRL1_PERST_B 203 21588cc9fc4SAisheng Dong #define IMX8QM_COMP_CTL_GPIO_1V8_3V3_PCIESEP 204 21688cc9fc4SAisheng Dong #define IMX8QM_USB_HSIC0_DATA 205 21788cc9fc4SAisheng Dong #define IMX8QM_USB_HSIC0_STROBE 206 21888cc9fc4SAisheng Dong #define IMX8QM_CALIBRATION_0_HSIC 207 21988cc9fc4SAisheng Dong #define IMX8QM_CALIBRATION_1_HSIC 208 22088cc9fc4SAisheng Dong #define IMX8QM_EMMC0_CLK 209 22188cc9fc4SAisheng Dong #define IMX8QM_EMMC0_CMD 210 22288cc9fc4SAisheng Dong #define IMX8QM_EMMC0_DATA0 211 22388cc9fc4SAisheng Dong #define IMX8QM_EMMC0_DATA1 212 22488cc9fc4SAisheng Dong #define IMX8QM_EMMC0_DATA2 213 22588cc9fc4SAisheng Dong #define IMX8QM_EMMC0_DATA3 214 22688cc9fc4SAisheng Dong #define IMX8QM_EMMC0_DATA4 215 22788cc9fc4SAisheng Dong #define IMX8QM_EMMC0_DATA5 216 22888cc9fc4SAisheng Dong #define IMX8QM_EMMC0_DATA6 217 22988cc9fc4SAisheng Dong #define IMX8QM_EMMC0_DATA7 218 23088cc9fc4SAisheng Dong #define IMX8QM_EMMC0_STROBE 219 23188cc9fc4SAisheng Dong #define IMX8QM_EMMC0_RESET_B 220 23288cc9fc4SAisheng Dong #define IMX8QM_COMP_CTL_GPIO_1V8_3V3_SD1FIX 221 23388cc9fc4SAisheng Dong #define IMX8QM_USDHC1_CLK 222 23488cc9fc4SAisheng Dong #define IMX8QM_USDHC1_CMD 223 23588cc9fc4SAisheng Dong #define IMX8QM_USDHC1_DATA0 224 23688cc9fc4SAisheng Dong #define IMX8QM_USDHC1_DATA1 225 23788cc9fc4SAisheng Dong #define IMX8QM_CTL_NAND_RE_P_N 226 23888cc9fc4SAisheng Dong #define IMX8QM_USDHC1_DATA2 227 23988cc9fc4SAisheng Dong #define IMX8QM_USDHC1_DATA3 228 24088cc9fc4SAisheng Dong #define IMX8QM_CTL_NAND_DQS_P_N 229 24188cc9fc4SAisheng Dong #define IMX8QM_USDHC1_DATA4 230 24288cc9fc4SAisheng Dong #define IMX8QM_USDHC1_DATA5 231 24388cc9fc4SAisheng Dong #define IMX8QM_USDHC1_DATA6 232 24488cc9fc4SAisheng Dong #define IMX8QM_USDHC1_DATA7 233 24588cc9fc4SAisheng Dong #define IMX8QM_USDHC1_STROBE 234 24688cc9fc4SAisheng Dong #define IMX8QM_COMP_CTL_GPIO_1V8_3V3_VSEL2 235 24788cc9fc4SAisheng Dong #define IMX8QM_USDHC2_CLK 236 24888cc9fc4SAisheng Dong #define IMX8QM_USDHC2_CMD 237 24988cc9fc4SAisheng Dong #define IMX8QM_USDHC2_DATA0 238 25088cc9fc4SAisheng Dong #define IMX8QM_USDHC2_DATA1 239 25188cc9fc4SAisheng Dong #define IMX8QM_USDHC2_DATA2 240 25288cc9fc4SAisheng Dong #define IMX8QM_USDHC2_DATA3 241 25388cc9fc4SAisheng Dong #define IMX8QM_COMP_CTL_GPIO_1V8_3V3_VSEL3 242 25488cc9fc4SAisheng Dong #define IMX8QM_ENET0_RGMII_TXC 243 25588cc9fc4SAisheng Dong #define IMX8QM_ENET0_RGMII_TX_CTL 244 25688cc9fc4SAisheng Dong #define IMX8QM_ENET0_RGMII_TXD0 245 25788cc9fc4SAisheng Dong #define IMX8QM_ENET0_RGMII_TXD1 246 25888cc9fc4SAisheng Dong #define IMX8QM_ENET0_RGMII_TXD2 247 25988cc9fc4SAisheng Dong #define IMX8QM_ENET0_RGMII_TXD3 248 26088cc9fc4SAisheng Dong #define IMX8QM_ENET0_RGMII_RXC 249 26188cc9fc4SAisheng Dong #define IMX8QM_ENET0_RGMII_RX_CTL 250 26288cc9fc4SAisheng Dong #define IMX8QM_ENET0_RGMII_RXD0 251 26388cc9fc4SAisheng Dong #define IMX8QM_ENET0_RGMII_RXD1 252 26488cc9fc4SAisheng Dong #define IMX8QM_ENET0_RGMII_RXD2 253 26588cc9fc4SAisheng Dong #define IMX8QM_ENET0_RGMII_RXD3 254 26688cc9fc4SAisheng Dong #define IMX8QM_COMP_CTL_GPIO_1V8_3V3_ENET_ENETB 255 26788cc9fc4SAisheng Dong #define IMX8QM_ENET1_RGMII_TXC 256 26888cc9fc4SAisheng Dong #define IMX8QM_ENET1_RGMII_TX_CTL 257 26988cc9fc4SAisheng Dong #define IMX8QM_ENET1_RGMII_TXD0 258 27088cc9fc4SAisheng Dong #define IMX8QM_ENET1_RGMII_TXD1 259 27188cc9fc4SAisheng Dong #define IMX8QM_ENET1_RGMII_TXD2 260 27288cc9fc4SAisheng Dong #define IMX8QM_ENET1_RGMII_TXD3 261 27388cc9fc4SAisheng Dong #define IMX8QM_ENET1_RGMII_RXC 262 27488cc9fc4SAisheng Dong #define IMX8QM_ENET1_RGMII_RX_CTL 263 27588cc9fc4SAisheng Dong #define IMX8QM_ENET1_RGMII_RXD0 264 27688cc9fc4SAisheng Dong #define IMX8QM_ENET1_RGMII_RXD1 265 27788cc9fc4SAisheng Dong #define IMX8QM_ENET1_RGMII_RXD2 266 27888cc9fc4SAisheng Dong #define IMX8QM_ENET1_RGMII_RXD3 267 27988cc9fc4SAisheng Dong #define IMX8QM_COMP_CTL_GPIO_1V8_3V3_ENET_ENETA 268 28088cc9fc4SAisheng Dong 28188cc9fc4SAisheng Dong /* 28288cc9fc4SAisheng Dong * format: <pin_id mux_mode> 28388cc9fc4SAisheng Dong */ 28488cc9fc4SAisheng Dong #define IMX8QM_SIM0_CLK_DMA_SIM0_CLK IMX8QM_SIM0_CLK 0 28588cc9fc4SAisheng Dong #define IMX8QM_SIM0_CLK_LSIO_GPIO0_IO00 IMX8QM_SIM0_CLK 3 28688cc9fc4SAisheng Dong #define IMX8QM_SIM0_RST_DMA_SIM0_RST IMX8QM_SIM0_RST 0 28788cc9fc4SAisheng Dong #define IMX8QM_SIM0_RST_LSIO_GPIO0_IO01 IMX8QM_SIM0_RST 3 28888cc9fc4SAisheng Dong #define IMX8QM_SIM0_IO_DMA_SIM0_IO IMX8QM_SIM0_IO 0 28988cc9fc4SAisheng Dong #define IMX8QM_SIM0_IO_LSIO_GPIO0_IO02 IMX8QM_SIM0_IO 3 29088cc9fc4SAisheng Dong #define IMX8QM_SIM0_PD_DMA_SIM0_PD IMX8QM_SIM0_PD 0 29188cc9fc4SAisheng Dong #define IMX8QM_SIM0_PD_DMA_I2C3_SCL IMX8QM_SIM0_PD 1 29288cc9fc4SAisheng Dong #define IMX8QM_SIM0_PD_LSIO_GPIO0_IO03 IMX8QM_SIM0_PD 3 29388cc9fc4SAisheng Dong #define IMX8QM_SIM0_POWER_EN_DMA_SIM0_POWER_EN IMX8QM_SIM0_POWER_EN 0 29488cc9fc4SAisheng Dong #define IMX8QM_SIM0_POWER_EN_DMA_I2C3_SDA IMX8QM_SIM0_POWER_EN 1 29588cc9fc4SAisheng Dong #define IMX8QM_SIM0_POWER_EN_LSIO_GPIO0_IO04 IMX8QM_SIM0_POWER_EN 3 29688cc9fc4SAisheng Dong #define IMX8QM_SIM0_GPIO0_00_DMA_SIM0_POWER_EN IMX8QM_SIM0_GPIO0_00 0 29788cc9fc4SAisheng Dong #define IMX8QM_SIM0_GPIO0_00_LSIO_GPIO0_IO05 IMX8QM_SIM0_GPIO0_00 3 29888cc9fc4SAisheng Dong #define IMX8QM_M40_I2C0_SCL_M40_I2C0_SCL IMX8QM_M40_I2C0_SCL 0 29988cc9fc4SAisheng Dong #define IMX8QM_M40_I2C0_SCL_M40_UART0_RX IMX8QM_M40_I2C0_SCL 1 30088cc9fc4SAisheng Dong #define IMX8QM_M40_I2C0_SCL_M40_GPIO0_IO02 IMX8QM_M40_I2C0_SCL 2 30188cc9fc4SAisheng Dong #define IMX8QM_M40_I2C0_SCL_LSIO_GPIO0_IO06 IMX8QM_M40_I2C0_SCL 3 30288cc9fc4SAisheng Dong #define IMX8QM_M40_I2C0_SDA_M40_I2C0_SDA IMX8QM_M40_I2C0_SDA 0 30388cc9fc4SAisheng Dong #define IMX8QM_M40_I2C0_SDA_M40_UART0_TX IMX8QM_M40_I2C0_SDA 1 30488cc9fc4SAisheng Dong #define IMX8QM_M40_I2C0_SDA_M40_GPIO0_IO03 IMX8QM_M40_I2C0_SDA 2 30588cc9fc4SAisheng Dong #define IMX8QM_M40_I2C0_SDA_LSIO_GPIO0_IO07 IMX8QM_M40_I2C0_SDA 3 30688cc9fc4SAisheng Dong #define IMX8QM_M40_GPIO0_00_M40_GPIO0_IO00 IMX8QM_M40_GPIO0_00 0 30788cc9fc4SAisheng Dong #define IMX8QM_M40_GPIO0_00_M40_TPM0_CH0 IMX8QM_M40_GPIO0_00 1 30888cc9fc4SAisheng Dong #define IMX8QM_M40_GPIO0_00_DMA_UART4_RX IMX8QM_M40_GPIO0_00 2 30988cc9fc4SAisheng Dong #define IMX8QM_M40_GPIO0_00_LSIO_GPIO0_IO08 IMX8QM_M40_GPIO0_00 3 31088cc9fc4SAisheng Dong #define IMX8QM_M40_GPIO0_01_M40_GPIO0_IO01 IMX8QM_M40_GPIO0_01 0 31188cc9fc4SAisheng Dong #define IMX8QM_M40_GPIO0_01_M40_TPM0_CH1 IMX8QM_M40_GPIO0_01 1 31288cc9fc4SAisheng Dong #define IMX8QM_M40_GPIO0_01_DMA_UART4_TX IMX8QM_M40_GPIO0_01 2 31388cc9fc4SAisheng Dong #define IMX8QM_M40_GPIO0_01_LSIO_GPIO0_IO09 IMX8QM_M40_GPIO0_01 3 31488cc9fc4SAisheng Dong #define IMX8QM_M41_I2C0_SCL_M41_I2C0_SCL IMX8QM_M41_I2C0_SCL 0 31588cc9fc4SAisheng Dong #define IMX8QM_M41_I2C0_SCL_M41_UART0_RX IMX8QM_M41_I2C0_SCL 1 31688cc9fc4SAisheng Dong #define IMX8QM_M41_I2C0_SCL_M41_GPIO0_IO02 IMX8QM_M41_I2C0_SCL 2 31788cc9fc4SAisheng Dong #define IMX8QM_M41_I2C0_SCL_LSIO_GPIO0_IO10 IMX8QM_M41_I2C0_SCL 3 31888cc9fc4SAisheng Dong #define IMX8QM_M41_I2C0_SDA_M41_I2C0_SDA IMX8QM_M41_I2C0_SDA 0 31988cc9fc4SAisheng Dong #define IMX8QM_M41_I2C0_SDA_M41_UART0_TX IMX8QM_M41_I2C0_SDA 1 32088cc9fc4SAisheng Dong #define IMX8QM_M41_I2C0_SDA_M41_GPIO0_IO03 IMX8QM_M41_I2C0_SDA 2 32188cc9fc4SAisheng Dong #define IMX8QM_M41_I2C0_SDA_LSIO_GPIO0_IO11 IMX8QM_M41_I2C0_SDA 3 32288cc9fc4SAisheng Dong #define IMX8QM_M41_GPIO0_00_M41_GPIO0_IO00 IMX8QM_M41_GPIO0_00 0 32388cc9fc4SAisheng Dong #define IMX8QM_M41_GPIO0_00_M41_TPM0_CH0 IMX8QM_M41_GPIO0_00 1 32488cc9fc4SAisheng Dong #define IMX8QM_M41_GPIO0_00_DMA_UART3_RX IMX8QM_M41_GPIO0_00 2 32588cc9fc4SAisheng Dong #define IMX8QM_M41_GPIO0_00_LSIO_GPIO0_IO12 IMX8QM_M41_GPIO0_00 3 32688cc9fc4SAisheng Dong #define IMX8QM_M41_GPIO0_01_M41_GPIO0_IO01 IMX8QM_M41_GPIO0_01 0 32788cc9fc4SAisheng Dong #define IMX8QM_M41_GPIO0_01_M41_TPM0_CH1 IMX8QM_M41_GPIO0_01 1 32888cc9fc4SAisheng Dong #define IMX8QM_M41_GPIO0_01_DMA_UART3_TX IMX8QM_M41_GPIO0_01 2 32988cc9fc4SAisheng Dong #define IMX8QM_M41_GPIO0_01_LSIO_GPIO0_IO13 IMX8QM_M41_GPIO0_01 3 33088cc9fc4SAisheng Dong #define IMX8QM_GPT0_CLK_LSIO_GPT0_CLK IMX8QM_GPT0_CLK 0 33188cc9fc4SAisheng Dong #define IMX8QM_GPT0_CLK_DMA_I2C1_SCL IMX8QM_GPT0_CLK 1 33288cc9fc4SAisheng Dong #define IMX8QM_GPT0_CLK_LSIO_KPP0_COL4 IMX8QM_GPT0_CLK 2 33388cc9fc4SAisheng Dong #define IMX8QM_GPT0_CLK_LSIO_GPIO0_IO14 IMX8QM_GPT0_CLK 3 33488cc9fc4SAisheng Dong #define IMX8QM_GPT0_CAPTURE_LSIO_GPT0_CAPTURE IMX8QM_GPT0_CAPTURE 0 33588cc9fc4SAisheng Dong #define IMX8QM_GPT0_CAPTURE_DMA_I2C1_SDA IMX8QM_GPT0_CAPTURE 1 33688cc9fc4SAisheng Dong #define IMX8QM_GPT0_CAPTURE_LSIO_KPP0_COL5 IMX8QM_GPT0_CAPTURE 2 33788cc9fc4SAisheng Dong #define IMX8QM_GPT0_CAPTURE_LSIO_GPIO0_IO15 IMX8QM_GPT0_CAPTURE 3 33888cc9fc4SAisheng Dong #define IMX8QM_GPT0_COMPARE_LSIO_GPT0_COMPARE IMX8QM_GPT0_COMPARE 0 33988cc9fc4SAisheng Dong #define IMX8QM_GPT0_COMPARE_LSIO_PWM3_OUT IMX8QM_GPT0_COMPARE 1 34088cc9fc4SAisheng Dong #define IMX8QM_GPT0_COMPARE_LSIO_KPP0_COL6 IMX8QM_GPT0_COMPARE 2 34188cc9fc4SAisheng Dong #define IMX8QM_GPT0_COMPARE_LSIO_GPIO0_IO16 IMX8QM_GPT0_COMPARE 3 34288cc9fc4SAisheng Dong #define IMX8QM_GPT1_CLK_LSIO_GPT1_CLK IMX8QM_GPT1_CLK 0 34388cc9fc4SAisheng Dong #define IMX8QM_GPT1_CLK_DMA_I2C2_SCL IMX8QM_GPT1_CLK 1 34488cc9fc4SAisheng Dong #define IMX8QM_GPT1_CLK_LSIO_KPP0_COL7 IMX8QM_GPT1_CLK 2 34588cc9fc4SAisheng Dong #define IMX8QM_GPT1_CLK_LSIO_GPIO0_IO17 IMX8QM_GPT1_CLK 3 34688cc9fc4SAisheng Dong #define IMX8QM_GPT1_CAPTURE_LSIO_GPT1_CAPTURE IMX8QM_GPT1_CAPTURE 0 34788cc9fc4SAisheng Dong #define IMX8QM_GPT1_CAPTURE_DMA_I2C2_SDA IMX8QM_GPT1_CAPTURE 1 34888cc9fc4SAisheng Dong #define IMX8QM_GPT1_CAPTURE_LSIO_KPP0_ROW4 IMX8QM_GPT1_CAPTURE 2 34988cc9fc4SAisheng Dong #define IMX8QM_GPT1_CAPTURE_LSIO_GPIO0_IO18 IMX8QM_GPT1_CAPTURE 3 35088cc9fc4SAisheng Dong #define IMX8QM_GPT1_COMPARE_LSIO_GPT1_COMPARE IMX8QM_GPT1_COMPARE 0 35188cc9fc4SAisheng Dong #define IMX8QM_GPT1_COMPARE_LSIO_PWM2_OUT IMX8QM_GPT1_COMPARE 1 35288cc9fc4SAisheng Dong #define IMX8QM_GPT1_COMPARE_LSIO_KPP0_ROW5 IMX8QM_GPT1_COMPARE 2 35388cc9fc4SAisheng Dong #define IMX8QM_GPT1_COMPARE_LSIO_GPIO0_IO19 IMX8QM_GPT1_COMPARE 3 35488cc9fc4SAisheng Dong #define IMX8QM_UART0_RX_DMA_UART0_RX IMX8QM_UART0_RX 0 35588cc9fc4SAisheng Dong #define IMX8QM_UART0_RX_SCU_UART0_RX IMX8QM_UART0_RX 1 35688cc9fc4SAisheng Dong #define IMX8QM_UART0_RX_LSIO_GPIO0_IO20 IMX8QM_UART0_RX 3 35788cc9fc4SAisheng Dong #define IMX8QM_UART0_TX_DMA_UART0_TX IMX8QM_UART0_TX 0 35888cc9fc4SAisheng Dong #define IMX8QM_UART0_TX_SCU_UART0_TX IMX8QM_UART0_TX 1 35988cc9fc4SAisheng Dong #define IMX8QM_UART0_TX_LSIO_GPIO0_IO21 IMX8QM_UART0_TX 3 36088cc9fc4SAisheng Dong #define IMX8QM_UART0_RTS_B_DMA_UART0_RTS_B IMX8QM_UART0_RTS_B 0 36188cc9fc4SAisheng Dong #define IMX8QM_UART0_RTS_B_LSIO_PWM0_OUT IMX8QM_UART0_RTS_B 1 36288cc9fc4SAisheng Dong #define IMX8QM_UART0_RTS_B_DMA_UART2_RX IMX8QM_UART0_RTS_B 2 36388cc9fc4SAisheng Dong #define IMX8QM_UART0_RTS_B_LSIO_GPIO0_IO22 IMX8QM_UART0_RTS_B 3 36488cc9fc4SAisheng Dong #define IMX8QM_UART0_CTS_B_DMA_UART0_CTS_B IMX8QM_UART0_CTS_B 0 36588cc9fc4SAisheng Dong #define IMX8QM_UART0_CTS_B_LSIO_PWM1_OUT IMX8QM_UART0_CTS_B 1 36688cc9fc4SAisheng Dong #define IMX8QM_UART0_CTS_B_DMA_UART2_TX IMX8QM_UART0_CTS_B 2 36788cc9fc4SAisheng Dong #define IMX8QM_UART0_CTS_B_LSIO_GPIO0_IO23 IMX8QM_UART0_CTS_B 3 36888cc9fc4SAisheng Dong #define IMX8QM_UART1_TX_DMA_UART1_TX IMX8QM_UART1_TX 0 36988cc9fc4SAisheng Dong #define IMX8QM_UART1_TX_DMA_SPI3_SCK IMX8QM_UART1_TX 1 37088cc9fc4SAisheng Dong #define IMX8QM_UART1_TX_LSIO_GPIO0_IO24 IMX8QM_UART1_TX 3 37188cc9fc4SAisheng Dong #define IMX8QM_UART1_RX_DMA_UART1_RX IMX8QM_UART1_RX 0 37288cc9fc4SAisheng Dong #define IMX8QM_UART1_RX_DMA_SPI3_SDO IMX8QM_UART1_RX 1 37388cc9fc4SAisheng Dong #define IMX8QM_UART1_RX_LSIO_GPIO0_IO25 IMX8QM_UART1_RX 3 37488cc9fc4SAisheng Dong #define IMX8QM_UART1_RTS_B_DMA_UART1_RTS_B IMX8QM_UART1_RTS_B 0 37588cc9fc4SAisheng Dong #define IMX8QM_UART1_RTS_B_DMA_SPI3_SDI IMX8QM_UART1_RTS_B 1 37688cc9fc4SAisheng Dong #define IMX8QM_UART1_RTS_B_DMA_UART1_CTS_B IMX8QM_UART1_RTS_B 2 37788cc9fc4SAisheng Dong #define IMX8QM_UART1_RTS_B_LSIO_GPIO0_IO26 IMX8QM_UART1_RTS_B 3 37888cc9fc4SAisheng Dong #define IMX8QM_UART1_CTS_B_DMA_UART1_CTS_B IMX8QM_UART1_CTS_B 0 37988cc9fc4SAisheng Dong #define IMX8QM_UART1_CTS_B_DMA_SPI3_CS0 IMX8QM_UART1_CTS_B 1 38088cc9fc4SAisheng Dong #define IMX8QM_UART1_CTS_B_DMA_UART1_RTS_B IMX8QM_UART1_CTS_B 2 38188cc9fc4SAisheng Dong #define IMX8QM_UART1_CTS_B_LSIO_GPIO0_IO27 IMX8QM_UART1_CTS_B 3 38288cc9fc4SAisheng Dong #define IMX8QM_SCU_PMIC_MEMC_ON_SCU_GPIO0_IOXX_PMIC_MEMC_ON IMX8QM_SCU_PMIC_MEMC_ON 0 38388cc9fc4SAisheng Dong #define IMX8QM_SCU_WDOG_OUT_SCU_WDOG0_WDOG_OUT IMX8QM_SCU_WDOG_OUT 0 38488cc9fc4SAisheng Dong #define IMX8QM_PMIC_I2C_SDA_SCU_PMIC_I2C_SDA IMX8QM_PMIC_I2C_SDA 0 38588cc9fc4SAisheng Dong #define IMX8QM_PMIC_I2C_SCL_SCU_PMIC_I2C_SCL IMX8QM_PMIC_I2C_SCL 0 38688cc9fc4SAisheng Dong #define IMX8QM_PMIC_EARLY_WARNING_SCU_PMIC_EARLY_WARNING IMX8QM_PMIC_EARLY_WARNING 0 38788cc9fc4SAisheng Dong #define IMX8QM_PMIC_INT_B_SCU_DIMX8QMMIC_INT_B IMX8QM_PMIC_INT_B 0 38888cc9fc4SAisheng Dong #define IMX8QM_SCU_GPIO0_00_SCU_GPIO0_IO00 IMX8QM_SCU_GPIO0_00 0 38988cc9fc4SAisheng Dong #define IMX8QM_SCU_GPIO0_00_SCU_UART0_RX IMX8QM_SCU_GPIO0_00 1 39088cc9fc4SAisheng Dong #define IMX8QM_SCU_GPIO0_00_LSIO_GPIO0_IO28 IMX8QM_SCU_GPIO0_00 3 39188cc9fc4SAisheng Dong #define IMX8QM_SCU_GPIO0_01_SCU_GPIO0_IO01 IMX8QM_SCU_GPIO0_01 0 39288cc9fc4SAisheng Dong #define IMX8QM_SCU_GPIO0_01_SCU_UART0_TX IMX8QM_SCU_GPIO0_01 1 39388cc9fc4SAisheng Dong #define IMX8QM_SCU_GPIO0_01_LSIO_GPIO0_IO29 IMX8QM_SCU_GPIO0_01 3 39488cc9fc4SAisheng Dong #define IMX8QM_SCU_GPIO0_02_SCU_GPIO0_IO02 IMX8QM_SCU_GPIO0_02 0 39588cc9fc4SAisheng Dong #define IMX8QM_SCU_GPIO0_02_SCU_GPIO0_IOXX_PMIC_GPU0_ON IMX8QM_SCU_GPIO0_02 1 39688cc9fc4SAisheng Dong #define IMX8QM_SCU_GPIO0_02_LSIO_GPIO0_IO30 IMX8QM_SCU_GPIO0_02 3 39788cc9fc4SAisheng Dong #define IMX8QM_SCU_GPIO0_03_SCU_GPIO0_IO03 IMX8QM_SCU_GPIO0_03 0 39888cc9fc4SAisheng Dong #define IMX8QM_SCU_GPIO0_03_SCU_GPIO0_IOXX_PMIC_GPU1_ON IMX8QM_SCU_GPIO0_03 1 39988cc9fc4SAisheng Dong #define IMX8QM_SCU_GPIO0_03_LSIO_GPIO0_IO31 IMX8QM_SCU_GPIO0_03 3 40088cc9fc4SAisheng Dong #define IMX8QM_SCU_GPIO0_04_SCU_GPIO0_IO04 IMX8QM_SCU_GPIO0_04 0 40188cc9fc4SAisheng Dong #define IMX8QM_SCU_GPIO0_04_SCU_GPIO0_IOXX_PMIC_A72_ON IMX8QM_SCU_GPIO0_04 1 40288cc9fc4SAisheng Dong #define IMX8QM_SCU_GPIO0_04_LSIO_GPIO1_IO00 IMX8QM_SCU_GPIO0_04 3 40388cc9fc4SAisheng Dong #define IMX8QM_SCU_GPIO0_05_SCU_GPIO0_IO05 IMX8QM_SCU_GPIO0_05 0 40488cc9fc4SAisheng Dong #define IMX8QM_SCU_GPIO0_05_SCU_GPIO0_IOXX_PMIC_A53_ON IMX8QM_SCU_GPIO0_05 1 40588cc9fc4SAisheng Dong #define IMX8QM_SCU_GPIO0_05_LSIO_GPIO1_IO01 IMX8QM_SCU_GPIO0_05 3 40688cc9fc4SAisheng Dong #define IMX8QM_SCU_GPIO0_06_SCU_GPIO0_IO06 IMX8QM_SCU_GPIO0_06 0 40788cc9fc4SAisheng Dong #define IMX8QM_SCU_GPIO0_06_SCU_TPM0_CH0 IMX8QM_SCU_GPIO0_06 1 40888cc9fc4SAisheng Dong #define IMX8QM_SCU_GPIO0_06_LSIO_GPIO1_IO02 IMX8QM_SCU_GPIO0_06 3 40988cc9fc4SAisheng Dong #define IMX8QM_SCU_GPIO0_07_SCU_GPIO0_IO07 IMX8QM_SCU_GPIO0_07 0 41088cc9fc4SAisheng Dong #define IMX8QM_SCU_GPIO0_07_SCU_TPM0_CH1 IMX8QM_SCU_GPIO0_07 1 41188cc9fc4SAisheng Dong #define IMX8QM_SCU_GPIO0_07_SCU_DSC_RTC_CLOCK_OUTPUT_32K IMX8QM_SCU_GPIO0_07 2 41288cc9fc4SAisheng Dong #define IMX8QM_SCU_GPIO0_07_LSIO_GPIO1_IO03 IMX8QM_SCU_GPIO0_07 3 41388cc9fc4SAisheng Dong #define IMX8QM_SCU_BOOT_MODE0_SCU_DSC_BOOT_MODE0 IMX8QM_SCU_BOOT_MODE0 0 41488cc9fc4SAisheng Dong #define IMX8QM_SCU_BOOT_MODE1_SCU_DSC_BOOT_MODE1 IMX8QM_SCU_BOOT_MODE1 0 41588cc9fc4SAisheng Dong #define IMX8QM_SCU_BOOT_MODE2_SCU_DSC_BOOT_MODE2 IMX8QM_SCU_BOOT_MODE2 0 41688cc9fc4SAisheng Dong #define IMX8QM_SCU_BOOT_MODE3_SCU_DSC_BOOT_MODE3 IMX8QM_SCU_BOOT_MODE3 0 41788cc9fc4SAisheng Dong #define IMX8QM_SCU_BOOT_MODE4_SCU_DSC_BOOT_MODE4 IMX8QM_SCU_BOOT_MODE4 0 41888cc9fc4SAisheng Dong #define IMX8QM_SCU_BOOT_MODE4_SCU_PMIC_I2C_SCL IMX8QM_SCU_BOOT_MODE4 1 41988cc9fc4SAisheng Dong #define IMX8QM_SCU_BOOT_MODE5_SCU_DSC_BOOT_MODE5 IMX8QM_SCU_BOOT_MODE5 0 42088cc9fc4SAisheng Dong #define IMX8QM_SCU_BOOT_MODE5_SCU_PMIC_I2C_SDA IMX8QM_SCU_BOOT_MODE5 1 42188cc9fc4SAisheng Dong #define IMX8QM_LVDS0_GPIO00_LVDS0_GPIO0_IO00 IMX8QM_LVDS0_GPIO00 0 42288cc9fc4SAisheng Dong #define IMX8QM_LVDS0_GPIO00_LVDS0_PWM0_OUT IMX8QM_LVDS0_GPIO00 1 42388cc9fc4SAisheng Dong #define IMX8QM_LVDS0_GPIO00_LSIO_GPIO1_IO04 IMX8QM_LVDS0_GPIO00 3 42488cc9fc4SAisheng Dong #define IMX8QM_LVDS0_GPIO01_LVDS0_GPIO0_IO01 IMX8QM_LVDS0_GPIO01 0 42588cc9fc4SAisheng Dong #define IMX8QM_LVDS0_GPIO01_LSIO_GPIO1_IO05 IMX8QM_LVDS0_GPIO01 3 42688cc9fc4SAisheng Dong #define IMX8QM_LVDS0_I2C0_SCL_LVDS0_I2C0_SCL IMX8QM_LVDS0_I2C0_SCL 0 42788cc9fc4SAisheng Dong #define IMX8QM_LVDS0_I2C0_SCL_LVDS0_GPIO0_IO02 IMX8QM_LVDS0_I2C0_SCL 1 42888cc9fc4SAisheng Dong #define IMX8QM_LVDS0_I2C0_SCL_LSIO_GPIO1_IO06 IMX8QM_LVDS0_I2C0_SCL 3 42988cc9fc4SAisheng Dong #define IMX8QM_LVDS0_I2C0_SDA_LVDS0_I2C0_SDA IMX8QM_LVDS0_I2C0_SDA 0 43088cc9fc4SAisheng Dong #define IMX8QM_LVDS0_I2C0_SDA_LVDS0_GPIO0_IO03 IMX8QM_LVDS0_I2C0_SDA 1 43188cc9fc4SAisheng Dong #define IMX8QM_LVDS0_I2C0_SDA_LSIO_GPIO1_IO07 IMX8QM_LVDS0_I2C0_SDA 3 43288cc9fc4SAisheng Dong #define IMX8QM_LVDS0_I2C1_SCL_LVDS0_I2C1_SCL IMX8QM_LVDS0_I2C1_SCL 0 43388cc9fc4SAisheng Dong #define IMX8QM_LVDS0_I2C1_SCL_DMA_UART2_TX IMX8QM_LVDS0_I2C1_SCL 1 43488cc9fc4SAisheng Dong #define IMX8QM_LVDS0_I2C1_SCL_LSIO_GPIO1_IO08 IMX8QM_LVDS0_I2C1_SCL 3 43588cc9fc4SAisheng Dong #define IMX8QM_LVDS0_I2C1_SDA_LVDS0_I2C1_SDA IMX8QM_LVDS0_I2C1_SDA 0 43688cc9fc4SAisheng Dong #define IMX8QM_LVDS0_I2C1_SDA_DMA_UART2_RX IMX8QM_LVDS0_I2C1_SDA 1 43788cc9fc4SAisheng Dong #define IMX8QM_LVDS0_I2C1_SDA_LSIO_GPIO1_IO09 IMX8QM_LVDS0_I2C1_SDA 3 43888cc9fc4SAisheng Dong #define IMX8QM_LVDS1_GPIO00_LVDS1_GPIO0_IO00 IMX8QM_LVDS1_GPIO00 0 43988cc9fc4SAisheng Dong #define IMX8QM_LVDS1_GPIO00_LVDS1_PWM0_OUT IMX8QM_LVDS1_GPIO00 1 44088cc9fc4SAisheng Dong #define IMX8QM_LVDS1_GPIO00_LSIO_GPIO1_IO10 IMX8QM_LVDS1_GPIO00 3 44188cc9fc4SAisheng Dong #define IMX8QM_LVDS1_GPIO01_LVDS1_GPIO0_IO01 IMX8QM_LVDS1_GPIO01 0 44288cc9fc4SAisheng Dong #define IMX8QM_LVDS1_GPIO01_LSIO_GPIO1_IO11 IMX8QM_LVDS1_GPIO01 3 44388cc9fc4SAisheng Dong #define IMX8QM_LVDS1_I2C0_SCL_LVDS1_I2C0_SCL IMX8QM_LVDS1_I2C0_SCL 0 44488cc9fc4SAisheng Dong #define IMX8QM_LVDS1_I2C0_SCL_LVDS1_GPIO0_IO02 IMX8QM_LVDS1_I2C0_SCL 1 44588cc9fc4SAisheng Dong #define IMX8QM_LVDS1_I2C0_SCL_LSIO_GPIO1_IO12 IMX8QM_LVDS1_I2C0_SCL 3 44688cc9fc4SAisheng Dong #define IMX8QM_LVDS1_I2C0_SDA_LVDS1_I2C0_SDA IMX8QM_LVDS1_I2C0_SDA 0 44788cc9fc4SAisheng Dong #define IMX8QM_LVDS1_I2C0_SDA_LVDS1_GPIO0_IO03 IMX8QM_LVDS1_I2C0_SDA 1 44888cc9fc4SAisheng Dong #define IMX8QM_LVDS1_I2C0_SDA_LSIO_GPIO1_IO13 IMX8QM_LVDS1_I2C0_SDA 3 44988cc9fc4SAisheng Dong #define IMX8QM_LVDS1_I2C1_SCL_LVDS1_I2C1_SCL IMX8QM_LVDS1_I2C1_SCL 0 45088cc9fc4SAisheng Dong #define IMX8QM_LVDS1_I2C1_SCL_DMA_UART3_TX IMX8QM_LVDS1_I2C1_SCL 1 45188cc9fc4SAisheng Dong #define IMX8QM_LVDS1_I2C1_SCL_LSIO_GPIO1_IO14 IMX8QM_LVDS1_I2C1_SCL 3 45288cc9fc4SAisheng Dong #define IMX8QM_LVDS1_I2C1_SDA_LVDS1_I2C1_SDA IMX8QM_LVDS1_I2C1_SDA 0 45388cc9fc4SAisheng Dong #define IMX8QM_LVDS1_I2C1_SDA_DMA_UART3_RX IMX8QM_LVDS1_I2C1_SDA 1 45488cc9fc4SAisheng Dong #define IMX8QM_LVDS1_I2C1_SDA_LSIO_GPIO1_IO15 IMX8QM_LVDS1_I2C1_SDA 3 45588cc9fc4SAisheng Dong #define IMX8QM_MIPI_DSI0_I2C0_SCL_MIPI_DSI0_I2C0_SCL IMX8QM_MIPI_DSI0_I2C0_SCL 0 45688cc9fc4SAisheng Dong #define IMX8QM_MIPI_DSI0_I2C0_SCL_LSIO_GPIO1_IO16 IMX8QM_MIPI_DSI0_I2C0_SCL 3 45788cc9fc4SAisheng Dong #define IMX8QM_MIPI_DSI0_I2C0_SDA_MIPI_DSI0_I2C0_SDA IMX8QM_MIPI_DSI0_I2C0_SDA 0 45888cc9fc4SAisheng Dong #define IMX8QM_MIPI_DSI0_I2C0_SDA_LSIO_GPIO1_IO17 IMX8QM_MIPI_DSI0_I2C0_SDA 3 45988cc9fc4SAisheng Dong #define IMX8QM_MIPI_DSI0_GPIO0_00_MIPI_DSI0_GPIO0_IO00 IMX8QM_MIPI_DSI0_GPIO0_00 0 46088cc9fc4SAisheng Dong #define IMX8QM_MIPI_DSI0_GPIO0_00_MIPI_DSI0_PWM0_OUT IMX8QM_MIPI_DSI0_GPIO0_00 1 46188cc9fc4SAisheng Dong #define IMX8QM_MIPI_DSI0_GPIO0_00_LSIO_GPIO1_IO18 IMX8QM_MIPI_DSI0_GPIO0_00 3 46288cc9fc4SAisheng Dong #define IMX8QM_MIPI_DSI0_GPIO0_01_MIPI_DSI0_GPIO0_IO01 IMX8QM_MIPI_DSI0_GPIO0_01 0 46388cc9fc4SAisheng Dong #define IMX8QM_MIPI_DSI0_GPIO0_01_LSIO_GPIO1_IO19 IMX8QM_MIPI_DSI0_GPIO0_01 3 46488cc9fc4SAisheng Dong #define IMX8QM_MIPI_DSI1_I2C0_SCL_MIPI_DSI1_I2C0_SCL IMX8QM_MIPI_DSI1_I2C0_SCL 0 46588cc9fc4SAisheng Dong #define IMX8QM_MIPI_DSI1_I2C0_SCL_LSIO_GPIO1_IO20 IMX8QM_MIPI_DSI1_I2C0_SCL 3 46688cc9fc4SAisheng Dong #define IMX8QM_MIPI_DSI1_I2C0_SDA_MIPI_DSI1_I2C0_SDA IMX8QM_MIPI_DSI1_I2C0_SDA 0 46788cc9fc4SAisheng Dong #define IMX8QM_MIPI_DSI1_I2C0_SDA_LSIO_GPIO1_IO21 IMX8QM_MIPI_DSI1_I2C0_SDA 3 46888cc9fc4SAisheng Dong #define IMX8QM_MIPI_DSI1_GPIO0_00_MIPI_DSI1_GPIO0_IO00 IMX8QM_MIPI_DSI1_GPIO0_00 0 46988cc9fc4SAisheng Dong #define IMX8QM_MIPI_DSI1_GPIO0_00_MIPI_DSI1_PWM0_OUT IMX8QM_MIPI_DSI1_GPIO0_00 1 47088cc9fc4SAisheng Dong #define IMX8QM_MIPI_DSI1_GPIO0_00_LSIO_GPIO1_IO22 IMX8QM_MIPI_DSI1_GPIO0_00 3 47188cc9fc4SAisheng Dong #define IMX8QM_MIPI_DSI1_GPIO0_01_MIPI_DSI1_GPIO0_IO01 IMX8QM_MIPI_DSI1_GPIO0_01 0 47288cc9fc4SAisheng Dong #define IMX8QM_MIPI_DSI1_GPIO0_01_LSIO_GPIO1_IO23 IMX8QM_MIPI_DSI1_GPIO0_01 3 47388cc9fc4SAisheng Dong #define IMX8QM_MIPI_CSI0_MCLK_OUT_MIPI_CSI0_ACM_MCLK_OUT IMX8QM_MIPI_CSI0_MCLK_OUT 0 47488cc9fc4SAisheng Dong #define IMX8QM_MIPI_CSI0_MCLK_OUT_LSIO_GPIO1_IO24 IMX8QM_MIPI_CSI0_MCLK_OUT 3 47588cc9fc4SAisheng Dong #define IMX8QM_MIPI_CSI0_I2C0_SCL_MIPI_CSI0_I2C0_SCL IMX8QM_MIPI_CSI0_I2C0_SCL 0 47688cc9fc4SAisheng Dong #define IMX8QM_MIPI_CSI0_I2C0_SCL_LSIO_GPIO1_IO25 IMX8QM_MIPI_CSI0_I2C0_SCL 3 47788cc9fc4SAisheng Dong #define IMX8QM_MIPI_CSI0_I2C0_SDA_MIPI_CSI0_I2C0_SDA IMX8QM_MIPI_CSI0_I2C0_SDA 0 47888cc9fc4SAisheng Dong #define IMX8QM_MIPI_CSI0_I2C0_SDA_LSIO_GPIO1_IO26 IMX8QM_MIPI_CSI0_I2C0_SDA 3 47988cc9fc4SAisheng Dong #define IMX8QM_MIPI_CSI0_GPIO0_00_MIPI_CSI0_GPIO0_IO00 IMX8QM_MIPI_CSI0_GPIO0_00 0 48088cc9fc4SAisheng Dong #define IMX8QM_MIPI_CSI0_GPIO0_00_DMA_I2C0_SCL IMX8QM_MIPI_CSI0_GPIO0_00 1 48188cc9fc4SAisheng Dong #define IMX8QM_MIPI_CSI0_GPIO0_00_MIPI_CSI1_I2C0_SCL IMX8QM_MIPI_CSI0_GPIO0_00 2 48288cc9fc4SAisheng Dong #define IMX8QM_MIPI_CSI0_GPIO0_00_LSIO_GPIO1_IO27 IMX8QM_MIPI_CSI0_GPIO0_00 3 48388cc9fc4SAisheng Dong #define IMX8QM_MIPI_CSI0_GPIO0_01_MIPI_CSI0_GPIO0_IO01 IMX8QM_MIPI_CSI0_GPIO0_01 0 48488cc9fc4SAisheng Dong #define IMX8QM_MIPI_CSI0_GPIO0_01_DMA_I2C0_SDA IMX8QM_MIPI_CSI0_GPIO0_01 1 48588cc9fc4SAisheng Dong #define IMX8QM_MIPI_CSI0_GPIO0_01_MIPI_CSI1_I2C0_SDA IMX8QM_MIPI_CSI0_GPIO0_01 2 48688cc9fc4SAisheng Dong #define IMX8QM_MIPI_CSI0_GPIO0_01_LSIO_GPIO1_IO28 IMX8QM_MIPI_CSI0_GPIO0_01 3 48788cc9fc4SAisheng Dong #define IMX8QM_MIPI_CSI1_MCLK_OUT_MIPI_CSI1_ACM_MCLK_OUT IMX8QM_MIPI_CSI1_MCLK_OUT 0 48888cc9fc4SAisheng Dong #define IMX8QM_MIPI_CSI1_MCLK_OUT_LSIO_GPIO1_IO29 IMX8QM_MIPI_CSI1_MCLK_OUT 3 48988cc9fc4SAisheng Dong #define IMX8QM_MIPI_CSI1_GPIO0_00_MIPI_CSI1_GPIO0_IO00 IMX8QM_MIPI_CSI1_GPIO0_00 0 49088cc9fc4SAisheng Dong #define IMX8QM_MIPI_CSI1_GPIO0_00_DMA_UART4_RX IMX8QM_MIPI_CSI1_GPIO0_00 1 49188cc9fc4SAisheng Dong #define IMX8QM_MIPI_CSI1_GPIO0_00_LSIO_GPIO1_IO30 IMX8QM_MIPI_CSI1_GPIO0_00 3 49288cc9fc4SAisheng Dong #define IMX8QM_MIPI_CSI1_GPIO0_01_MIPI_CSI1_GPIO0_IO01 IMX8QM_MIPI_CSI1_GPIO0_01 0 49388cc9fc4SAisheng Dong #define IMX8QM_MIPI_CSI1_GPIO0_01_DMA_UART4_TX IMX8QM_MIPI_CSI1_GPIO0_01 1 49488cc9fc4SAisheng Dong #define IMX8QM_MIPI_CSI1_GPIO0_01_LSIO_GPIO1_IO31 IMX8QM_MIPI_CSI1_GPIO0_01 3 49588cc9fc4SAisheng Dong #define IMX8QM_MIPI_CSI1_I2C0_SCL_MIPI_CSI1_I2C0_SCL IMX8QM_MIPI_CSI1_I2C0_SCL 0 49688cc9fc4SAisheng Dong #define IMX8QM_MIPI_CSI1_I2C0_SCL_LSIO_GPIO2_IO00 IMX8QM_MIPI_CSI1_I2C0_SCL 3 49788cc9fc4SAisheng Dong #define IMX8QM_MIPI_CSI1_I2C0_SDA_MIPI_CSI1_I2C0_SDA IMX8QM_MIPI_CSI1_I2C0_SDA 0 49888cc9fc4SAisheng Dong #define IMX8QM_MIPI_CSI1_I2C0_SDA_LSIO_GPIO2_IO01 IMX8QM_MIPI_CSI1_I2C0_SDA 3 49988cc9fc4SAisheng Dong #define IMX8QM_HDMI_TX0_TS_SCL_HDMI_TX0_I2C0_SCL IMX8QM_HDMI_TX0_TS_SCL 0 50088cc9fc4SAisheng Dong #define IMX8QM_HDMI_TX0_TS_SCL_DMA_I2C0_SCL IMX8QM_HDMI_TX0_TS_SCL 1 50188cc9fc4SAisheng Dong #define IMX8QM_HDMI_TX0_TS_SCL_LSIO_GPIO2_IO02 IMX8QM_HDMI_TX0_TS_SCL 3 50288cc9fc4SAisheng Dong #define IMX8QM_HDMI_TX0_TS_SDA_HDMI_TX0_I2C0_SDA IMX8QM_HDMI_TX0_TS_SDA 0 50388cc9fc4SAisheng Dong #define IMX8QM_HDMI_TX0_TS_SDA_DMA_I2C0_SDA IMX8QM_HDMI_TX0_TS_SDA 1 50488cc9fc4SAisheng Dong #define IMX8QM_HDMI_TX0_TS_SDA_LSIO_GPIO2_IO03 IMX8QM_HDMI_TX0_TS_SDA 3 50588cc9fc4SAisheng Dong #define IMX8QM_ESAI1_FSR_AUD_ESAI1_FSR IMX8QM_ESAI1_FSR 0 50688cc9fc4SAisheng Dong #define IMX8QM_ESAI1_FSR_LSIO_GPIO2_IO04 IMX8QM_ESAI1_FSR 3 50788cc9fc4SAisheng Dong #define IMX8QM_ESAI1_FST_AUD_ESAI1_FST IMX8QM_ESAI1_FST 0 50888cc9fc4SAisheng Dong #define IMX8QM_ESAI1_FST_AUD_SPDIF0_EXT_CLK IMX8QM_ESAI1_FST 1 50988cc9fc4SAisheng Dong #define IMX8QM_ESAI1_FST_LSIO_GPIO2_IO05 IMX8QM_ESAI1_FST 3 51088cc9fc4SAisheng Dong #define IMX8QM_ESAI1_SCKR_AUD_ESAI1_SCKR IMX8QM_ESAI1_SCKR 0 51188cc9fc4SAisheng Dong #define IMX8QM_ESAI1_SCKR_LSIO_GPIO2_IO06 IMX8QM_ESAI1_SCKR 3 51288cc9fc4SAisheng Dong #define IMX8QM_ESAI1_SCKT_AUD_ESAI1_SCKT IMX8QM_ESAI1_SCKT 0 51388cc9fc4SAisheng Dong #define IMX8QM_ESAI1_SCKT_AUD_SAI2_RXC IMX8QM_ESAI1_SCKT 1 51488cc9fc4SAisheng Dong #define IMX8QM_ESAI1_SCKT_AUD_SPDIF0_EXT_CLK IMX8QM_ESAI1_SCKT 2 51588cc9fc4SAisheng Dong #define IMX8QM_ESAI1_SCKT_LSIO_GPIO2_IO07 IMX8QM_ESAI1_SCKT 3 51688cc9fc4SAisheng Dong #define IMX8QM_ESAI1_TX0_AUD_ESAI1_TX0 IMX8QM_ESAI1_TX0 0 51788cc9fc4SAisheng Dong #define IMX8QM_ESAI1_TX0_AUD_SAI2_RXD IMX8QM_ESAI1_TX0 1 51888cc9fc4SAisheng Dong #define IMX8QM_ESAI1_TX0_AUD_SPDIF0_RX IMX8QM_ESAI1_TX0 2 51988cc9fc4SAisheng Dong #define IMX8QM_ESAI1_TX0_LSIO_GPIO2_IO08 IMX8QM_ESAI1_TX0 3 52088cc9fc4SAisheng Dong #define IMX8QM_ESAI1_TX1_AUD_ESAI1_TX1 IMX8QM_ESAI1_TX1 0 52188cc9fc4SAisheng Dong #define IMX8QM_ESAI1_TX1_AUD_SAI2_RXFS IMX8QM_ESAI1_TX1 1 52288cc9fc4SAisheng Dong #define IMX8QM_ESAI1_TX1_AUD_SPDIF0_TX IMX8QM_ESAI1_TX1 2 52388cc9fc4SAisheng Dong #define IMX8QM_ESAI1_TX1_LSIO_GPIO2_IO09 IMX8QM_ESAI1_TX1 3 52488cc9fc4SAisheng Dong #define IMX8QM_ESAI1_TX2_RX3_AUD_ESAI1_TX2_RX3 IMX8QM_ESAI1_TX2_RX3 0 52588cc9fc4SAisheng Dong #define IMX8QM_ESAI1_TX2_RX3_AUD_SPDIF0_RX IMX8QM_ESAI1_TX2_RX3 1 52688cc9fc4SAisheng Dong #define IMX8QM_ESAI1_TX2_RX3_LSIO_GPIO2_IO10 IMX8QM_ESAI1_TX2_RX3 3 52788cc9fc4SAisheng Dong #define IMX8QM_ESAI1_TX3_RX2_AUD_ESAI1_TX3_RX2 IMX8QM_ESAI1_TX3_RX2 0 52888cc9fc4SAisheng Dong #define IMX8QM_ESAI1_TX3_RX2_AUD_SPDIF0_TX IMX8QM_ESAI1_TX3_RX2 1 52988cc9fc4SAisheng Dong #define IMX8QM_ESAI1_TX3_RX2_LSIO_GPIO2_IO11 IMX8QM_ESAI1_TX3_RX2 3 53088cc9fc4SAisheng Dong #define IMX8QM_ESAI1_TX4_RX1_AUD_ESAI1_TX4_RX1 IMX8QM_ESAI1_TX4_RX1 0 53188cc9fc4SAisheng Dong #define IMX8QM_ESAI1_TX4_RX1_LSIO_GPIO2_IO12 IMX8QM_ESAI1_TX4_RX1 3 53288cc9fc4SAisheng Dong #define IMX8QM_ESAI1_TX5_RX0_AUD_ESAI1_TX5_RX0 IMX8QM_ESAI1_TX5_RX0 0 53388cc9fc4SAisheng Dong #define IMX8QM_ESAI1_TX5_RX0_LSIO_GPIO2_IO13 IMX8QM_ESAI1_TX5_RX0 3 53488cc9fc4SAisheng Dong #define IMX8QM_SPDIF0_RX_AUD_SPDIF0_RX IMX8QM_SPDIF0_RX 0 53588cc9fc4SAisheng Dong #define IMX8QM_SPDIF0_RX_AUD_MQS_R IMX8QM_SPDIF0_RX 1 53688cc9fc4SAisheng Dong #define IMX8QM_SPDIF0_RX_AUD_ACM_MCLK_IN1 IMX8QM_SPDIF0_RX 2 53788cc9fc4SAisheng Dong #define IMX8QM_SPDIF0_RX_LSIO_GPIO2_IO14 IMX8QM_SPDIF0_RX 3 53888cc9fc4SAisheng Dong #define IMX8QM_SPDIF0_TX_AUD_SPDIF0_TX IMX8QM_SPDIF0_TX 0 53988cc9fc4SAisheng Dong #define IMX8QM_SPDIF0_TX_AUD_MQS_L IMX8QM_SPDIF0_TX 1 54088cc9fc4SAisheng Dong #define IMX8QM_SPDIF0_TX_AUD_ACM_MCLK_OUT1 IMX8QM_SPDIF0_TX 2 54188cc9fc4SAisheng Dong #define IMX8QM_SPDIF0_TX_LSIO_GPIO2_IO15 IMX8QM_SPDIF0_TX 3 54288cc9fc4SAisheng Dong #define IMX8QM_SPDIF0_EXT_CLK_AUD_SPDIF0_EXT_CLK IMX8QM_SPDIF0_EXT_CLK 0 54388cc9fc4SAisheng Dong #define IMX8QM_SPDIF0_EXT_CLK_DMA_DMA0_REQ_IN0 IMX8QM_SPDIF0_EXT_CLK 1 54488cc9fc4SAisheng Dong #define IMX8QM_SPDIF0_EXT_CLK_LSIO_GPIO2_IO16 IMX8QM_SPDIF0_EXT_CLK 3 54588cc9fc4SAisheng Dong #define IMX8QM_SPI3_SCK_DMA_SPI3_SCK IMX8QM_SPI3_SCK 0 54688cc9fc4SAisheng Dong #define IMX8QM_SPI3_SCK_LSIO_GPIO2_IO17 IMX8QM_SPI3_SCK 3 54788cc9fc4SAisheng Dong #define IMX8QM_SPI3_SDO_DMA_SPI3_SDO IMX8QM_SPI3_SDO 0 54888cc9fc4SAisheng Dong #define IMX8QM_SPI3_SDO_DMA_FTM_CH0 IMX8QM_SPI3_SDO 1 54988cc9fc4SAisheng Dong #define IMX8QM_SPI3_SDO_LSIO_GPIO2_IO18 IMX8QM_SPI3_SDO 3 55088cc9fc4SAisheng Dong #define IMX8QM_SPI3_SDI_DMA_SPI3_SDI IMX8QM_SPI3_SDI 0 55188cc9fc4SAisheng Dong #define IMX8QM_SPI3_SDI_DMA_FTM_CH1 IMX8QM_SPI3_SDI 1 55288cc9fc4SAisheng Dong #define IMX8QM_SPI3_SDI_LSIO_GPIO2_IO19 IMX8QM_SPI3_SDI 3 55388cc9fc4SAisheng Dong #define IMX8QM_SPI3_CS0_DMA_SPI3_CS0 IMX8QM_SPI3_CS0 0 55488cc9fc4SAisheng Dong #define IMX8QM_SPI3_CS0_DMA_FTM_CH2 IMX8QM_SPI3_CS0 1 55588cc9fc4SAisheng Dong #define IMX8QM_SPI3_CS0_LSIO_GPIO2_IO20 IMX8QM_SPI3_CS0 3 55688cc9fc4SAisheng Dong #define IMX8QM_SPI3_CS1_DMA_SPI3_CS1 IMX8QM_SPI3_CS1 0 55788cc9fc4SAisheng Dong #define IMX8QM_SPI3_CS1_LSIO_GPIO2_IO21 IMX8QM_SPI3_CS1 3 55888cc9fc4SAisheng Dong #define IMX8QM_ESAI0_FSR_AUD_ESAI0_FSR IMX8QM_ESAI0_FSR 0 55988cc9fc4SAisheng Dong #define IMX8QM_ESAI0_FSR_LSIO_GPIO2_IO22 IMX8QM_ESAI0_FSR 3 56088cc9fc4SAisheng Dong #define IMX8QM_ESAI0_FST_AUD_ESAI0_FST IMX8QM_ESAI0_FST 0 56188cc9fc4SAisheng Dong #define IMX8QM_ESAI0_FST_LSIO_GPIO2_IO23 IMX8QM_ESAI0_FST 3 56288cc9fc4SAisheng Dong #define IMX8QM_ESAI0_SCKR_AUD_ESAI0_SCKR IMX8QM_ESAI0_SCKR 0 56388cc9fc4SAisheng Dong #define IMX8QM_ESAI0_SCKR_LSIO_GPIO2_IO24 IMX8QM_ESAI0_SCKR 3 56488cc9fc4SAisheng Dong #define IMX8QM_ESAI0_SCKT_AUD_ESAI0_SCKT IMX8QM_ESAI0_SCKT 0 56588cc9fc4SAisheng Dong #define IMX8QM_ESAI0_SCKT_LSIO_GPIO2_IO25 IMX8QM_ESAI0_SCKT 3 56688cc9fc4SAisheng Dong #define IMX8QM_ESAI0_TX0_AUD_ESAI0_TX0 IMX8QM_ESAI0_TX0 0 56788cc9fc4SAisheng Dong #define IMX8QM_ESAI0_TX0_LSIO_GPIO2_IO26 IMX8QM_ESAI0_TX0 3 56888cc9fc4SAisheng Dong #define IMX8QM_ESAI0_TX1_AUD_ESAI0_TX1 IMX8QM_ESAI0_TX1 0 56988cc9fc4SAisheng Dong #define IMX8QM_ESAI0_TX1_LSIO_GPIO2_IO27 IMX8QM_ESAI0_TX1 3 57088cc9fc4SAisheng Dong #define IMX8QM_ESAI0_TX2_RX3_AUD_ESAI0_TX2_RX3 IMX8QM_ESAI0_TX2_RX3 0 57188cc9fc4SAisheng Dong #define IMX8QM_ESAI0_TX2_RX3_LSIO_GPIO2_IO28 IMX8QM_ESAI0_TX2_RX3 3 57288cc9fc4SAisheng Dong #define IMX8QM_ESAI0_TX3_RX2_AUD_ESAI0_TX3_RX2 IMX8QM_ESAI0_TX3_RX2 0 57388cc9fc4SAisheng Dong #define IMX8QM_ESAI0_TX3_RX2_LSIO_GPIO2_IO29 IMX8QM_ESAI0_TX3_RX2 3 57488cc9fc4SAisheng Dong #define IMX8QM_ESAI0_TX4_RX1_AUD_ESAI0_TX4_RX1 IMX8QM_ESAI0_TX4_RX1 0 57588cc9fc4SAisheng Dong #define IMX8QM_ESAI0_TX4_RX1_LSIO_GPIO2_IO30 IMX8QM_ESAI0_TX4_RX1 3 57688cc9fc4SAisheng Dong #define IMX8QM_ESAI0_TX5_RX0_AUD_ESAI0_TX5_RX0 IMX8QM_ESAI0_TX5_RX0 0 57788cc9fc4SAisheng Dong #define IMX8QM_ESAI0_TX5_RX0_LSIO_GPIO2_IO31 IMX8QM_ESAI0_TX5_RX0 3 57888cc9fc4SAisheng Dong #define IMX8QM_MCLK_IN0_AUD_ACM_MCLK_IN0 IMX8QM_MCLK_IN0 0 57988cc9fc4SAisheng Dong #define IMX8QM_MCLK_IN0_AUD_ESAI0_RX_HF_CLK IMX8QM_MCLK_IN0 1 58088cc9fc4SAisheng Dong #define IMX8QM_MCLK_IN0_AUD_ESAI1_RX_HF_CLK IMX8QM_MCLK_IN0 2 58188cc9fc4SAisheng Dong #define IMX8QM_MCLK_IN0_LSIO_GPIO3_IO00 IMX8QM_MCLK_IN0 3 58288cc9fc4SAisheng Dong #define IMX8QM_MCLK_OUT0_AUD_ACM_MCLK_OUT0 IMX8QM_MCLK_OUT0 0 58388cc9fc4SAisheng Dong #define IMX8QM_MCLK_OUT0_AUD_ESAI0_TX_HF_CLK IMX8QM_MCLK_OUT0 1 58488cc9fc4SAisheng Dong #define IMX8QM_MCLK_OUT0_AUD_ESAI1_TX_HF_CLK IMX8QM_MCLK_OUT0 2 58588cc9fc4SAisheng Dong #define IMX8QM_MCLK_OUT0_LSIO_GPIO3_IO01 IMX8QM_MCLK_OUT0 3 58688cc9fc4SAisheng Dong #define IMX8QM_SPI0_SCK_DMA_SPI0_SCK IMX8QM_SPI0_SCK 0 58788cc9fc4SAisheng Dong #define IMX8QM_SPI0_SCK_AUD_SAI0_RXC IMX8QM_SPI0_SCK 1 58888cc9fc4SAisheng Dong #define IMX8QM_SPI0_SCK_LSIO_GPIO3_IO02 IMX8QM_SPI0_SCK 3 58988cc9fc4SAisheng Dong #define IMX8QM_SPI0_SDO_DMA_SPI0_SDO IMX8QM_SPI0_SDO 0 59088cc9fc4SAisheng Dong #define IMX8QM_SPI0_SDO_AUD_SAI0_TXD IMX8QM_SPI0_SDO 1 59188cc9fc4SAisheng Dong #define IMX8QM_SPI0_SDO_LSIO_GPIO3_IO03 IMX8QM_SPI0_SDO 3 59288cc9fc4SAisheng Dong #define IMX8QM_SPI0_SDI_DMA_SPI0_SDI IMX8QM_SPI0_SDI 0 59388cc9fc4SAisheng Dong #define IMX8QM_SPI0_SDI_AUD_SAI0_RXD IMX8QM_SPI0_SDI 1 59488cc9fc4SAisheng Dong #define IMX8QM_SPI0_SDI_LSIO_GPIO3_IO04 IMX8QM_SPI0_SDI 3 59588cc9fc4SAisheng Dong #define IMX8QM_SPI0_CS0_DMA_SPI0_CS0 IMX8QM_SPI0_CS0 0 59688cc9fc4SAisheng Dong #define IMX8QM_SPI0_CS0_AUD_SAI0_RXFS IMX8QM_SPI0_CS0 1 59788cc9fc4SAisheng Dong #define IMX8QM_SPI0_CS0_LSIO_GPIO3_IO05 IMX8QM_SPI0_CS0 3 59888cc9fc4SAisheng Dong #define IMX8QM_SPI0_CS1_DMA_SPI0_CS1 IMX8QM_SPI0_CS1 0 59988cc9fc4SAisheng Dong #define IMX8QM_SPI0_CS1_AUD_SAI0_TXC IMX8QM_SPI0_CS1 1 60088cc9fc4SAisheng Dong #define IMX8QM_SPI0_CS1_LSIO_GPIO3_IO06 IMX8QM_SPI0_CS1 3 60188cc9fc4SAisheng Dong #define IMX8QM_SPI2_SCK_DMA_SPI2_SCK IMX8QM_SPI2_SCK 0 60288cc9fc4SAisheng Dong #define IMX8QM_SPI2_SCK_LSIO_GPIO3_IO07 IMX8QM_SPI2_SCK 3 60388cc9fc4SAisheng Dong #define IMX8QM_SPI2_SDO_DMA_SPI2_SDO IMX8QM_SPI2_SDO 0 60488cc9fc4SAisheng Dong #define IMX8QM_SPI2_SDO_LSIO_GPIO3_IO08 IMX8QM_SPI2_SDO 3 60588cc9fc4SAisheng Dong #define IMX8QM_SPI2_SDI_DMA_SPI2_SDI IMX8QM_SPI2_SDI 0 60688cc9fc4SAisheng Dong #define IMX8QM_SPI2_SDI_LSIO_GPIO3_IO09 IMX8QM_SPI2_SDI 3 60788cc9fc4SAisheng Dong #define IMX8QM_SPI2_CS0_DMA_SPI2_CS0 IMX8QM_SPI2_CS0 0 60888cc9fc4SAisheng Dong #define IMX8QM_SPI2_CS0_LSIO_GPIO3_IO10 IMX8QM_SPI2_CS0 3 60988cc9fc4SAisheng Dong #define IMX8QM_SPI2_CS1_DMA_SPI2_CS1 IMX8QM_SPI2_CS1 0 61088cc9fc4SAisheng Dong #define IMX8QM_SPI2_CS1_AUD_SAI0_TXFS IMX8QM_SPI2_CS1 1 61188cc9fc4SAisheng Dong #define IMX8QM_SPI2_CS1_LSIO_GPIO3_IO11 IMX8QM_SPI2_CS1 3 61288cc9fc4SAisheng Dong #define IMX8QM_SAI1_RXC_AUD_SAI1_RXC IMX8QM_SAI1_RXC 0 61388cc9fc4SAisheng Dong #define IMX8QM_SAI1_RXC_AUD_SAI0_TXD IMX8QM_SAI1_RXC 1 61488cc9fc4SAisheng Dong #define IMX8QM_SAI1_RXC_LSIO_GPIO3_IO12 IMX8QM_SAI1_RXC 3 61588cc9fc4SAisheng Dong #define IMX8QM_SAI1_RXD_AUD_SAI1_RXD IMX8QM_SAI1_RXD 0 61688cc9fc4SAisheng Dong #define IMX8QM_SAI1_RXD_AUD_SAI0_TXFS IMX8QM_SAI1_RXD 1 61788cc9fc4SAisheng Dong #define IMX8QM_SAI1_RXD_LSIO_GPIO3_IO13 IMX8QM_SAI1_RXD 3 61888cc9fc4SAisheng Dong #define IMX8QM_SAI1_RXFS_AUD_SAI1_RXFS IMX8QM_SAI1_RXFS 0 61988cc9fc4SAisheng Dong #define IMX8QM_SAI1_RXFS_AUD_SAI0_RXD IMX8QM_SAI1_RXFS 1 62088cc9fc4SAisheng Dong #define IMX8QM_SAI1_RXFS_LSIO_GPIO3_IO14 IMX8QM_SAI1_RXFS 3 62188cc9fc4SAisheng Dong #define IMX8QM_SAI1_TXC_AUD_SAI1_TXC IMX8QM_SAI1_TXC 0 62288cc9fc4SAisheng Dong #define IMX8QM_SAI1_TXC_AUD_SAI0_TXC IMX8QM_SAI1_TXC 1 62388cc9fc4SAisheng Dong #define IMX8QM_SAI1_TXC_LSIO_GPIO3_IO15 IMX8QM_SAI1_TXC 3 62488cc9fc4SAisheng Dong #define IMX8QM_SAI1_TXD_AUD_SAI1_TXD IMX8QM_SAI1_TXD 0 62588cc9fc4SAisheng Dong #define IMX8QM_SAI1_TXD_AUD_SAI1_RXC IMX8QM_SAI1_TXD 1 62688cc9fc4SAisheng Dong #define IMX8QM_SAI1_TXD_LSIO_GPIO3_IO16 IMX8QM_SAI1_TXD 3 62788cc9fc4SAisheng Dong #define IMX8QM_SAI1_TXFS_AUD_SAI1_TXFS IMX8QM_SAI1_TXFS 0 62888cc9fc4SAisheng Dong #define IMX8QM_SAI1_TXFS_AUD_SAI1_RXFS IMX8QM_SAI1_TXFS 1 62988cc9fc4SAisheng Dong #define IMX8QM_SAI1_TXFS_LSIO_GPIO3_IO17 IMX8QM_SAI1_TXFS 3 63088cc9fc4SAisheng Dong #define IMX8QM_ADC_IN7_DMA_ADC1_IN3 IMX8QM_ADC_IN7 0 63188cc9fc4SAisheng Dong #define IMX8QM_ADC_IN7_DMA_SPI1_CS1 IMX8QM_ADC_IN7 1 63288cc9fc4SAisheng Dong #define IMX8QM_ADC_IN7_LSIO_KPP0_ROW3 IMX8QM_ADC_IN7 2 63388cc9fc4SAisheng Dong #define IMX8QM_ADC_IN7_LSIO_GPIO3_IO25 IMX8QM_ADC_IN7 3 63488cc9fc4SAisheng Dong #define IMX8QM_ADC_IN6_DMA_ADC1_IN2 IMX8QM_ADC_IN6 0 63588cc9fc4SAisheng Dong #define IMX8QM_ADC_IN6_DMA_SPI1_CS0 IMX8QM_ADC_IN6 1 63688cc9fc4SAisheng Dong #define IMX8QM_ADC_IN6_LSIO_KPP0_ROW2 IMX8QM_ADC_IN6 2 63788cc9fc4SAisheng Dong #define IMX8QM_ADC_IN6_LSIO_GPIO3_IO24 IMX8QM_ADC_IN6 3 63888cc9fc4SAisheng Dong #define IMX8QM_ADC_IN5_DMA_ADC1_IN1 IMX8QM_ADC_IN5 0 63988cc9fc4SAisheng Dong #define IMX8QM_ADC_IN5_DMA_SPI1_SDI IMX8QM_ADC_IN5 1 64088cc9fc4SAisheng Dong #define IMX8QM_ADC_IN5_LSIO_KPP0_ROW1 IMX8QM_ADC_IN5 2 64188cc9fc4SAisheng Dong #define IMX8QM_ADC_IN5_LSIO_GPIO3_IO23 IMX8QM_ADC_IN5 3 64288cc9fc4SAisheng Dong #define IMX8QM_ADC_IN4_DMA_ADC1_IN0 IMX8QM_ADC_IN4 0 64388cc9fc4SAisheng Dong #define IMX8QM_ADC_IN4_DMA_SPI1_SDO IMX8QM_ADC_IN4 1 64488cc9fc4SAisheng Dong #define IMX8QM_ADC_IN4_LSIO_KPP0_ROW0 IMX8QM_ADC_IN4 2 64588cc9fc4SAisheng Dong #define IMX8QM_ADC_IN4_LSIO_GPIO3_IO22 IMX8QM_ADC_IN4 3 64688cc9fc4SAisheng Dong #define IMX8QM_ADC_IN3_DMA_ADC0_IN3 IMX8QM_ADC_IN3 0 64788cc9fc4SAisheng Dong #define IMX8QM_ADC_IN3_DMA_SPI1_SCK IMX8QM_ADC_IN3 1 64888cc9fc4SAisheng Dong #define IMX8QM_ADC_IN3_LSIO_KPP0_COL3 IMX8QM_ADC_IN3 2 64988cc9fc4SAisheng Dong #define IMX8QM_ADC_IN3_LSIO_GPIO3_IO21 IMX8QM_ADC_IN3 3 65088cc9fc4SAisheng Dong #define IMX8QM_ADC_IN2_DMA_ADC0_IN2 IMX8QM_ADC_IN2 0 65188cc9fc4SAisheng Dong #define IMX8QM_ADC_IN2_LSIO_KPP0_COL2 IMX8QM_ADC_IN2 2 65288cc9fc4SAisheng Dong #define IMX8QM_ADC_IN2_LSIO_GPIO3_IO20 IMX8QM_ADC_IN2 3 65388cc9fc4SAisheng Dong #define IMX8QM_ADC_IN1_DMA_ADC0_IN1 IMX8QM_ADC_IN1 0 65488cc9fc4SAisheng Dong #define IMX8QM_ADC_IN1_LSIO_KPP0_COL1 IMX8QM_ADC_IN1 2 65588cc9fc4SAisheng Dong #define IMX8QM_ADC_IN1_LSIO_GPIO3_IO19 IMX8QM_ADC_IN1 3 65688cc9fc4SAisheng Dong #define IMX8QM_ADC_IN0_DMA_ADC0_IN0 IMX8QM_ADC_IN0 0 65788cc9fc4SAisheng Dong #define IMX8QM_ADC_IN0_LSIO_KPP0_COL0 IMX8QM_ADC_IN0 2 65888cc9fc4SAisheng Dong #define IMX8QM_ADC_IN0_LSIO_GPIO3_IO18 IMX8QM_ADC_IN0 3 65988cc9fc4SAisheng Dong #define IMX8QM_MLB_SIG_CONN_MLB_SIG IMX8QM_MLB_SIG 0 66088cc9fc4SAisheng Dong #define IMX8QM_MLB_SIG_AUD_SAI3_RXC IMX8QM_MLB_SIG 1 66188cc9fc4SAisheng Dong #define IMX8QM_MLB_SIG_LSIO_GPIO3_IO26 IMX8QM_MLB_SIG 3 66288cc9fc4SAisheng Dong #define IMX8QM_MLB_CLK_CONN_MLB_CLK IMX8QM_MLB_CLK 0 66388cc9fc4SAisheng Dong #define IMX8QM_MLB_CLK_AUD_SAI3_RXFS IMX8QM_MLB_CLK 1 66488cc9fc4SAisheng Dong #define IMX8QM_MLB_CLK_LSIO_GPIO3_IO27 IMX8QM_MLB_CLK 3 66588cc9fc4SAisheng Dong #define IMX8QM_MLB_DATA_CONN_MLB_DATA IMX8QM_MLB_DATA 0 66688cc9fc4SAisheng Dong #define IMX8QM_MLB_DATA_AUD_SAI3_RXD IMX8QM_MLB_DATA 1 66788cc9fc4SAisheng Dong #define IMX8QM_MLB_DATA_LSIO_GPIO3_IO28 IMX8QM_MLB_DATA 3 66888cc9fc4SAisheng Dong #define IMX8QM_FLEXCAN0_RX_DMA_FLEXCAN0_RX IMX8QM_FLEXCAN0_RX 0 66988cc9fc4SAisheng Dong #define IMX8QM_FLEXCAN0_RX_LSIO_GPIO3_IO29 IMX8QM_FLEXCAN0_RX 3 67088cc9fc4SAisheng Dong #define IMX8QM_FLEXCAN0_TX_DMA_FLEXCAN0_TX IMX8QM_FLEXCAN0_TX 0 67188cc9fc4SAisheng Dong #define IMX8QM_FLEXCAN0_TX_LSIO_GPIO3_IO30 IMX8QM_FLEXCAN0_TX 3 67288cc9fc4SAisheng Dong #define IMX8QM_FLEXCAN1_RX_DMA_FLEXCAN1_RX IMX8QM_FLEXCAN1_RX 0 67388cc9fc4SAisheng Dong #define IMX8QM_FLEXCAN1_RX_LSIO_GPIO3_IO31 IMX8QM_FLEXCAN1_RX 3 67488cc9fc4SAisheng Dong #define IMX8QM_FLEXCAN1_TX_DMA_FLEXCAN1_TX IMX8QM_FLEXCAN1_TX 0 67588cc9fc4SAisheng Dong #define IMX8QM_FLEXCAN1_TX_LSIO_GPIO4_IO00 IMX8QM_FLEXCAN1_TX 3 67688cc9fc4SAisheng Dong #define IMX8QM_FLEXCAN2_RX_DMA_FLEXCAN2_RX IMX8QM_FLEXCAN2_RX 0 67788cc9fc4SAisheng Dong #define IMX8QM_FLEXCAN2_RX_LSIO_GPIO4_IO01 IMX8QM_FLEXCAN2_RX 3 67888cc9fc4SAisheng Dong #define IMX8QM_FLEXCAN2_TX_DMA_FLEXCAN2_TX IMX8QM_FLEXCAN2_TX 0 67988cc9fc4SAisheng Dong #define IMX8QM_FLEXCAN2_TX_LSIO_GPIO4_IO02 IMX8QM_FLEXCAN2_TX 3 68088cc9fc4SAisheng Dong #define IMX8QM_USB_SS3_TC0_DMA_I2C1_SCL IMX8QM_USB_SS3_TC0 0 68188cc9fc4SAisheng Dong #define IMX8QM_USB_SS3_TC0_CONN_USB_OTG1_PWR IMX8QM_USB_SS3_TC0 1 68288cc9fc4SAisheng Dong #define IMX8QM_USB_SS3_TC0_LSIO_GPIO4_IO03 IMX8QM_USB_SS3_TC0 3 68388cc9fc4SAisheng Dong #define IMX8QM_USB_SS3_TC1_DMA_I2C1_SCL IMX8QM_USB_SS3_TC1 0 68488cc9fc4SAisheng Dong #define IMX8QM_USB_SS3_TC1_CONN_USB_OTG2_PWR IMX8QM_USB_SS3_TC1 1 68588cc9fc4SAisheng Dong #define IMX8QM_USB_SS3_TC1_LSIO_GPIO4_IO04 IMX8QM_USB_SS3_TC1 3 68688cc9fc4SAisheng Dong #define IMX8QM_USB_SS3_TC2_DMA_I2C1_SDA IMX8QM_USB_SS3_TC2 0 68788cc9fc4SAisheng Dong #define IMX8QM_USB_SS3_TC2_CONN_USB_OTG1_OC IMX8QM_USB_SS3_TC2 1 68888cc9fc4SAisheng Dong #define IMX8QM_USB_SS3_TC2_LSIO_GPIO4_IO05 IMX8QM_USB_SS3_TC2 3 68988cc9fc4SAisheng Dong #define IMX8QM_USB_SS3_TC3_DMA_I2C1_SDA IMX8QM_USB_SS3_TC3 0 69088cc9fc4SAisheng Dong #define IMX8QM_USB_SS3_TC3_CONN_USB_OTG2_OC IMX8QM_USB_SS3_TC3 1 69188cc9fc4SAisheng Dong #define IMX8QM_USB_SS3_TC3_LSIO_GPIO4_IO06 IMX8QM_USB_SS3_TC3 3 69288cc9fc4SAisheng Dong #define IMX8QM_USDHC1_RESET_B_CONN_USDHC1_RESET_B IMX8QM_USDHC1_RESET_B 0 69388cc9fc4SAisheng Dong #define IMX8QM_USDHC1_RESET_B_LSIO_GPIO4_IO07 IMX8QM_USDHC1_RESET_B 3 69488cc9fc4SAisheng Dong #define IMX8QM_USDHC1_VSELECT_CONN_USDHC1_VSELECT IMX8QM_USDHC1_VSELECT 0 69588cc9fc4SAisheng Dong #define IMX8QM_USDHC1_VSELECT_LSIO_GPIO4_IO08 IMX8QM_USDHC1_VSELECT 3 69688cc9fc4SAisheng Dong #define IMX8QM_USDHC2_RESET_B_CONN_USDHC2_RESET_B IMX8QM_USDHC2_RESET_B 0 69788cc9fc4SAisheng Dong #define IMX8QM_USDHC2_RESET_B_LSIO_GPIO4_IO09 IMX8QM_USDHC2_RESET_B 3 69888cc9fc4SAisheng Dong #define IMX8QM_USDHC2_VSELECT_CONN_USDHC2_VSELECT IMX8QM_USDHC2_VSELECT 0 69988cc9fc4SAisheng Dong #define IMX8QM_USDHC2_VSELECT_LSIO_GPIO4_IO10 IMX8QM_USDHC2_VSELECT 3 70088cc9fc4SAisheng Dong #define IMX8QM_USDHC2_WP_CONN_USDHC2_WP IMX8QM_USDHC2_WP 0 70188cc9fc4SAisheng Dong #define IMX8QM_USDHC2_WP_LSIO_GPIO4_IO11 IMX8QM_USDHC2_WP 3 70288cc9fc4SAisheng Dong #define IMX8QM_USDHC2_CD_B_CONN_USDHC2_CD_B IMX8QM_USDHC2_CD_B 0 70388cc9fc4SAisheng Dong #define IMX8QM_USDHC2_CD_B_LSIO_GPIO4_IO12 IMX8QM_USDHC2_CD_B 3 70488cc9fc4SAisheng Dong #define IMX8QM_ENET0_MDIO_CONN_ENET0_MDIO IMX8QM_ENET0_MDIO 0 70588cc9fc4SAisheng Dong #define IMX8QM_ENET0_MDIO_DMA_I2C4_SDA IMX8QM_ENET0_MDIO 1 70688cc9fc4SAisheng Dong #define IMX8QM_ENET0_MDIO_LSIO_GPIO4_IO13 IMX8QM_ENET0_MDIO 3 70788cc9fc4SAisheng Dong #define IMX8QM_ENET0_MDC_CONN_ENET0_MDC IMX8QM_ENET0_MDC 0 70888cc9fc4SAisheng Dong #define IMX8QM_ENET0_MDC_DMA_I2C4_SCL IMX8QM_ENET0_MDC 1 70988cc9fc4SAisheng Dong #define IMX8QM_ENET0_MDC_LSIO_GPIO4_IO14 IMX8QM_ENET0_MDC 3 71088cc9fc4SAisheng Dong #define IMX8QM_ENET0_REFCLK_125M_25M_CONN_ENET0_REFCLK_125M_25M IMX8QM_ENET0_REFCLK_125M_25M 0 71188cc9fc4SAisheng Dong #define IMX8QM_ENET0_REFCLK_125M_25M_CONN_ENET0_PPS IMX8QM_ENET0_REFCLK_125M_25M 1 71288cc9fc4SAisheng Dong #define IMX8QM_ENET0_REFCLK_125M_25M_LSIO_GPIO4_IO15 IMX8QM_ENET0_REFCLK_125M_25M 3 71388cc9fc4SAisheng Dong #define IMX8QM_ENET1_REFCLK_125M_25M_CONN_ENET1_REFCLK_125M_25M IMX8QM_ENET1_REFCLK_125M_25M 0 71488cc9fc4SAisheng Dong #define IMX8QM_ENET1_REFCLK_125M_25M_CONN_ENET1_PPS IMX8QM_ENET1_REFCLK_125M_25M 1 71588cc9fc4SAisheng Dong #define IMX8QM_ENET1_REFCLK_125M_25M_LSIO_GPIO4_IO16 IMX8QM_ENET1_REFCLK_125M_25M 3 71688cc9fc4SAisheng Dong #define IMX8QM_ENET1_MDIO_CONN_ENET1_MDIO IMX8QM_ENET1_MDIO 0 71788cc9fc4SAisheng Dong #define IMX8QM_ENET1_MDIO_DMA_I2C4_SDA IMX8QM_ENET1_MDIO 1 71888cc9fc4SAisheng Dong #define IMX8QM_ENET1_MDIO_LSIO_GPIO4_IO17 IMX8QM_ENET1_MDIO 3 71988cc9fc4SAisheng Dong #define IMX8QM_ENET1_MDC_CONN_ENET1_MDC IMX8QM_ENET1_MDC 0 72088cc9fc4SAisheng Dong #define IMX8QM_ENET1_MDC_DMA_I2C4_SCL IMX8QM_ENET1_MDC 1 72188cc9fc4SAisheng Dong #define IMX8QM_ENET1_MDC_LSIO_GPIO4_IO18 IMX8QM_ENET1_MDC 3 72288cc9fc4SAisheng Dong #define IMX8QM_QSPI1A_SS0_B_LSIO_QSPI1A_SS0_B IMX8QM_QSPI1A_SS0_B 0 72388cc9fc4SAisheng Dong #define IMX8QM_QSPI1A_SS0_B_LSIO_GPIO4_IO19 IMX8QM_QSPI1A_SS0_B 3 72488cc9fc4SAisheng Dong #define IMX8QM_QSPI1A_SS1_B_LSIO_QSPI1A_SS1_B IMX8QM_QSPI1A_SS1_B 0 72588cc9fc4SAisheng Dong #define IMX8QM_QSPI1A_SS1_B_LSIO_QSPI1A_SCLK2 IMX8QM_QSPI1A_SS1_B 1 72688cc9fc4SAisheng Dong #define IMX8QM_QSPI1A_SS1_B_LSIO_GPIO4_IO20 IMX8QM_QSPI1A_SS1_B 3 72788cc9fc4SAisheng Dong #define IMX8QM_QSPI1A_SCLK_LSIO_QSPI1A_SCLK IMX8QM_QSPI1A_SCLK 0 72888cc9fc4SAisheng Dong #define IMX8QM_QSPI1A_SCLK_LSIO_GPIO4_IO21 IMX8QM_QSPI1A_SCLK 3 72988cc9fc4SAisheng Dong #define IMX8QM_QSPI1A_DQS_LSIO_QSPI1A_DQS IMX8QM_QSPI1A_DQS 0 73088cc9fc4SAisheng Dong #define IMX8QM_QSPI1A_DQS_LSIO_GPIO4_IO22 IMX8QM_QSPI1A_DQS 3 73188cc9fc4SAisheng Dong #define IMX8QM_QSPI1A_DATA3_LSIO_QSPI1A_DATA3 IMX8QM_QSPI1A_DATA3 0 73288cc9fc4SAisheng Dong #define IMX8QM_QSPI1A_DATA3_DMA_I2C1_SDA IMX8QM_QSPI1A_DATA3 1 73388cc9fc4SAisheng Dong #define IMX8QM_QSPI1A_DATA3_CONN_USB_OTG1_OC IMX8QM_QSPI1A_DATA3 2 73488cc9fc4SAisheng Dong #define IMX8QM_QSPI1A_DATA3_LSIO_GPIO4_IO23 IMX8QM_QSPI1A_DATA3 3 73588cc9fc4SAisheng Dong #define IMX8QM_QSPI1A_DATA2_LSIO_QSPI1A_DATA2 IMX8QM_QSPI1A_DATA2 0 73688cc9fc4SAisheng Dong #define IMX8QM_QSPI1A_DATA2_DMA_I2C1_SCL IMX8QM_QSPI1A_DATA2 1 73788cc9fc4SAisheng Dong #define IMX8QM_QSPI1A_DATA2_CONN_USB_OTG2_PWR IMX8QM_QSPI1A_DATA2 2 73888cc9fc4SAisheng Dong #define IMX8QM_QSPI1A_DATA2_LSIO_GPIO4_IO24 IMX8QM_QSPI1A_DATA2 3 73988cc9fc4SAisheng Dong #define IMX8QM_QSPI1A_DATA1_LSIO_QSPI1A_DATA1 IMX8QM_QSPI1A_DATA1 0 74088cc9fc4SAisheng Dong #define IMX8QM_QSPI1A_DATA1_DMA_I2C1_SDA IMX8QM_QSPI1A_DATA1 1 74188cc9fc4SAisheng Dong #define IMX8QM_QSPI1A_DATA1_CONN_USB_OTG2_OC IMX8QM_QSPI1A_DATA1 2 74288cc9fc4SAisheng Dong #define IMX8QM_QSPI1A_DATA1_LSIO_GPIO4_IO25 IMX8QM_QSPI1A_DATA1 3 74388cc9fc4SAisheng Dong #define IMX8QM_QSPI1A_DATA0_LSIO_QSPI1A_DATA0 IMX8QM_QSPI1A_DATA0 0 74488cc9fc4SAisheng Dong #define IMX8QM_QSPI1A_DATA0_LSIO_GPIO4_IO26 IMX8QM_QSPI1A_DATA0 3 74588cc9fc4SAisheng Dong #define IMX8QM_QSPI0A_DATA0_LSIO_QSPI0A_DATA0 IMX8QM_QSPI0A_DATA0 0 74688cc9fc4SAisheng Dong #define IMX8QM_QSPI0A_DATA1_LSIO_QSPI0A_DATA1 IMX8QM_QSPI0A_DATA1 0 74788cc9fc4SAisheng Dong #define IMX8QM_QSPI0A_DATA2_LSIO_QSPI0A_DATA2 IMX8QM_QSPI0A_DATA2 0 74888cc9fc4SAisheng Dong #define IMX8QM_QSPI0A_DATA3_LSIO_QSPI0A_DATA3 IMX8QM_QSPI0A_DATA3 0 74988cc9fc4SAisheng Dong #define IMX8QM_QSPI0A_DQS_LSIO_QSPI0A_DQS IMX8QM_QSPI0A_DQS 0 75088cc9fc4SAisheng Dong #define IMX8QM_QSPI0A_SS0_B_LSIO_QSPI0A_SS0_B IMX8QM_QSPI0A_SS0_B 0 75188cc9fc4SAisheng Dong #define IMX8QM_QSPI0A_SS1_B_LSIO_QSPI0A_SS1_B IMX8QM_QSPI0A_SS1_B 0 75288cc9fc4SAisheng Dong #define IMX8QM_QSPI0A_SS1_B_LSIO_QSPI0A_SCLK2 IMX8QM_QSPI0A_SS1_B 1 75388cc9fc4SAisheng Dong #define IMX8QM_QSPI0A_SCLK_LSIO_QSPI0A_SCLK IMX8QM_QSPI0A_SCLK 0 75488cc9fc4SAisheng Dong #define IMX8QM_QSPI0B_SCLK_LSIO_QSPI0B_SCLK IMX8QM_QSPI0B_SCLK 0 75588cc9fc4SAisheng Dong #define IMX8QM_QSPI0B_DATA0_LSIO_QSPI0B_DATA0 IMX8QM_QSPI0B_DATA0 0 75688cc9fc4SAisheng Dong #define IMX8QM_QSPI0B_DATA1_LSIO_QSPI0B_DATA1 IMX8QM_QSPI0B_DATA1 0 75788cc9fc4SAisheng Dong #define IMX8QM_QSPI0B_DATA2_LSIO_QSPI0B_DATA2 IMX8QM_QSPI0B_DATA2 0 75888cc9fc4SAisheng Dong #define IMX8QM_QSPI0B_DATA3_LSIO_QSPI0B_DATA3 IMX8QM_QSPI0B_DATA3 0 75988cc9fc4SAisheng Dong #define IMX8QM_QSPI0B_DQS_LSIO_QSPI0B_DQS IMX8QM_QSPI0B_DQS 0 76088cc9fc4SAisheng Dong #define IMX8QM_QSPI0B_SS0_B_LSIO_QSPI0B_SS0_B IMX8QM_QSPI0B_SS0_B 0 76188cc9fc4SAisheng Dong #define IMX8QM_QSPI0B_SS1_B_LSIO_QSPI0B_SS1_B IMX8QM_QSPI0B_SS1_B 0 76288cc9fc4SAisheng Dong #define IMX8QM_QSPI0B_SS1_B_LSIO_QSPI0B_SCLK2 IMX8QM_QSPI0B_SS1_B 1 76388cc9fc4SAisheng Dong #define IMX8QM_PCIE_CTRL0_CLKREQ_B_HSIO_PCIE0_CLKREQ_B IMX8QM_PCIE_CTRL0_CLKREQ_B 0 76488cc9fc4SAisheng Dong #define IMX8QM_PCIE_CTRL0_CLKREQ_B_LSIO_GPIO4_IO27 IMX8QM_PCIE_CTRL0_CLKREQ_B 3 76588cc9fc4SAisheng Dong #define IMX8QM_PCIE_CTRL0_WAKE_B_HSIO_PCIE0_WAKE_B IMX8QM_PCIE_CTRL0_WAKE_B 0 76688cc9fc4SAisheng Dong #define IMX8QM_PCIE_CTRL0_WAKE_B_LSIO_GPIO4_IO28 IMX8QM_PCIE_CTRL0_WAKE_B 3 76788cc9fc4SAisheng Dong #define IMX8QM_PCIE_CTRL0_PERST_B_HSIO_PCIE0_PERST_B IMX8QM_PCIE_CTRL0_PERST_B 0 76888cc9fc4SAisheng Dong #define IMX8QM_PCIE_CTRL0_PERST_B_LSIO_GPIO4_IO29 IMX8QM_PCIE_CTRL0_PERST_B 3 76988cc9fc4SAisheng Dong #define IMX8QM_PCIE_CTRL1_CLKREQ_B_HSIO_PCIE1_CLKREQ_B IMX8QM_PCIE_CTRL1_CLKREQ_B 0 77088cc9fc4SAisheng Dong #define IMX8QM_PCIE_CTRL1_CLKREQ_B_DMA_I2C1_SDA IMX8QM_PCIE_CTRL1_CLKREQ_B 1 77188cc9fc4SAisheng Dong #define IMX8QM_PCIE_CTRL1_CLKREQ_B_CONN_USB_OTG2_OC IMX8QM_PCIE_CTRL1_CLKREQ_B 2 77288cc9fc4SAisheng Dong #define IMX8QM_PCIE_CTRL1_CLKREQ_B_LSIO_GPIO4_IO30 IMX8QM_PCIE_CTRL1_CLKREQ_B 3 77388cc9fc4SAisheng Dong #define IMX8QM_PCIE_CTRL1_WAKE_B_HSIO_PCIE1_WAKE_B IMX8QM_PCIE_CTRL1_WAKE_B 0 77488cc9fc4SAisheng Dong #define IMX8QM_PCIE_CTRL1_WAKE_B_DMA_I2C1_SCL IMX8QM_PCIE_CTRL1_WAKE_B 1 77588cc9fc4SAisheng Dong #define IMX8QM_PCIE_CTRL1_WAKE_B_CONN_USB_OTG2_PWR IMX8QM_PCIE_CTRL1_WAKE_B 2 77688cc9fc4SAisheng Dong #define IMX8QM_PCIE_CTRL1_WAKE_B_LSIO_GPIO4_IO31 IMX8QM_PCIE_CTRL1_WAKE_B 3 77788cc9fc4SAisheng Dong #define IMX8QM_PCIE_CTRL1_PERST_B_HSIO_PCIE1_PERST_B IMX8QM_PCIE_CTRL1_PERST_B 0 77888cc9fc4SAisheng Dong #define IMX8QM_PCIE_CTRL1_PERST_B_DMA_I2C1_SCL IMX8QM_PCIE_CTRL1_PERST_B 1 77988cc9fc4SAisheng Dong #define IMX8QM_PCIE_CTRL1_PERST_B_CONN_USB_OTG1_PWR IMX8QM_PCIE_CTRL1_PERST_B 2 78088cc9fc4SAisheng Dong #define IMX8QM_PCIE_CTRL1_PERST_B_LSIO_GPIO5_IO00 IMX8QM_PCIE_CTRL1_PERST_B 3 78188cc9fc4SAisheng Dong #define IMX8QM_USB_HSIC0_DATA_CONN_USB_HSIC0_DATA IMX8QM_USB_HSIC0_DATA 0 78288cc9fc4SAisheng Dong #define IMX8QM_USB_HSIC0_DATA_DMA_I2C1_SDA IMX8QM_USB_HSIC0_DATA 1 78388cc9fc4SAisheng Dong #define IMX8QM_USB_HSIC0_DATA_LSIO_GPIO5_IO01 IMX8QM_USB_HSIC0_DATA 3 78488cc9fc4SAisheng Dong #define IMX8QM_USB_HSIC0_STROBE_CONN_USB_HSIC0_STROBE IMX8QM_USB_HSIC0_STROBE 0 78588cc9fc4SAisheng Dong #define IMX8QM_USB_HSIC0_STROBE_DMA_I2C1_SCL IMX8QM_USB_HSIC0_STROBE 1 78688cc9fc4SAisheng Dong #define IMX8QM_USB_HSIC0_STROBE_LSIO_GPIO5_IO02 IMX8QM_USB_HSIC0_STROBE 3 78788cc9fc4SAisheng Dong #define IMX8QM_EMMC0_CLK_CONN_EMMC0_CLK IMX8QM_EMMC0_CLK 0 78888cc9fc4SAisheng Dong #define IMX8QM_EMMC0_CLK_CONN_NAND_READY_B IMX8QM_EMMC0_CLK 1 78988cc9fc4SAisheng Dong #define IMX8QM_EMMC0_CMD_CONN_EMMC0_CMD IMX8QM_EMMC0_CMD 0 79088cc9fc4SAisheng Dong #define IMX8QM_EMMC0_CMD_CONN_NAND_DQS IMX8QM_EMMC0_CMD 1 79188cc9fc4SAisheng Dong #define IMX8QM_EMMC0_CMD_AUD_MQS_R IMX8QM_EMMC0_CMD 2 79288cc9fc4SAisheng Dong #define IMX8QM_EMMC0_CMD_LSIO_GPIO5_IO03 IMX8QM_EMMC0_CMD 3 79388cc9fc4SAisheng Dong #define IMX8QM_EMMC0_DATA0_CONN_EMMC0_DATA0 IMX8QM_EMMC0_DATA0 0 79488cc9fc4SAisheng Dong #define IMX8QM_EMMC0_DATA0_CONN_NAND_DATA00 IMX8QM_EMMC0_DATA0 1 79588cc9fc4SAisheng Dong #define IMX8QM_EMMC0_DATA0_LSIO_GPIO5_IO04 IMX8QM_EMMC0_DATA0 3 79688cc9fc4SAisheng Dong #define IMX8QM_EMMC0_DATA1_CONN_EMMC0_DATA1 IMX8QM_EMMC0_DATA1 0 79788cc9fc4SAisheng Dong #define IMX8QM_EMMC0_DATA1_CONN_NAND_DATA01 IMX8QM_EMMC0_DATA1 1 79888cc9fc4SAisheng Dong #define IMX8QM_EMMC0_DATA1_LSIO_GPIO5_IO05 IMX8QM_EMMC0_DATA1 3 79988cc9fc4SAisheng Dong #define IMX8QM_EMMC0_DATA2_CONN_EMMC0_DATA2 IMX8QM_EMMC0_DATA2 0 80088cc9fc4SAisheng Dong #define IMX8QM_EMMC0_DATA2_CONN_NAND_DATA02 IMX8QM_EMMC0_DATA2 1 80188cc9fc4SAisheng Dong #define IMX8QM_EMMC0_DATA2_LSIO_GPIO5_IO06 IMX8QM_EMMC0_DATA2 3 80288cc9fc4SAisheng Dong #define IMX8QM_EMMC0_DATA3_CONN_EMMC0_DATA3 IMX8QM_EMMC0_DATA3 0 80388cc9fc4SAisheng Dong #define IMX8QM_EMMC0_DATA3_CONN_NAND_DATA03 IMX8QM_EMMC0_DATA3 1 80488cc9fc4SAisheng Dong #define IMX8QM_EMMC0_DATA3_LSIO_GPIO5_IO07 IMX8QM_EMMC0_DATA3 3 80588cc9fc4SAisheng Dong #define IMX8QM_EMMC0_DATA4_CONN_EMMC0_DATA4 IMX8QM_EMMC0_DATA4 0 80688cc9fc4SAisheng Dong #define IMX8QM_EMMC0_DATA4_CONN_NAND_DATA04 IMX8QM_EMMC0_DATA4 1 80788cc9fc4SAisheng Dong #define IMX8QM_EMMC0_DATA4_LSIO_GPIO5_IO08 IMX8QM_EMMC0_DATA4 3 80888cc9fc4SAisheng Dong #define IMX8QM_EMMC0_DATA5_CONN_EMMC0_DATA5 IMX8QM_EMMC0_DATA5 0 80988cc9fc4SAisheng Dong #define IMX8QM_EMMC0_DATA5_CONN_NAND_DATA05 IMX8QM_EMMC0_DATA5 1 81088cc9fc4SAisheng Dong #define IMX8QM_EMMC0_DATA5_LSIO_GPIO5_IO09 IMX8QM_EMMC0_DATA5 3 81188cc9fc4SAisheng Dong #define IMX8QM_EMMC0_DATA6_CONN_EMMC0_DATA6 IMX8QM_EMMC0_DATA6 0 81288cc9fc4SAisheng Dong #define IMX8QM_EMMC0_DATA6_CONN_NAND_DATA06 IMX8QM_EMMC0_DATA6 1 81388cc9fc4SAisheng Dong #define IMX8QM_EMMC0_DATA6_LSIO_GPIO5_IO10 IMX8QM_EMMC0_DATA6 3 81488cc9fc4SAisheng Dong #define IMX8QM_EMMC0_DATA7_CONN_EMMC0_DATA7 IMX8QM_EMMC0_DATA7 0 81588cc9fc4SAisheng Dong #define IMX8QM_EMMC0_DATA7_CONN_NAND_DATA07 IMX8QM_EMMC0_DATA7 1 81688cc9fc4SAisheng Dong #define IMX8QM_EMMC0_DATA7_LSIO_GPIO5_IO11 IMX8QM_EMMC0_DATA7 3 81788cc9fc4SAisheng Dong #define IMX8QM_EMMC0_STROBE_CONN_EMMC0_STROBE IMX8QM_EMMC0_STROBE 0 81888cc9fc4SAisheng Dong #define IMX8QM_EMMC0_STROBE_CONN_NAND_CLE IMX8QM_EMMC0_STROBE 1 81988cc9fc4SAisheng Dong #define IMX8QM_EMMC0_STROBE_LSIO_GPIO5_IO12 IMX8QM_EMMC0_STROBE 3 82088cc9fc4SAisheng Dong #define IMX8QM_EMMC0_RESET_B_CONN_EMMC0_RESET_B IMX8QM_EMMC0_RESET_B 0 82188cc9fc4SAisheng Dong #define IMX8QM_EMMC0_RESET_B_CONN_NAND_WP_B IMX8QM_EMMC0_RESET_B 1 82288cc9fc4SAisheng Dong #define IMX8QM_EMMC0_RESET_B_CONN_USDHC1_VSELECT IMX8QM_EMMC0_RESET_B 2 82388cc9fc4SAisheng Dong #define IMX8QM_EMMC0_RESET_B_LSIO_GPIO5_IO13 IMX8QM_EMMC0_RESET_B 3 82488cc9fc4SAisheng Dong #define IMX8QM_USDHC1_CLK_CONN_USDHC1_CLK IMX8QM_USDHC1_CLK 0 82588cc9fc4SAisheng Dong #define IMX8QM_USDHC1_CLK_AUD_MQS_R IMX8QM_USDHC1_CLK 1 82688cc9fc4SAisheng Dong #define IMX8QM_USDHC1_CMD_CONN_USDHC1_CMD IMX8QM_USDHC1_CMD 0 82788cc9fc4SAisheng Dong #define IMX8QM_USDHC1_CMD_AUD_MQS_L IMX8QM_USDHC1_CMD 1 82888cc9fc4SAisheng Dong #define IMX8QM_USDHC1_CMD_LSIO_GPIO5_IO14 IMX8QM_USDHC1_CMD 3 82988cc9fc4SAisheng Dong #define IMX8QM_USDHC1_DATA0_CONN_USDHC1_DATA0 IMX8QM_USDHC1_DATA0 0 83088cc9fc4SAisheng Dong #define IMX8QM_USDHC1_DATA0_CONN_NAND_RE_N IMX8QM_USDHC1_DATA0 1 83188cc9fc4SAisheng Dong #define IMX8QM_USDHC1_DATA0_LSIO_GPIO5_IO15 IMX8QM_USDHC1_DATA0 3 83288cc9fc4SAisheng Dong #define IMX8QM_USDHC1_DATA1_CONN_USDHC1_DATA1 IMX8QM_USDHC1_DATA1 0 83388cc9fc4SAisheng Dong #define IMX8QM_USDHC1_DATA1_CONN_NAND_RE_P IMX8QM_USDHC1_DATA1 1 83488cc9fc4SAisheng Dong #define IMX8QM_USDHC1_DATA1_LSIO_GPIO5_IO16 IMX8QM_USDHC1_DATA1 3 83588cc9fc4SAisheng Dong #define IMX8QM_USDHC1_DATA2_CONN_USDHC1_DATA2 IMX8QM_USDHC1_DATA2 0 83688cc9fc4SAisheng Dong #define IMX8QM_USDHC1_DATA2_CONN_NAND_DQS_N IMX8QM_USDHC1_DATA2 1 83788cc9fc4SAisheng Dong #define IMX8QM_USDHC1_DATA2_LSIO_GPIO5_IO17 IMX8QM_USDHC1_DATA2 3 83888cc9fc4SAisheng Dong #define IMX8QM_USDHC1_DATA3_CONN_USDHC1_DATA3 IMX8QM_USDHC1_DATA3 0 83988cc9fc4SAisheng Dong #define IMX8QM_USDHC1_DATA3_CONN_NAND_DQS_P IMX8QM_USDHC1_DATA3 1 84088cc9fc4SAisheng Dong #define IMX8QM_USDHC1_DATA3_LSIO_GPIO5_IO18 IMX8QM_USDHC1_DATA3 3 84188cc9fc4SAisheng Dong #define IMX8QM_USDHC1_DATA4_CONN_USDHC1_DATA4 IMX8QM_USDHC1_DATA4 0 84288cc9fc4SAisheng Dong #define IMX8QM_USDHC1_DATA4_CONN_NAND_CE0_B IMX8QM_USDHC1_DATA4 1 84388cc9fc4SAisheng Dong #define IMX8QM_USDHC1_DATA4_AUD_MQS_R IMX8QM_USDHC1_DATA4 2 84488cc9fc4SAisheng Dong #define IMX8QM_USDHC1_DATA4_LSIO_GPIO5_IO19 IMX8QM_USDHC1_DATA4 3 84588cc9fc4SAisheng Dong #define IMX8QM_USDHC1_DATA5_CONN_USDHC1_DATA5 IMX8QM_USDHC1_DATA5 0 84688cc9fc4SAisheng Dong #define IMX8QM_USDHC1_DATA5_CONN_NAND_RE_B IMX8QM_USDHC1_DATA5 1 84788cc9fc4SAisheng Dong #define IMX8QM_USDHC1_DATA5_AUD_MQS_L IMX8QM_USDHC1_DATA5 2 84888cc9fc4SAisheng Dong #define IMX8QM_USDHC1_DATA5_LSIO_GPIO5_IO20 IMX8QM_USDHC1_DATA5 3 84988cc9fc4SAisheng Dong #define IMX8QM_USDHC1_DATA6_CONN_USDHC1_DATA6 IMX8QM_USDHC1_DATA6 0 85088cc9fc4SAisheng Dong #define IMX8QM_USDHC1_DATA6_CONN_NAND_WE_B IMX8QM_USDHC1_DATA6 1 85188cc9fc4SAisheng Dong #define IMX8QM_USDHC1_DATA6_CONN_USDHC1_WP IMX8QM_USDHC1_DATA6 2 85288cc9fc4SAisheng Dong #define IMX8QM_USDHC1_DATA6_LSIO_GPIO5_IO21 IMX8QM_USDHC1_DATA6 3 85388cc9fc4SAisheng Dong #define IMX8QM_USDHC1_DATA7_CONN_USDHC1_DATA7 IMX8QM_USDHC1_DATA7 0 85488cc9fc4SAisheng Dong #define IMX8QM_USDHC1_DATA7_CONN_NAND_ALE IMX8QM_USDHC1_DATA7 1 85588cc9fc4SAisheng Dong #define IMX8QM_USDHC1_DATA7_CONN_USDHC1_CD_B IMX8QM_USDHC1_DATA7 2 85688cc9fc4SAisheng Dong #define IMX8QM_USDHC1_DATA7_LSIO_GPIO5_IO22 IMX8QM_USDHC1_DATA7 3 85788cc9fc4SAisheng Dong #define IMX8QM_USDHC1_STROBE_CONN_USDHC1_STROBE IMX8QM_USDHC1_STROBE 0 85888cc9fc4SAisheng Dong #define IMX8QM_USDHC1_STROBE_CONN_NAND_CE1_B IMX8QM_USDHC1_STROBE 1 85988cc9fc4SAisheng Dong #define IMX8QM_USDHC1_STROBE_CONN_USDHC1_RESET_B IMX8QM_USDHC1_STROBE 2 86088cc9fc4SAisheng Dong #define IMX8QM_USDHC1_STROBE_LSIO_GPIO5_IO23 IMX8QM_USDHC1_STROBE 3 86188cc9fc4SAisheng Dong #define IMX8QM_USDHC2_CLK_CONN_USDHC2_CLK IMX8QM_USDHC2_CLK 0 86288cc9fc4SAisheng Dong #define IMX8QM_USDHC2_CLK_AUD_MQS_R IMX8QM_USDHC2_CLK 1 86388cc9fc4SAisheng Dong #define IMX8QM_USDHC2_CLK_LSIO_GPIO5_IO24 IMX8QM_USDHC2_CLK 3 86488cc9fc4SAisheng Dong #define IMX8QM_USDHC2_CMD_CONN_USDHC2_CMD IMX8QM_USDHC2_CMD 0 86588cc9fc4SAisheng Dong #define IMX8QM_USDHC2_CMD_AUD_MQS_L IMX8QM_USDHC2_CMD 1 86688cc9fc4SAisheng Dong #define IMX8QM_USDHC2_CMD_LSIO_GPIO5_IO25 IMX8QM_USDHC2_CMD 3 86788cc9fc4SAisheng Dong #define IMX8QM_USDHC2_DATA0_CONN_USDHC2_DATA0 IMX8QM_USDHC2_DATA0 0 86888cc9fc4SAisheng Dong #define IMX8QM_USDHC2_DATA0_DMA_UART4_RX IMX8QM_USDHC2_DATA0 1 86988cc9fc4SAisheng Dong #define IMX8QM_USDHC2_DATA0_LSIO_GPIO5_IO26 IMX8QM_USDHC2_DATA0 3 87088cc9fc4SAisheng Dong #define IMX8QM_USDHC2_DATA1_CONN_USDHC2_DATA1 IMX8QM_USDHC2_DATA1 0 87188cc9fc4SAisheng Dong #define IMX8QM_USDHC2_DATA1_DMA_UART4_TX IMX8QM_USDHC2_DATA1 1 87288cc9fc4SAisheng Dong #define IMX8QM_USDHC2_DATA1_LSIO_GPIO5_IO27 IMX8QM_USDHC2_DATA1 3 87388cc9fc4SAisheng Dong #define IMX8QM_USDHC2_DATA2_CONN_USDHC2_DATA2 IMX8QM_USDHC2_DATA2 0 87488cc9fc4SAisheng Dong #define IMX8QM_USDHC2_DATA2_DMA_UART4_CTS_B IMX8QM_USDHC2_DATA2 1 87588cc9fc4SAisheng Dong #define IMX8QM_USDHC2_DATA2_LSIO_GPIO5_IO28 IMX8QM_USDHC2_DATA2 3 87688cc9fc4SAisheng Dong #define IMX8QM_USDHC2_DATA3_CONN_USDHC2_DATA3 IMX8QM_USDHC2_DATA3 0 87788cc9fc4SAisheng Dong #define IMX8QM_USDHC2_DATA3_DMA_UART4_RTS_B IMX8QM_USDHC2_DATA3 1 87888cc9fc4SAisheng Dong #define IMX8QM_USDHC2_DATA3_LSIO_GPIO5_IO29 IMX8QM_USDHC2_DATA3 3 87988cc9fc4SAisheng Dong #define IMX8QM_ENET0_RGMII_TXC_CONN_ENET0_RGMII_TXC IMX8QM_ENET0_RGMII_TXC 0 88088cc9fc4SAisheng Dong #define IMX8QM_ENET0_RGMII_TXC_CONN_ENET0_RCLK50M_OUT IMX8QM_ENET0_RGMII_TXC 1 88188cc9fc4SAisheng Dong #define IMX8QM_ENET0_RGMII_TXC_CONN_ENET0_RCLK50M_IN IMX8QM_ENET0_RGMII_TXC 2 88288cc9fc4SAisheng Dong #define IMX8QM_ENET0_RGMII_TXC_LSIO_GPIO5_IO30 IMX8QM_ENET0_RGMII_TXC 3 88388cc9fc4SAisheng Dong #define IMX8QM_ENET0_RGMII_TX_CTL_CONN_ENET0_RGMII_TX_CTL IMX8QM_ENET0_RGMII_TX_CTL 0 88488cc9fc4SAisheng Dong #define IMX8QM_ENET0_RGMII_TX_CTL_LSIO_GPIO5_IO31 IMX8QM_ENET0_RGMII_TX_CTL 3 88588cc9fc4SAisheng Dong #define IMX8QM_ENET0_RGMII_TXD0_CONN_ENET0_RGMII_TXD0 IMX8QM_ENET0_RGMII_TXD0 0 88688cc9fc4SAisheng Dong #define IMX8QM_ENET0_RGMII_TXD0_LSIO_GPIO6_IO00 IMX8QM_ENET0_RGMII_TXD0 3 88788cc9fc4SAisheng Dong #define IMX8QM_ENET0_RGMII_TXD1_CONN_ENET0_RGMII_TXD1 IMX8QM_ENET0_RGMII_TXD1 0 88888cc9fc4SAisheng Dong #define IMX8QM_ENET0_RGMII_TXD1_LSIO_GPIO6_IO01 IMX8QM_ENET0_RGMII_TXD1 3 88988cc9fc4SAisheng Dong #define IMX8QM_ENET0_RGMII_TXD2_CONN_ENET0_RGMII_TXD2 IMX8QM_ENET0_RGMII_TXD2 0 89088cc9fc4SAisheng Dong #define IMX8QM_ENET0_RGMII_TXD2_DMA_UART3_TX IMX8QM_ENET0_RGMII_TXD2 1 89188cc9fc4SAisheng Dong #define IMX8QM_ENET0_RGMII_TXD2_VPU_TSI_S1_VID IMX8QM_ENET0_RGMII_TXD2 2 89288cc9fc4SAisheng Dong #define IMX8QM_ENET0_RGMII_TXD2_LSIO_GPIO6_IO02 IMX8QM_ENET0_RGMII_TXD2 3 89388cc9fc4SAisheng Dong #define IMX8QM_ENET0_RGMII_TXD3_CONN_ENET0_RGMII_TXD3 IMX8QM_ENET0_RGMII_TXD3 0 89488cc9fc4SAisheng Dong #define IMX8QM_ENET0_RGMII_TXD3_DMA_UART3_RTS_B IMX8QM_ENET0_RGMII_TXD3 1 89588cc9fc4SAisheng Dong #define IMX8QM_ENET0_RGMII_TXD3_VPU_TSI_S1_SYNC IMX8QM_ENET0_RGMII_TXD3 2 89688cc9fc4SAisheng Dong #define IMX8QM_ENET0_RGMII_TXD3_LSIO_GPIO6_IO03 IMX8QM_ENET0_RGMII_TXD3 3 89788cc9fc4SAisheng Dong #define IMX8QM_ENET0_RGMII_RXC_CONN_ENET0_RGMII_RXC IMX8QM_ENET0_RGMII_RXC 0 89888cc9fc4SAisheng Dong #define IMX8QM_ENET0_RGMII_RXC_DMA_UART3_CTS_B IMX8QM_ENET0_RGMII_RXC 1 89988cc9fc4SAisheng Dong #define IMX8QM_ENET0_RGMII_RXC_VPU_TSI_S1_DATA IMX8QM_ENET0_RGMII_RXC 2 90088cc9fc4SAisheng Dong #define IMX8QM_ENET0_RGMII_RXC_LSIO_GPIO6_IO04 IMX8QM_ENET0_RGMII_RXC 3 90188cc9fc4SAisheng Dong #define IMX8QM_ENET0_RGMII_RX_CTL_CONN_ENET0_RGMII_RX_CTL IMX8QM_ENET0_RGMII_RX_CTL 0 90288cc9fc4SAisheng Dong #define IMX8QM_ENET0_RGMII_RX_CTL_VPU_TSI_S0_VID IMX8QM_ENET0_RGMII_RX_CTL 2 90388cc9fc4SAisheng Dong #define IMX8QM_ENET0_RGMII_RX_CTL_LSIO_GPIO6_IO05 IMX8QM_ENET0_RGMII_RX_CTL 3 90488cc9fc4SAisheng Dong #define IMX8QM_ENET0_RGMII_RXD0_CONN_ENET0_RGMII_RXD0 IMX8QM_ENET0_RGMII_RXD0 0 90588cc9fc4SAisheng Dong #define IMX8QM_ENET0_RGMII_RXD0_VPU_TSI_S0_SYNC IMX8QM_ENET0_RGMII_RXD0 2 90688cc9fc4SAisheng Dong #define IMX8QM_ENET0_RGMII_RXD0_LSIO_GPIO6_IO06 IMX8QM_ENET0_RGMII_RXD0 3 90788cc9fc4SAisheng Dong #define IMX8QM_ENET0_RGMII_RXD1_CONN_ENET0_RGMII_RXD1 IMX8QM_ENET0_RGMII_RXD1 0 90888cc9fc4SAisheng Dong #define IMX8QM_ENET0_RGMII_RXD1_VPU_TSI_S0_DATA IMX8QM_ENET0_RGMII_RXD1 2 90988cc9fc4SAisheng Dong #define IMX8QM_ENET0_RGMII_RXD1_LSIO_GPIO6_IO07 IMX8QM_ENET0_RGMII_RXD1 3 91088cc9fc4SAisheng Dong #define IMX8QM_ENET0_RGMII_RXD2_CONN_ENET0_RGMII_RXD2 IMX8QM_ENET0_RGMII_RXD2 0 91188cc9fc4SAisheng Dong #define IMX8QM_ENET0_RGMII_RXD2_CONN_ENET0_RMII_RX_ER IMX8QM_ENET0_RGMII_RXD2 1 91288cc9fc4SAisheng Dong #define IMX8QM_ENET0_RGMII_RXD2_VPU_TSI_S0_CLK IMX8QM_ENET0_RGMII_RXD2 2 91388cc9fc4SAisheng Dong #define IMX8QM_ENET0_RGMII_RXD2_LSIO_GPIO6_IO08 IMX8QM_ENET0_RGMII_RXD2 3 91488cc9fc4SAisheng Dong #define IMX8QM_ENET0_RGMII_RXD3_CONN_ENET0_RGMII_RXD3 IMX8QM_ENET0_RGMII_RXD3 0 91588cc9fc4SAisheng Dong #define IMX8QM_ENET0_RGMII_RXD3_DMA_UART3_RX IMX8QM_ENET0_RGMII_RXD3 1 91688cc9fc4SAisheng Dong #define IMX8QM_ENET0_RGMII_RXD3_VPU_TSI_S1_CLK IMX8QM_ENET0_RGMII_RXD3 2 91788cc9fc4SAisheng Dong #define IMX8QM_ENET0_RGMII_RXD3_LSIO_GPIO6_IO09 IMX8QM_ENET0_RGMII_RXD3 3 91888cc9fc4SAisheng Dong #define IMX8QM_ENET1_RGMII_TXC_CONN_ENET1_RGMII_TXC IMX8QM_ENET1_RGMII_TXC 0 91988cc9fc4SAisheng Dong #define IMX8QM_ENET1_RGMII_TXC_CONN_ENET1_RCLK50M_OUT IMX8QM_ENET1_RGMII_TXC 1 92088cc9fc4SAisheng Dong #define IMX8QM_ENET1_RGMII_TXC_CONN_ENET1_RCLK50M_IN IMX8QM_ENET1_RGMII_TXC 2 92188cc9fc4SAisheng Dong #define IMX8QM_ENET1_RGMII_TXC_LSIO_GPIO6_IO10 IMX8QM_ENET1_RGMII_TXC 3 92288cc9fc4SAisheng Dong #define IMX8QM_ENET1_RGMII_TX_CTL_CONN_ENET1_RGMII_TX_CTL IMX8QM_ENET1_RGMII_TX_CTL 0 92388cc9fc4SAisheng Dong #define IMX8QM_ENET1_RGMII_TX_CTL_LSIO_GPIO6_IO11 IMX8QM_ENET1_RGMII_TX_CTL 3 92488cc9fc4SAisheng Dong #define IMX8QM_ENET1_RGMII_TXD0_CONN_ENET1_RGMII_TXD0 IMX8QM_ENET1_RGMII_TXD0 0 92588cc9fc4SAisheng Dong #define IMX8QM_ENET1_RGMII_TXD0_LSIO_GPIO6_IO12 IMX8QM_ENET1_RGMII_TXD0 3 92688cc9fc4SAisheng Dong #define IMX8QM_ENET1_RGMII_TXD1_CONN_ENET1_RGMII_TXD1 IMX8QM_ENET1_RGMII_TXD1 0 92788cc9fc4SAisheng Dong #define IMX8QM_ENET1_RGMII_TXD1_LSIO_GPIO6_IO13 IMX8QM_ENET1_RGMII_TXD1 3 92888cc9fc4SAisheng Dong #define IMX8QM_ENET1_RGMII_TXD2_CONN_ENET1_RGMII_TXD2 IMX8QM_ENET1_RGMII_TXD2 0 92988cc9fc4SAisheng Dong #define IMX8QM_ENET1_RGMII_TXD2_DMA_UART3_TX IMX8QM_ENET1_RGMII_TXD2 1 93088cc9fc4SAisheng Dong #define IMX8QM_ENET1_RGMII_TXD2_VPU_TSI_S1_VID IMX8QM_ENET1_RGMII_TXD2 2 93188cc9fc4SAisheng Dong #define IMX8QM_ENET1_RGMII_TXD2_LSIO_GPIO6_IO14 IMX8QM_ENET1_RGMII_TXD2 3 93288cc9fc4SAisheng Dong #define IMX8QM_ENET1_RGMII_TXD3_CONN_ENET1_RGMII_TXD3 IMX8QM_ENET1_RGMII_TXD3 0 93388cc9fc4SAisheng Dong #define IMX8QM_ENET1_RGMII_TXD3_DMA_UART3_RTS_B IMX8QM_ENET1_RGMII_TXD3 1 93488cc9fc4SAisheng Dong #define IMX8QM_ENET1_RGMII_TXD3_VPU_TSI_S1_SYNC IMX8QM_ENET1_RGMII_TXD3 2 93588cc9fc4SAisheng Dong #define IMX8QM_ENET1_RGMII_TXD3_LSIO_GPIO6_IO15 IMX8QM_ENET1_RGMII_TXD3 3 93688cc9fc4SAisheng Dong #define IMX8QM_ENET1_RGMII_RXC_CONN_ENET1_RGMII_RXC IMX8QM_ENET1_RGMII_RXC 0 93788cc9fc4SAisheng Dong #define IMX8QM_ENET1_RGMII_RXC_DMA_UART3_CTS_B IMX8QM_ENET1_RGMII_RXC 1 93888cc9fc4SAisheng Dong #define IMX8QM_ENET1_RGMII_RXC_VPU_TSI_S1_DATA IMX8QM_ENET1_RGMII_RXC 2 93988cc9fc4SAisheng Dong #define IMX8QM_ENET1_RGMII_RXC_LSIO_GPIO6_IO16 IMX8QM_ENET1_RGMII_RXC 3 94088cc9fc4SAisheng Dong #define IMX8QM_ENET1_RGMII_RX_CTL_CONN_ENET1_RGMII_RX_CTL IMX8QM_ENET1_RGMII_RX_CTL 0 94188cc9fc4SAisheng Dong #define IMX8QM_ENET1_RGMII_RX_CTL_VPU_TSI_S0_VID IMX8QM_ENET1_RGMII_RX_CTL 2 94288cc9fc4SAisheng Dong #define IMX8QM_ENET1_RGMII_RX_CTL_LSIO_GPIO6_IO17 IMX8QM_ENET1_RGMII_RX_CTL 3 94388cc9fc4SAisheng Dong #define IMX8QM_ENET1_RGMII_RXD0_CONN_ENET1_RGMII_RXD0 IMX8QM_ENET1_RGMII_RXD0 0 94488cc9fc4SAisheng Dong #define IMX8QM_ENET1_RGMII_RXD0_VPU_TSI_S0_SYNC IMX8QM_ENET1_RGMII_RXD0 2 94588cc9fc4SAisheng Dong #define IMX8QM_ENET1_RGMII_RXD0_LSIO_GPIO6_IO18 IMX8QM_ENET1_RGMII_RXD0 3 94688cc9fc4SAisheng Dong #define IMX8QM_ENET1_RGMII_RXD1_CONN_ENET1_RGMII_RXD1 IMX8QM_ENET1_RGMII_RXD1 0 94788cc9fc4SAisheng Dong #define IMX8QM_ENET1_RGMII_RXD1_VPU_TSI_S0_DATA IMX8QM_ENET1_RGMII_RXD1 2 94888cc9fc4SAisheng Dong #define IMX8QM_ENET1_RGMII_RXD1_LSIO_GPIO6_IO19 IMX8QM_ENET1_RGMII_RXD1 3 94988cc9fc4SAisheng Dong #define IMX8QM_ENET1_RGMII_RXD2_CONN_ENET1_RGMII_RXD2 IMX8QM_ENET1_RGMII_RXD2 0 95088cc9fc4SAisheng Dong #define IMX8QM_ENET1_RGMII_RXD2_CONN_ENET1_RMII_RX_ER IMX8QM_ENET1_RGMII_RXD2 1 95188cc9fc4SAisheng Dong #define IMX8QM_ENET1_RGMII_RXD2_VPU_TSI_S0_CLK IMX8QM_ENET1_RGMII_RXD2 2 95288cc9fc4SAisheng Dong #define IMX8QM_ENET1_RGMII_RXD2_LSIO_GPIO6_IO20 IMX8QM_ENET1_RGMII_RXD2 3 95388cc9fc4SAisheng Dong #define IMX8QM_ENET1_RGMII_RXD3_CONN_ENET1_RGMII_RXD3 IMX8QM_ENET1_RGMII_RXD3 0 95488cc9fc4SAisheng Dong #define IMX8QM_ENET1_RGMII_RXD3_DMA_UART3_RX IMX8QM_ENET1_RGMII_RXD3 1 95588cc9fc4SAisheng Dong #define IMX8QM_ENET1_RGMII_RXD3_VPU_TSI_S1_CLK IMX8QM_ENET1_RGMII_RXD3 2 95688cc9fc4SAisheng Dong #define IMX8QM_ENET1_RGMII_RXD3_LSIO_GPIO6_IO21 IMX8QM_ENET1_RGMII_RXD3 3 95788cc9fc4SAisheng Dong #define IMX8QM_COMP_CTL_GPIO_1V8_3V3_ENET_ENETB_PAD IMX8QM_COMP_CTL_GPIO_1V8_3V3_ENET_ENETB 0 95888cc9fc4SAisheng Dong #define IMX8QM_COMP_CTL_GPIO_1V8_3V3_ENET_ENETA_PAD IMX8QM_COMP_CTL_GPIO_1V8_3V3_ENET_ENETA 0 95988cc9fc4SAisheng Dong 96088cc9fc4SAisheng Dong #endif /* _IMX8QM_PADS_H */ 961