1b2441318SGreg Kroah-Hartman /* SPDX-License-Identifier: GPL-2.0 */
210a3472aSFlorian Vaussard /*
310a3472aSFlorian Vaussard  * This header provides constants for OMAP pinctrl bindings.
410a3472aSFlorian Vaussard  *
510a3472aSFlorian Vaussard  * Copyright (C) 2009 Nokia
610a3472aSFlorian Vaussard  * Copyright (C) 2009-2010 Texas Instruments
710a3472aSFlorian Vaussard  */
810a3472aSFlorian Vaussard 
9ac25da7fSFlorian Vaussard #ifndef _DT_BINDINGS_PINCTRL_OMAP_H
10ac25da7fSFlorian Vaussard #define _DT_BINDINGS_PINCTRL_OMAP_H
11ac25da7fSFlorian Vaussard 
1210a3472aSFlorian Vaussard /* 34xx mux mode options for each pin. See TRM for options */
1310a3472aSFlorian Vaussard #define MUX_MODE0	0
1410a3472aSFlorian Vaussard #define MUX_MODE1	1
1510a3472aSFlorian Vaussard #define MUX_MODE2	2
1610a3472aSFlorian Vaussard #define MUX_MODE3	3
1710a3472aSFlorian Vaussard #define MUX_MODE4	4
1810a3472aSFlorian Vaussard #define MUX_MODE5	5
1910a3472aSFlorian Vaussard #define MUX_MODE6	6
2010a3472aSFlorian Vaussard #define MUX_MODE7	7
2110a3472aSFlorian Vaussard 
2210a3472aSFlorian Vaussard /* 24xx/34xx mux bit defines */
2310a3472aSFlorian Vaussard #define PULL_ENA		(1 << 3)
2410a3472aSFlorian Vaussard #define PULL_UP			(1 << 4)
2510a3472aSFlorian Vaussard #define ALTELECTRICALSEL	(1 << 5)
2610a3472aSFlorian Vaussard 
27d623a0e1STony Lindgren /* omap3/4/5 specific mux bit defines */
2810a3472aSFlorian Vaussard #define INPUT_EN		(1 << 8)
2910a3472aSFlorian Vaussard #define OFF_EN			(1 << 9)
3010a3472aSFlorian Vaussard #define OFFOUT_EN		(1 << 10)
3110a3472aSFlorian Vaussard #define OFFOUT_VAL		(1 << 11)
3210a3472aSFlorian Vaussard #define OFF_PULL_EN		(1 << 12)
3310a3472aSFlorian Vaussard #define OFF_PULL_UP		(1 << 13)
3410a3472aSFlorian Vaussard #define WAKEUP_EN		(1 << 14)
3510a3472aSFlorian Vaussard #define WAKEUP_EVENT		(1 << 15)
3610a3472aSFlorian Vaussard 
3710a3472aSFlorian Vaussard /* Active pin states */
3810a3472aSFlorian Vaussard #define PIN_OUTPUT		0
3910a3472aSFlorian Vaussard #define PIN_OUTPUT_PULLUP	(PIN_OUTPUT | PULL_ENA | PULL_UP)
4010a3472aSFlorian Vaussard #define PIN_OUTPUT_PULLDOWN	(PIN_OUTPUT | PULL_ENA)
4110a3472aSFlorian Vaussard #define PIN_INPUT		INPUT_EN
4210a3472aSFlorian Vaussard #define PIN_INPUT_PULLUP	(PULL_ENA | INPUT_EN | PULL_UP)
4310a3472aSFlorian Vaussard #define PIN_INPUT_PULLDOWN	(PULL_ENA | INPUT_EN)
4410a3472aSFlorian Vaussard 
4510a3472aSFlorian Vaussard /* Off mode states */
4610a3472aSFlorian Vaussard #define PIN_OFF_NONE		0
4710a3472aSFlorian Vaussard #define PIN_OFF_OUTPUT_HIGH	(OFF_EN | OFFOUT_EN | OFFOUT_VAL)
4810a3472aSFlorian Vaussard #define PIN_OFF_OUTPUT_LOW	(OFF_EN | OFFOUT_EN)
49d97556c8STony Lindgren #define PIN_OFF_INPUT_PULLUP	(OFF_EN | OFFOUT_EN | OFF_PULL_EN | OFF_PULL_UP)
50d97556c8STony Lindgren #define PIN_OFF_INPUT_PULLDOWN	(OFF_EN | OFFOUT_EN | OFF_PULL_EN)
5110a3472aSFlorian Vaussard #define PIN_OFF_WAKEUPENABLE	WAKEUP_EN
5210a3472aSFlorian Vaussard 
5343a348eaSTony Lindgren /*
5443a348eaSTony Lindgren  * Macros to allow using the absolute physical address instead of the
5543a348eaSTony Lindgren  * padconf registers instead of the offset from padconf base.
5643a348eaSTony Lindgren  */
5743a348eaSTony Lindgren #define OMAP_IOPAD_OFFSET(pa, offset)	(((pa) & 0xffff) - (offset))
5843a348eaSTony Lindgren 
5943a348eaSTony Lindgren #define OMAP2420_CORE_IOPAD(pa, val)	OMAP_IOPAD_OFFSET((pa), 0x0030) (val)
6043a348eaSTony Lindgren #define OMAP2430_CORE_IOPAD(pa, val)	OMAP_IOPAD_OFFSET((pa), 0x2030) (val)
6143a348eaSTony Lindgren #define OMAP3_CORE1_IOPAD(pa, val)	OMAP_IOPAD_OFFSET((pa), 0x2030) (val)
6243a348eaSTony Lindgren #define OMAP3430_CORE2_IOPAD(pa, val)	OMAP_IOPAD_OFFSET((pa), 0x25d8) (val)
6343a348eaSTony Lindgren #define OMAP3630_CORE2_IOPAD(pa, val)	OMAP_IOPAD_OFFSET((pa), 0x25a0) (val)
6443a348eaSTony Lindgren #define OMAP3_WKUP_IOPAD(pa, val)	OMAP_IOPAD_OFFSET((pa), 0x2a00) (val)
65b4d6df2aSTony Lindgren #define DM814X_IOPAD(pa, val)		OMAP_IOPAD_OFFSET((pa), 0x0800) (val)
66ac7452ceSTony Lindgren #define DM816X_IOPAD(pa, val)		OMAP_IOPAD_OFFSET((pa), 0x0800) (val)
67b753e41dSDrew Fustini #define AM33XX_IOPAD(pa, val)		OMAP_IOPAD_OFFSET((pa), 0x0800) (val) (0)
6827c90e5eSDrew Fustini #define AM33XX_PADCONF(pa, conf, mux)	OMAP_IOPAD_OFFSET((pa), 0x0800) (conf) (mux)
6943a348eaSTony Lindgren 
7031f0820aSTony Lindgren /*
714b466297SJoachim Eastwood  * Macros to allow using the offset from the padconf physical address
724b466297SJoachim Eastwood  * instead  of the offset from padconf base.
734b466297SJoachim Eastwood  */
744b466297SJoachim Eastwood #define OMAP_PADCONF_OFFSET(offset, base_offset)	((offset) - (base_offset))
754b466297SJoachim Eastwood 
764b466297SJoachim Eastwood #define OMAP4_IOPAD(offset, val)	OMAP_PADCONF_OFFSET((offset), 0x0040) (val)
774b466297SJoachim Eastwood #define OMAP5_IOPAD(offset, val)	OMAP_PADCONF_OFFSET((offset), 0x0040) (val)
784b466297SJoachim Eastwood 
79755a9ba7SLinus Torvalds /*
8031f0820aSTony Lindgren  * Define some commonly used pins configured by the boards.
8131f0820aSTony Lindgren  * Note that some boards use alternative pins, so check
8231f0820aSTony Lindgren  * the schematics before using these.
8331f0820aSTony Lindgren  */
8431f0820aSTony Lindgren #define OMAP3_UART1_RX		0x152
8531f0820aSTony Lindgren #define OMAP3_UART2_RX		0x14a
8631f0820aSTony Lindgren #define OMAP3_UART3_RX		0x16e
8731f0820aSTony Lindgren #define OMAP4_UART2_RX		0xdc
8831f0820aSTony Lindgren #define OMAP4_UART3_RX		0x104
8931f0820aSTony Lindgren #define OMAP4_UART4_RX		0x11c
9031f0820aSTony Lindgren 
91ac25da7fSFlorian Vaussard #endif
92ac25da7fSFlorian Vaussard 
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