1*9f1bdd7eSHui.Liu /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
2*9f1bdd7eSHui.Liu /*
3*9f1bdd7eSHui.Liu  * Copyright (C) 2022 MediaTek Inc.
4*9f1bdd7eSHui.Liu  * Author: Hui Liu <hui.liu@mediatek.com>
5*9f1bdd7eSHui.Liu  */
6*9f1bdd7eSHui.Liu 
7*9f1bdd7eSHui.Liu #ifndef __MEDIATEK_MT8188_PINFUNC_H
8*9f1bdd7eSHui.Liu #define __MEDIATEK_MT8188_PINFUNC_H
9*9f1bdd7eSHui.Liu 
10*9f1bdd7eSHui.Liu #include "mt65xx.h"
11*9f1bdd7eSHui.Liu 
12*9f1bdd7eSHui.Liu #define PINMUX_GPIO0__FUNC_B_GPIO0 (MTK_PIN_NO(0) | 0)
13*9f1bdd7eSHui.Liu #define PINMUX_GPIO0__FUNC_B0_TP_GPIO0_AO (MTK_PIN_NO(0) | 1)
14*9f1bdd7eSHui.Liu #define PINMUX_GPIO0__FUNC_O_SPIM5_CSB (MTK_PIN_NO(0) | 2)
15*9f1bdd7eSHui.Liu #define PINMUX_GPIO0__FUNC_O_UTXD1 (MTK_PIN_NO(0) | 3)
16*9f1bdd7eSHui.Liu #define PINMUX_GPIO0__FUNC_O_DMIC3_CLK (MTK_PIN_NO(0) | 4)
17*9f1bdd7eSHui.Liu #define PINMUX_GPIO0__FUNC_B0_I2SIN_MCK (MTK_PIN_NO(0) | 5)
18*9f1bdd7eSHui.Liu #define PINMUX_GPIO0__FUNC_O_I2SO2_MCK (MTK_PIN_NO(0) | 6)
19*9f1bdd7eSHui.Liu #define PINMUX_GPIO0__FUNC_B0_DBG_MON_A0 (MTK_PIN_NO(0) | 7)
20*9f1bdd7eSHui.Liu 
21*9f1bdd7eSHui.Liu #define PINMUX_GPIO1__FUNC_B_GPIO1 (MTK_PIN_NO(1) | 0)
22*9f1bdd7eSHui.Liu #define PINMUX_GPIO1__FUNC_B0_TP_GPIO1_AO (MTK_PIN_NO(1) | 1)
23*9f1bdd7eSHui.Liu #define PINMUX_GPIO1__FUNC_O_SPIM5_CLK (MTK_PIN_NO(1) | 2)
24*9f1bdd7eSHui.Liu #define PINMUX_GPIO1__FUNC_I1_URXD1 (MTK_PIN_NO(1) | 3)
25*9f1bdd7eSHui.Liu #define PINMUX_GPIO1__FUNC_I0_DMIC3_DAT (MTK_PIN_NO(1) | 4)
26*9f1bdd7eSHui.Liu #define PINMUX_GPIO1__FUNC_B0_I2SIN_BCK (MTK_PIN_NO(1) | 5)
27*9f1bdd7eSHui.Liu #define PINMUX_GPIO1__FUNC_B0_I2SO2_BCK (MTK_PIN_NO(1) | 6)
28*9f1bdd7eSHui.Liu #define PINMUX_GPIO1__FUNC_B0_DBG_MON_A1 (MTK_PIN_NO(1) | 7)
29*9f1bdd7eSHui.Liu 
30*9f1bdd7eSHui.Liu #define PINMUX_GPIO2__FUNC_B_GPIO2 (MTK_PIN_NO(2) | 0)
31*9f1bdd7eSHui.Liu #define PINMUX_GPIO2__FUNC_B0_TP_GPIO2_AO (MTK_PIN_NO(2) | 1)
32*9f1bdd7eSHui.Liu #define PINMUX_GPIO2__FUNC_B0_SPIM5_MOSI (MTK_PIN_NO(2) | 2)
33*9f1bdd7eSHui.Liu #define PINMUX_GPIO2__FUNC_O_URTS1 (MTK_PIN_NO(2) | 3)
34*9f1bdd7eSHui.Liu #define PINMUX_GPIO2__FUNC_I0_DMIC3_DAT_R (MTK_PIN_NO(2) | 4)
35*9f1bdd7eSHui.Liu #define PINMUX_GPIO2__FUNC_B0_I2SIN_WS (MTK_PIN_NO(2) | 5)
36*9f1bdd7eSHui.Liu #define PINMUX_GPIO2__FUNC_B0_I2SO2_WS (MTK_PIN_NO(2) | 6)
37*9f1bdd7eSHui.Liu #define PINMUX_GPIO2__FUNC_B0_DBG_MON_A2 (MTK_PIN_NO(2) | 7)
38*9f1bdd7eSHui.Liu 
39*9f1bdd7eSHui.Liu #define PINMUX_GPIO3__FUNC_B_GPIO3 (MTK_PIN_NO(3) | 0)
40*9f1bdd7eSHui.Liu #define PINMUX_GPIO3__FUNC_B0_TP_GPIO3_AO (MTK_PIN_NO(3) | 1)
41*9f1bdd7eSHui.Liu #define PINMUX_GPIO3__FUNC_B0_SPIM5_MISO (MTK_PIN_NO(3) | 2)
42*9f1bdd7eSHui.Liu #define PINMUX_GPIO3__FUNC_I1_UCTS1 (MTK_PIN_NO(3) | 3)
43*9f1bdd7eSHui.Liu #define PINMUX_GPIO3__FUNC_O_DMIC4_CLK (MTK_PIN_NO(3) | 4)
44*9f1bdd7eSHui.Liu #define PINMUX_GPIO3__FUNC_I0_I2SIN_D0 (MTK_PIN_NO(3) | 5)
45*9f1bdd7eSHui.Liu #define PINMUX_GPIO3__FUNC_O_I2SO2_D0 (MTK_PIN_NO(3) | 6)
46*9f1bdd7eSHui.Liu #define PINMUX_GPIO3__FUNC_B0_DBG_MON_A3 (MTK_PIN_NO(3) | 7)
47*9f1bdd7eSHui.Liu 
48*9f1bdd7eSHui.Liu #define PINMUX_GPIO4__FUNC_B_GPIO4 (MTK_PIN_NO(4) | 0)
49*9f1bdd7eSHui.Liu #define PINMUX_GPIO4__FUNC_B0_TP_GPIO4_AO (MTK_PIN_NO(4) | 1)
50*9f1bdd7eSHui.Liu #define PINMUX_GPIO4__FUNC_I0_SPDIF_IN2 (MTK_PIN_NO(4) | 2)
51*9f1bdd7eSHui.Liu #define PINMUX_GPIO4__FUNC_O_I2SO1_MCK (MTK_PIN_NO(4) | 3)
52*9f1bdd7eSHui.Liu #define PINMUX_GPIO4__FUNC_I0_DMIC4_DAT (MTK_PIN_NO(4) | 4)
53*9f1bdd7eSHui.Liu #define PINMUX_GPIO4__FUNC_I0_I2SIN_D1 (MTK_PIN_NO(4) | 5)
54*9f1bdd7eSHui.Liu #define PINMUX_GPIO4__FUNC_O_I2SO2_D1 (MTK_PIN_NO(4) | 6)
55*9f1bdd7eSHui.Liu #define PINMUX_GPIO4__FUNC_B0_DBG_MON_A4 (MTK_PIN_NO(4) | 7)
56*9f1bdd7eSHui.Liu 
57*9f1bdd7eSHui.Liu #define PINMUX_GPIO5__FUNC_B_GPIO5 (MTK_PIN_NO(5) | 0)
58*9f1bdd7eSHui.Liu #define PINMUX_GPIO5__FUNC_B0_TP_GPIO5_AO (MTK_PIN_NO(5) | 1)
59*9f1bdd7eSHui.Liu #define PINMUX_GPIO5__FUNC_I0_SPDIF_IN1 (MTK_PIN_NO(5) | 2)
60*9f1bdd7eSHui.Liu #define PINMUX_GPIO5__FUNC_O_I2SO1_BCK (MTK_PIN_NO(5) | 3)
61*9f1bdd7eSHui.Liu #define PINMUX_GPIO5__FUNC_I0_DMIC4_DAT_R (MTK_PIN_NO(5) | 4)
62*9f1bdd7eSHui.Liu #define PINMUX_GPIO5__FUNC_I0_I2SIN_D2 (MTK_PIN_NO(5) | 5)
63*9f1bdd7eSHui.Liu #define PINMUX_GPIO5__FUNC_O_I2SO2_D2 (MTK_PIN_NO(5) | 6)
64*9f1bdd7eSHui.Liu #define PINMUX_GPIO5__FUNC_B0_DBG_MON_A5 (MTK_PIN_NO(5) | 7)
65*9f1bdd7eSHui.Liu 
66*9f1bdd7eSHui.Liu #define PINMUX_GPIO6__FUNC_B_GPIO6 (MTK_PIN_NO(6) | 0)
67*9f1bdd7eSHui.Liu #define PINMUX_GPIO6__FUNC_B0_TP_GPIO6_AO (MTK_PIN_NO(6) | 1)
68*9f1bdd7eSHui.Liu #define PINMUX_GPIO6__FUNC_I0_SPDIF_IN0 (MTK_PIN_NO(6) | 2)
69*9f1bdd7eSHui.Liu #define PINMUX_GPIO6__FUNC_O_I2SO1_WS (MTK_PIN_NO(6) | 3)
70*9f1bdd7eSHui.Liu #define PINMUX_GPIO6__FUNC_O_DMIC1_CLK (MTK_PIN_NO(6) | 4)
71*9f1bdd7eSHui.Liu #define PINMUX_GPIO6__FUNC_I0_I2SIN_D3 (MTK_PIN_NO(6) | 5)
72*9f1bdd7eSHui.Liu #define PINMUX_GPIO6__FUNC_O_I2SO2_D3 (MTK_PIN_NO(6) | 6)
73*9f1bdd7eSHui.Liu #define PINMUX_GPIO6__FUNC_B0_MD32_0_GPIO0 (MTK_PIN_NO(6) | 7)
74*9f1bdd7eSHui.Liu 
75*9f1bdd7eSHui.Liu #define PINMUX_GPIO7__FUNC_B_GPIO7 (MTK_PIN_NO(7) | 0)
76*9f1bdd7eSHui.Liu #define PINMUX_GPIO7__FUNC_B0_TP_GPIO7_AO (MTK_PIN_NO(7) | 1)
77*9f1bdd7eSHui.Liu #define PINMUX_GPIO7__FUNC_O_SPIM3_CSB (MTK_PIN_NO(7) | 2)
78*9f1bdd7eSHui.Liu #define PINMUX_GPIO7__FUNC_B0_TDMIN_MCK (MTK_PIN_NO(7) | 3)
79*9f1bdd7eSHui.Liu #define PINMUX_GPIO7__FUNC_I0_DMIC1_DAT (MTK_PIN_NO(7) | 4)
80*9f1bdd7eSHui.Liu #define PINMUX_GPIO7__FUNC_O_CMVREF0 (MTK_PIN_NO(7) | 5)
81*9f1bdd7eSHui.Liu #define PINMUX_GPIO7__FUNC_O_CLKM0 (MTK_PIN_NO(7) | 6)
82*9f1bdd7eSHui.Liu #define PINMUX_GPIO7__FUNC_B0_DBG_MON_A6 (MTK_PIN_NO(7) | 7)
83*9f1bdd7eSHui.Liu 
84*9f1bdd7eSHui.Liu #define PINMUX_GPIO8__FUNC_B_GPIO8 (MTK_PIN_NO(8) | 0)
85*9f1bdd7eSHui.Liu #define PINMUX_GPIO8__FUNC_B0_TP_GPIO0_AO (MTK_PIN_NO(8) | 1)
86*9f1bdd7eSHui.Liu #define PINMUX_GPIO8__FUNC_O_SPIM3_CLK (MTK_PIN_NO(8) | 2)
87*9f1bdd7eSHui.Liu #define PINMUX_GPIO8__FUNC_B0_TDMIN_BCK (MTK_PIN_NO(8) | 3)
88*9f1bdd7eSHui.Liu #define PINMUX_GPIO8__FUNC_I0_DMIC1_DAT_R (MTK_PIN_NO(8) | 4)
89*9f1bdd7eSHui.Liu #define PINMUX_GPIO8__FUNC_O_CMVREF1 (MTK_PIN_NO(8) | 5)
90*9f1bdd7eSHui.Liu #define PINMUX_GPIO8__FUNC_O_CLKM1 (MTK_PIN_NO(8) | 6)
91*9f1bdd7eSHui.Liu #define PINMUX_GPIO8__FUNC_B0_DBG_MON_A7 (MTK_PIN_NO(8) | 7)
92*9f1bdd7eSHui.Liu 
93*9f1bdd7eSHui.Liu #define PINMUX_GPIO9__FUNC_B_GPIO9 (MTK_PIN_NO(9) | 0)
94*9f1bdd7eSHui.Liu #define PINMUX_GPIO9__FUNC_B0_TP_GPIO1_AO (MTK_PIN_NO(9) | 1)
95*9f1bdd7eSHui.Liu #define PINMUX_GPIO9__FUNC_B0_SPIM3_MOSI (MTK_PIN_NO(9) | 2)
96*9f1bdd7eSHui.Liu #define PINMUX_GPIO9__FUNC_B0_TDMIN_LRCK (MTK_PIN_NO(9) | 3)
97*9f1bdd7eSHui.Liu #define PINMUX_GPIO9__FUNC_O_DMIC2_CLK (MTK_PIN_NO(9) | 4)
98*9f1bdd7eSHui.Liu #define PINMUX_GPIO9__FUNC_O_CMFLASH0 (MTK_PIN_NO(9) | 5)
99*9f1bdd7eSHui.Liu #define PINMUX_GPIO9__FUNC_O_PWM_0 (MTK_PIN_NO(9) | 6)
100*9f1bdd7eSHui.Liu #define PINMUX_GPIO9__FUNC_B0_DBG_MON_A8 (MTK_PIN_NO(9) | 7)
101*9f1bdd7eSHui.Liu 
102*9f1bdd7eSHui.Liu #define PINMUX_GPIO10__FUNC_B_GPIO10 (MTK_PIN_NO(10) | 0)
103*9f1bdd7eSHui.Liu #define PINMUX_GPIO10__FUNC_B0_TP_GPIO2_AO (MTK_PIN_NO(10) | 1)
104*9f1bdd7eSHui.Liu #define PINMUX_GPIO10__FUNC_B0_SPIM3_MISO (MTK_PIN_NO(10) | 2)
105*9f1bdd7eSHui.Liu #define PINMUX_GPIO10__FUNC_I0_TDMIN_DI (MTK_PIN_NO(10) | 3)
106*9f1bdd7eSHui.Liu #define PINMUX_GPIO10__FUNC_I0_DMIC2_DAT (MTK_PIN_NO(10) | 4)
107*9f1bdd7eSHui.Liu #define PINMUX_GPIO10__FUNC_O_CMFLASH1 (MTK_PIN_NO(10) | 5)
108*9f1bdd7eSHui.Liu #define PINMUX_GPIO10__FUNC_O_PWM_1 (MTK_PIN_NO(10) | 6)
109*9f1bdd7eSHui.Liu #define PINMUX_GPIO10__FUNC_B0_DBG_MON_A9 (MTK_PIN_NO(10) | 7)
110*9f1bdd7eSHui.Liu 
111*9f1bdd7eSHui.Liu #define PINMUX_GPIO11__FUNC_B_GPIO11 (MTK_PIN_NO(11) | 0)
112*9f1bdd7eSHui.Liu #define PINMUX_GPIO11__FUNC_B0_TP_GPIO3_AO (MTK_PIN_NO(11) | 1)
113*9f1bdd7eSHui.Liu #define PINMUX_GPIO11__FUNC_O_SPDIF_OUT (MTK_PIN_NO(11) | 2)
114*9f1bdd7eSHui.Liu #define PINMUX_GPIO11__FUNC_O_I2SO1_D0 (MTK_PIN_NO(11) | 3)
115*9f1bdd7eSHui.Liu #define PINMUX_GPIO11__FUNC_I0_DMIC2_DAT_R (MTK_PIN_NO(11) | 4)
116*9f1bdd7eSHui.Liu #define PINMUX_GPIO11__FUNC_I0_DVFSRC_EXT_REQ (MTK_PIN_NO(11) | 5)
117*9f1bdd7eSHui.Liu #define PINMUX_GPIO11__FUNC_O_CMVREF6 (MTK_PIN_NO(11) | 6)
118*9f1bdd7eSHui.Liu #define PINMUX_GPIO11__FUNC_B0_DBG_MON_A10 (MTK_PIN_NO(11) | 7)
119*9f1bdd7eSHui.Liu 
120*9f1bdd7eSHui.Liu #define PINMUX_GPIO12__FUNC_B_GPIO12 (MTK_PIN_NO(12) | 0)
121*9f1bdd7eSHui.Liu #define PINMUX_GPIO12__FUNC_B0_TP_GPIO4_AO (MTK_PIN_NO(12) | 1)
122*9f1bdd7eSHui.Liu #define PINMUX_GPIO12__FUNC_O_SPIM4_CSB (MTK_PIN_NO(12) | 2)
123*9f1bdd7eSHui.Liu #define PINMUX_GPIO12__FUNC_B1_JTMS_SEL3 (MTK_PIN_NO(12) | 3)
124*9f1bdd7eSHui.Liu #define PINMUX_GPIO12__FUNC_B1_APU_JTAG_TMS (MTK_PIN_NO(12) | 4)
125*9f1bdd7eSHui.Liu #define PINMUX_GPIO12__FUNC_I0_VPU_UDI_TMS (MTK_PIN_NO(12) | 5)
126*9f1bdd7eSHui.Liu #define PINMUX_GPIO12__FUNC_I0_IPU_JTAG_TMS (MTK_PIN_NO(12) | 6)
127*9f1bdd7eSHui.Liu #define PINMUX_GPIO12__FUNC_I0_HDMITX20_HTPLG (MTK_PIN_NO(12) | 7)
128*9f1bdd7eSHui.Liu 
129*9f1bdd7eSHui.Liu #define PINMUX_GPIO13__FUNC_B_GPIO13 (MTK_PIN_NO(13) | 0)
130*9f1bdd7eSHui.Liu #define PINMUX_GPIO13__FUNC_B0_TP_GPIO5_AO (MTK_PIN_NO(13) | 1)
131*9f1bdd7eSHui.Liu #define PINMUX_GPIO13__FUNC_O_SPIM4_CLK (MTK_PIN_NO(13) | 2)
132*9f1bdd7eSHui.Liu #define PINMUX_GPIO13__FUNC_I0_JTCK_SEL3 (MTK_PIN_NO(13) | 3)
133*9f1bdd7eSHui.Liu #define PINMUX_GPIO13__FUNC_I0_APU_JTAG_TCK (MTK_PIN_NO(13) | 4)
134*9f1bdd7eSHui.Liu #define PINMUX_GPIO13__FUNC_I0_VPU_UDI_TCK (MTK_PIN_NO(13) | 5)
135*9f1bdd7eSHui.Liu #define PINMUX_GPIO13__FUNC_I0_IPU_JTAG_TCK (MTK_PIN_NO(13) | 6)
136*9f1bdd7eSHui.Liu #define PINMUX_GPIO13__FUNC_B1_HDMITX20_CEC (MTK_PIN_NO(13) | 7)
137*9f1bdd7eSHui.Liu 
138*9f1bdd7eSHui.Liu #define PINMUX_GPIO14__FUNC_B_GPIO14 (MTK_PIN_NO(14) | 0)
139*9f1bdd7eSHui.Liu #define PINMUX_GPIO14__FUNC_B0_TP_GPIO6_AO (MTK_PIN_NO(14) | 1)
140*9f1bdd7eSHui.Liu #define PINMUX_GPIO14__FUNC_B0_SPIM4_MOSI (MTK_PIN_NO(14) | 2)
141*9f1bdd7eSHui.Liu #define PINMUX_GPIO14__FUNC_I1_JTDI_SEL3 (MTK_PIN_NO(14) | 3)
142*9f1bdd7eSHui.Liu #define PINMUX_GPIO14__FUNC_I1_APU_JTAG_TDI (MTK_PIN_NO(14) | 4)
143*9f1bdd7eSHui.Liu #define PINMUX_GPIO14__FUNC_I0_VPU_UDI_TDI (MTK_PIN_NO(14) | 5)
144*9f1bdd7eSHui.Liu #define PINMUX_GPIO14__FUNC_I0_IPU_JTAG_TDI (MTK_PIN_NO(14) | 6)
145*9f1bdd7eSHui.Liu #define PINMUX_GPIO14__FUNC_B1_HDMITX20_SCL (MTK_PIN_NO(14) | 7)
146*9f1bdd7eSHui.Liu 
147*9f1bdd7eSHui.Liu #define PINMUX_GPIO15__FUNC_B_GPIO15 (MTK_PIN_NO(15) | 0)
148*9f1bdd7eSHui.Liu #define PINMUX_GPIO15__FUNC_B0_TP_GPIO7_AO (MTK_PIN_NO(15) | 1)
149*9f1bdd7eSHui.Liu #define PINMUX_GPIO15__FUNC_B0_SPIM4_MISO (MTK_PIN_NO(15) | 2)
150*9f1bdd7eSHui.Liu #define PINMUX_GPIO15__FUNC_O_JTDO_SEL3 (MTK_PIN_NO(15) | 3)
151*9f1bdd7eSHui.Liu #define PINMUX_GPIO15__FUNC_O_APU_JTAG_TDO (MTK_PIN_NO(15) | 4)
152*9f1bdd7eSHui.Liu #define PINMUX_GPIO15__FUNC_O_VPU_UDI_TDO (MTK_PIN_NO(15) | 5)
153*9f1bdd7eSHui.Liu #define PINMUX_GPIO15__FUNC_O_IPU_JTAG_TDO (MTK_PIN_NO(15) | 6)
154*9f1bdd7eSHui.Liu #define PINMUX_GPIO15__FUNC_B1_HDMITX20_SDA (MTK_PIN_NO(15) | 7)
155*9f1bdd7eSHui.Liu 
156*9f1bdd7eSHui.Liu #define PINMUX_GPIO16__FUNC_B_GPIO16 (MTK_PIN_NO(16) | 0)
157*9f1bdd7eSHui.Liu #define PINMUX_GPIO16__FUNC_B0_TP_GPIO0_AO (MTK_PIN_NO(16) | 1)
158*9f1bdd7eSHui.Liu #define PINMUX_GPIO16__FUNC_O_UTXD3 (MTK_PIN_NO(16) | 2)
159*9f1bdd7eSHui.Liu #define PINMUX_GPIO16__FUNC_I1_JTRSTn_SEL3 (MTK_PIN_NO(16) | 3)
160*9f1bdd7eSHui.Liu #define PINMUX_GPIO16__FUNC_I0_APU_JTAG_TRST (MTK_PIN_NO(16) | 4)
161*9f1bdd7eSHui.Liu #define PINMUX_GPIO16__FUNC_I0_VPU_UDI_NTRST (MTK_PIN_NO(16) | 5)
162*9f1bdd7eSHui.Liu #define PINMUX_GPIO16__FUNC_I0_IPU_JTAG_TRST (MTK_PIN_NO(16) | 6)
163*9f1bdd7eSHui.Liu #define PINMUX_GPIO16__FUNC_O_HDMITX20_PWR5V (MTK_PIN_NO(16) | 7)
164*9f1bdd7eSHui.Liu 
165*9f1bdd7eSHui.Liu #define PINMUX_GPIO17__FUNC_B_GPIO17 (MTK_PIN_NO(17) | 0)
166*9f1bdd7eSHui.Liu #define PINMUX_GPIO17__FUNC_B0_TP_GPIO1_AO (MTK_PIN_NO(17) | 1)
167*9f1bdd7eSHui.Liu #define PINMUX_GPIO17__FUNC_I1_URXD3 (MTK_PIN_NO(17) | 2)
168*9f1bdd7eSHui.Liu #define PINMUX_GPIO17__FUNC_O_CMFLASH2 (MTK_PIN_NO(17) | 3)
169*9f1bdd7eSHui.Liu #define PINMUX_GPIO17__FUNC_I0_EDP_TX_HPD (MTK_PIN_NO(17) | 4)
170*9f1bdd7eSHui.Liu #define PINMUX_GPIO17__FUNC_I0_DVFSRC_EXT_REQ (MTK_PIN_NO(17) | 5)
171*9f1bdd7eSHui.Liu #define PINMUX_GPIO17__FUNC_O_CMVREF7 (MTK_PIN_NO(17) | 6)
172*9f1bdd7eSHui.Liu #define PINMUX_GPIO17__FUNC_B0_MD32_0_GPIO1 (MTK_PIN_NO(17) | 7)
173*9f1bdd7eSHui.Liu 
174*9f1bdd7eSHui.Liu #define PINMUX_GPIO18__FUNC_B_GPIO18 (MTK_PIN_NO(18) | 0)
175*9f1bdd7eSHui.Liu #define PINMUX_GPIO18__FUNC_B0_TP_GPIO2_AO (MTK_PIN_NO(18) | 1)
176*9f1bdd7eSHui.Liu #define PINMUX_GPIO18__FUNC_O_CMFLASH0 (MTK_PIN_NO(18) | 2)
177*9f1bdd7eSHui.Liu #define PINMUX_GPIO18__FUNC_O_CMVREF4 (MTK_PIN_NO(18) | 3)
178*9f1bdd7eSHui.Liu #define PINMUX_GPIO18__FUNC_B0_TDMIN_MCK (MTK_PIN_NO(18) | 4)
179*9f1bdd7eSHui.Liu #define PINMUX_GPIO18__FUNC_O_UTXD1 (MTK_PIN_NO(18) | 5)
180*9f1bdd7eSHui.Liu #define PINMUX_GPIO18__FUNC_O_TP_UTXD1_AO (MTK_PIN_NO(18) | 6)
181*9f1bdd7eSHui.Liu #define PINMUX_GPIO18__FUNC_B0_DBG_MON_A11 (MTK_PIN_NO(18) | 7)
182*9f1bdd7eSHui.Liu 
183*9f1bdd7eSHui.Liu #define PINMUX_GPIO19__FUNC_B_GPIO19 (MTK_PIN_NO(19) | 0)
184*9f1bdd7eSHui.Liu #define PINMUX_GPIO19__FUNC_B0_TP_GPIO3_AO (MTK_PIN_NO(19) | 1)
185*9f1bdd7eSHui.Liu #define PINMUX_GPIO19__FUNC_O_CMFLASH1 (MTK_PIN_NO(19) | 2)
186*9f1bdd7eSHui.Liu #define PINMUX_GPIO19__FUNC_O_CMVREF5 (MTK_PIN_NO(19) | 3)
187*9f1bdd7eSHui.Liu #define PINMUX_GPIO19__FUNC_B0_TDMIN_BCK (MTK_PIN_NO(19) | 4)
188*9f1bdd7eSHui.Liu #define PINMUX_GPIO19__FUNC_I1_URXD1 (MTK_PIN_NO(19) | 5)
189*9f1bdd7eSHui.Liu #define PINMUX_GPIO19__FUNC_I1_TP_URXD1_AO (MTK_PIN_NO(19) | 6)
190*9f1bdd7eSHui.Liu #define PINMUX_GPIO19__FUNC_B0_DBG_MON_A12 (MTK_PIN_NO(19) | 7)
191*9f1bdd7eSHui.Liu 
192*9f1bdd7eSHui.Liu #define PINMUX_GPIO20__FUNC_B_GPIO20 (MTK_PIN_NO(20) | 0)
193*9f1bdd7eSHui.Liu #define PINMUX_GPIO20__FUNC_B0_TP_GPIO4_AO (MTK_PIN_NO(20) | 1)
194*9f1bdd7eSHui.Liu #define PINMUX_GPIO20__FUNC_O_CMFLASH2 (MTK_PIN_NO(20) | 2)
195*9f1bdd7eSHui.Liu #define PINMUX_GPIO20__FUNC_O_CLKM2 (MTK_PIN_NO(20) | 3)
196*9f1bdd7eSHui.Liu #define PINMUX_GPIO20__FUNC_B0_TDMIN_LRCK (MTK_PIN_NO(20) | 4)
197*9f1bdd7eSHui.Liu #define PINMUX_GPIO20__FUNC_O_URTS1 (MTK_PIN_NO(20) | 5)
198*9f1bdd7eSHui.Liu #define PINMUX_GPIO20__FUNC_O_TP_URTS1_AO (MTK_PIN_NO(20) | 6)
199*9f1bdd7eSHui.Liu #define PINMUX_GPIO20__FUNC_B0_DBG_MON_A13 (MTK_PIN_NO(20) | 7)
200*9f1bdd7eSHui.Liu 
201*9f1bdd7eSHui.Liu #define PINMUX_GPIO21__FUNC_B_GPIO21 (MTK_PIN_NO(21) | 0)
202*9f1bdd7eSHui.Liu #define PINMUX_GPIO21__FUNC_B0_TP_GPIO5_AO (MTK_PIN_NO(21) | 1)
203*9f1bdd7eSHui.Liu #define PINMUX_GPIO21__FUNC_O_CMFLASH3 (MTK_PIN_NO(21) | 2)
204*9f1bdd7eSHui.Liu #define PINMUX_GPIO21__FUNC_O_CLKM3 (MTK_PIN_NO(21) | 3)
205*9f1bdd7eSHui.Liu #define PINMUX_GPIO21__FUNC_I0_TDMIN_DI (MTK_PIN_NO(21) | 4)
206*9f1bdd7eSHui.Liu #define PINMUX_GPIO21__FUNC_I1_UCTS1 (MTK_PIN_NO(21) | 5)
207*9f1bdd7eSHui.Liu #define PINMUX_GPIO21__FUNC_I1_TP_UCTS1_AO (MTK_PIN_NO(21) | 6)
208*9f1bdd7eSHui.Liu #define PINMUX_GPIO21__FUNC_B0_DBG_MON_A14 (MTK_PIN_NO(21) | 7)
209*9f1bdd7eSHui.Liu 
210*9f1bdd7eSHui.Liu #define PINMUX_GPIO22__FUNC_B_GPIO22 (MTK_PIN_NO(22) | 0)
211*9f1bdd7eSHui.Liu #define PINMUX_GPIO22__FUNC_O_CMMCLK0 (MTK_PIN_NO(22) | 1)
212*9f1bdd7eSHui.Liu #define PINMUX_GPIO22__FUNC_B0_TP_GPIO6_AO (MTK_PIN_NO(22) | 5)
213*9f1bdd7eSHui.Liu #define PINMUX_GPIO22__FUNC_B0_DBG_MON_A15 (MTK_PIN_NO(22) | 7)
214*9f1bdd7eSHui.Liu 
215*9f1bdd7eSHui.Liu #define PINMUX_GPIO23__FUNC_B_GPIO23 (MTK_PIN_NO(23) | 0)
216*9f1bdd7eSHui.Liu #define PINMUX_GPIO23__FUNC_O_CMMCLK1 (MTK_PIN_NO(23) | 1)
217*9f1bdd7eSHui.Liu #define PINMUX_GPIO23__FUNC_O_PWM_2 (MTK_PIN_NO(23) | 3)
218*9f1bdd7eSHui.Liu #define PINMUX_GPIO23__FUNC_B1_PCIE_PHY_I2C_SCL (MTK_PIN_NO(23) | 4)
219*9f1bdd7eSHui.Liu #define PINMUX_GPIO23__FUNC_B0_TP_GPIO7_AO (MTK_PIN_NO(23) | 5)
220*9f1bdd7eSHui.Liu #define PINMUX_GPIO23__FUNC_I0_DP_TX_HPD (MTK_PIN_NO(23) | 6)
221*9f1bdd7eSHui.Liu #define PINMUX_GPIO23__FUNC_B0_DBG_MON_A16 (MTK_PIN_NO(23) | 7)
222*9f1bdd7eSHui.Liu 
223*9f1bdd7eSHui.Liu #define PINMUX_GPIO24__FUNC_B_GPIO24 (MTK_PIN_NO(24) | 0)
224*9f1bdd7eSHui.Liu #define PINMUX_GPIO24__FUNC_O_CMMCLK2 (MTK_PIN_NO(24) | 1)
225*9f1bdd7eSHui.Liu #define PINMUX_GPIO24__FUNC_O_PWM_3 (MTK_PIN_NO(24) | 3)
226*9f1bdd7eSHui.Liu #define PINMUX_GPIO24__FUNC_B1_PCIE_PHY_I2C_SDA (MTK_PIN_NO(24) | 4)
227*9f1bdd7eSHui.Liu #define PINMUX_GPIO24__FUNC_I0_DVFSRC_EXT_REQ (MTK_PIN_NO(24) | 5)
228*9f1bdd7eSHui.Liu #define PINMUX_GPIO24__FUNC_I0_EDP_TX_HPD (MTK_PIN_NO(24) | 6)
229*9f1bdd7eSHui.Liu #define PINMUX_GPIO24__FUNC_B0_MD32_0_GPIO2 (MTK_PIN_NO(24) | 7)
230*9f1bdd7eSHui.Liu 
231*9f1bdd7eSHui.Liu #define PINMUX_GPIO25__FUNC_B_GPIO25 (MTK_PIN_NO(25) | 0)
232*9f1bdd7eSHui.Liu #define PINMUX_GPIO25__FUNC_O_LCM_RST (MTK_PIN_NO(25) | 1)
233*9f1bdd7eSHui.Liu #define PINMUX_GPIO25__FUNC_O_LCM1_RST (MTK_PIN_NO(25) | 2)
234*9f1bdd7eSHui.Liu #define PINMUX_GPIO25__FUNC_I0_DP_TX_HPD (MTK_PIN_NO(25) | 3)
235*9f1bdd7eSHui.Liu 
236*9f1bdd7eSHui.Liu #define PINMUX_GPIO26__FUNC_B_GPIO26 (MTK_PIN_NO(26) | 0)
237*9f1bdd7eSHui.Liu #define PINMUX_GPIO26__FUNC_I0_DSI_TE (MTK_PIN_NO(26) | 1)
238*9f1bdd7eSHui.Liu #define PINMUX_GPIO26__FUNC_I0_DSI1_TE (MTK_PIN_NO(26) | 2)
239*9f1bdd7eSHui.Liu #define PINMUX_GPIO26__FUNC_I0_EDP_TX_HPD (MTK_PIN_NO(26) | 3)
240*9f1bdd7eSHui.Liu 
241*9f1bdd7eSHui.Liu #define PINMUX_GPIO27__FUNC_B_GPIO27 (MTK_PIN_NO(27) | 0)
242*9f1bdd7eSHui.Liu #define PINMUX_GPIO27__FUNC_O_LCM1_RST (MTK_PIN_NO(27) | 1)
243*9f1bdd7eSHui.Liu #define PINMUX_GPIO27__FUNC_O_LCM_RST (MTK_PIN_NO(27) | 2)
244*9f1bdd7eSHui.Liu #define PINMUX_GPIO27__FUNC_I0_DP_TX_HPD (MTK_PIN_NO(27) | 3)
245*9f1bdd7eSHui.Liu #define PINMUX_GPIO27__FUNC_O_CMVREF2 (MTK_PIN_NO(27) | 4)
246*9f1bdd7eSHui.Liu #define PINMUX_GPIO27__FUNC_O_mbistwriteen_trigger (MTK_PIN_NO(27) | 5)
247*9f1bdd7eSHui.Liu #define PINMUX_GPIO27__FUNC_O_PWM_2 (MTK_PIN_NO(27) | 6)
248*9f1bdd7eSHui.Liu #define PINMUX_GPIO27__FUNC_B0_DBG_MON_A17 (MTK_PIN_NO(27) | 7)
249*9f1bdd7eSHui.Liu 
250*9f1bdd7eSHui.Liu #define PINMUX_GPIO28__FUNC_B_GPIO28 (MTK_PIN_NO(28) | 0)
251*9f1bdd7eSHui.Liu #define PINMUX_GPIO28__FUNC_I0_DSI1_TE (MTK_PIN_NO(28) | 1)
252*9f1bdd7eSHui.Liu #define PINMUX_GPIO28__FUNC_I0_DSI_TE (MTK_PIN_NO(28) | 2)
253*9f1bdd7eSHui.Liu #define PINMUX_GPIO28__FUNC_I0_EDP_TX_HPD (MTK_PIN_NO(28) | 3)
254*9f1bdd7eSHui.Liu #define PINMUX_GPIO28__FUNC_O_CMVREF3 (MTK_PIN_NO(28) | 4)
255*9f1bdd7eSHui.Liu #define PINMUX_GPIO28__FUNC_O_mbistreaden_trigger (MTK_PIN_NO(28) | 5)
256*9f1bdd7eSHui.Liu #define PINMUX_GPIO28__FUNC_O_PWM_3 (MTK_PIN_NO(28) | 6)
257*9f1bdd7eSHui.Liu #define PINMUX_GPIO28__FUNC_B0_DBG_MON_A18 (MTK_PIN_NO(28) | 7)
258*9f1bdd7eSHui.Liu 
259*9f1bdd7eSHui.Liu #define PINMUX_GPIO29__FUNC_B_GPIO29 (MTK_PIN_NO(29) | 0)
260*9f1bdd7eSHui.Liu #define PINMUX_GPIO29__FUNC_O_DISP_PWM0 (MTK_PIN_NO(29) | 1)
261*9f1bdd7eSHui.Liu #define PINMUX_GPIO29__FUNC_O_DISP_PWM1 (MTK_PIN_NO(29) | 2)
262*9f1bdd7eSHui.Liu 
263*9f1bdd7eSHui.Liu #define PINMUX_GPIO30__FUNC_B_GPIO30 (MTK_PIN_NO(30) | 0)
264*9f1bdd7eSHui.Liu #define PINMUX_GPIO30__FUNC_O_DISP_PWM1 (MTK_PIN_NO(30) | 1)
265*9f1bdd7eSHui.Liu #define PINMUX_GPIO30__FUNC_O_DISP_PWM0 (MTK_PIN_NO(30) | 2)
266*9f1bdd7eSHui.Liu #define PINMUX_GPIO30__FUNC_O_CMFLASH3 (MTK_PIN_NO(30) | 3)
267*9f1bdd7eSHui.Liu #define PINMUX_GPIO30__FUNC_O_PWM_1 (MTK_PIN_NO(30) | 4)
268*9f1bdd7eSHui.Liu #define PINMUX_GPIO30__FUNC_B0_DBG_MON_A19 (MTK_PIN_NO(30) | 7)
269*9f1bdd7eSHui.Liu 
270*9f1bdd7eSHui.Liu #define PINMUX_GPIO31__FUNC_B_GPIO31 (MTK_PIN_NO(31) | 0)
271*9f1bdd7eSHui.Liu #define PINMUX_GPIO31__FUNC_O_UTXD0 (MTK_PIN_NO(31) | 1)
272*9f1bdd7eSHui.Liu #define PINMUX_GPIO31__FUNC_O_TP_UTXD1_AO (MTK_PIN_NO(31) | 2)
273*9f1bdd7eSHui.Liu #define PINMUX_GPIO31__FUNC_O_ADSP_UTXD0 (MTK_PIN_NO(31) | 3)
274*9f1bdd7eSHui.Liu #define PINMUX_GPIO31__FUNC_O_TP_UTXD2_AO (MTK_PIN_NO(31) | 4)
275*9f1bdd7eSHui.Liu #define PINMUX_GPIO31__FUNC_O_MD32_0_TXD (MTK_PIN_NO(31) | 5)
276*9f1bdd7eSHui.Liu #define PINMUX_GPIO31__FUNC_O_MD32_1_TXD (MTK_PIN_NO(31) | 6)
277*9f1bdd7eSHui.Liu #define PINMUX_GPIO31__FUNC_O_SSPM_UTXD_AO (MTK_PIN_NO(31) | 7)
278*9f1bdd7eSHui.Liu 
279*9f1bdd7eSHui.Liu #define PINMUX_GPIO32__FUNC_B_GPIO32 (MTK_PIN_NO(32) | 0)
280*9f1bdd7eSHui.Liu #define PINMUX_GPIO32__FUNC_I1_URXD0 (MTK_PIN_NO(32) | 1)
281*9f1bdd7eSHui.Liu #define PINMUX_GPIO32__FUNC_I1_TP_URXD1_AO (MTK_PIN_NO(32) | 2)
282*9f1bdd7eSHui.Liu #define PINMUX_GPIO32__FUNC_I1_ADSP_URXD0 (MTK_PIN_NO(32) | 3)
283*9f1bdd7eSHui.Liu #define PINMUX_GPIO32__FUNC_I1_TP_URXD2_AO (MTK_PIN_NO(32) | 4)
284*9f1bdd7eSHui.Liu #define PINMUX_GPIO32__FUNC_I1_MD32_0_RXD (MTK_PIN_NO(32) | 5)
285*9f1bdd7eSHui.Liu #define PINMUX_GPIO32__FUNC_I1_MD32_1_RXD (MTK_PIN_NO(32) | 6)
286*9f1bdd7eSHui.Liu #define PINMUX_GPIO32__FUNC_I1_SSPM_URXD_AO (MTK_PIN_NO(32) | 7)
287*9f1bdd7eSHui.Liu 
288*9f1bdd7eSHui.Liu #define PINMUX_GPIO33__FUNC_B_GPIO33 (MTK_PIN_NO(33) | 0)
289*9f1bdd7eSHui.Liu #define PINMUX_GPIO33__FUNC_O_UTXD1 (MTK_PIN_NO(33) | 1)
290*9f1bdd7eSHui.Liu #define PINMUX_GPIO33__FUNC_O_URTS2 (MTK_PIN_NO(33) | 2)
291*9f1bdd7eSHui.Liu #define PINMUX_GPIO33__FUNC_O_ADSP_UTXD0 (MTK_PIN_NO(33) | 3)
292*9f1bdd7eSHui.Liu #define PINMUX_GPIO33__FUNC_O_TP_UTXD1_AO (MTK_PIN_NO(33) | 4)
293*9f1bdd7eSHui.Liu #define PINMUX_GPIO33__FUNC_O_mbistwriteen_trigger (MTK_PIN_NO(33) | 5)
294*9f1bdd7eSHui.Liu #define PINMUX_GPIO33__FUNC_O_MD32_0_TXD (MTK_PIN_NO(33) | 6)
295*9f1bdd7eSHui.Liu #define PINMUX_GPIO33__FUNC_O_SSPM_UTXD_AO (MTK_PIN_NO(33) | 7)
296*9f1bdd7eSHui.Liu 
297*9f1bdd7eSHui.Liu #define PINMUX_GPIO34__FUNC_B_GPIO34 (MTK_PIN_NO(34) | 0)
298*9f1bdd7eSHui.Liu #define PINMUX_GPIO34__FUNC_I1_URXD1 (MTK_PIN_NO(34) | 1)
299*9f1bdd7eSHui.Liu #define PINMUX_GPIO34__FUNC_I1_UCTS2 (MTK_PIN_NO(34) | 2)
300*9f1bdd7eSHui.Liu #define PINMUX_GPIO34__FUNC_I1_ADSP_URXD0 (MTK_PIN_NO(34) | 3)
301*9f1bdd7eSHui.Liu #define PINMUX_GPIO34__FUNC_I1_TP_URXD1_AO (MTK_PIN_NO(34) | 4)
302*9f1bdd7eSHui.Liu #define PINMUX_GPIO34__FUNC_O_mbistreaden_trigger (MTK_PIN_NO(34) | 5)
303*9f1bdd7eSHui.Liu #define PINMUX_GPIO34__FUNC_I1_MD32_0_RXD (MTK_PIN_NO(34) | 6)
304*9f1bdd7eSHui.Liu #define PINMUX_GPIO34__FUNC_I1_SSPM_URXD_AO (MTK_PIN_NO(34) | 7)
305*9f1bdd7eSHui.Liu 
306*9f1bdd7eSHui.Liu #define PINMUX_GPIO35__FUNC_B_GPIO35 (MTK_PIN_NO(35) | 0)
307*9f1bdd7eSHui.Liu #define PINMUX_GPIO35__FUNC_O_UTXD2 (MTK_PIN_NO(35) | 1)
308*9f1bdd7eSHui.Liu #define PINMUX_GPIO35__FUNC_O_URTS1 (MTK_PIN_NO(35) | 2)
309*9f1bdd7eSHui.Liu #define PINMUX_GPIO35__FUNC_O_ADSP_UTXD0 (MTK_PIN_NO(35) | 3)
310*9f1bdd7eSHui.Liu #define PINMUX_GPIO35__FUNC_O_TP_URTS1_AO (MTK_PIN_NO(35) | 4)
311*9f1bdd7eSHui.Liu #define PINMUX_GPIO35__FUNC_O_TP_UTXD2_AO (MTK_PIN_NO(35) | 5)
312*9f1bdd7eSHui.Liu #define PINMUX_GPIO35__FUNC_O_MD32_1_TXD (MTK_PIN_NO(35) | 6)
313*9f1bdd7eSHui.Liu #define PINMUX_GPIO35__FUNC_B0_DBG_MON_A20 (MTK_PIN_NO(35) | 7)
314*9f1bdd7eSHui.Liu 
315*9f1bdd7eSHui.Liu #define PINMUX_GPIO36__FUNC_B_GPIO36 (MTK_PIN_NO(36) | 0)
316*9f1bdd7eSHui.Liu #define PINMUX_GPIO36__FUNC_I1_URXD2 (MTK_PIN_NO(36) | 1)
317*9f1bdd7eSHui.Liu #define PINMUX_GPIO36__FUNC_I1_UCTS1 (MTK_PIN_NO(36) | 2)
318*9f1bdd7eSHui.Liu #define PINMUX_GPIO36__FUNC_I1_ADSP_URXD0 (MTK_PIN_NO(36) | 3)
319*9f1bdd7eSHui.Liu #define PINMUX_GPIO36__FUNC_I1_TP_UCTS1_AO (MTK_PIN_NO(36) | 4)
320*9f1bdd7eSHui.Liu #define PINMUX_GPIO36__FUNC_I1_TP_URXD2_AO (MTK_PIN_NO(36) | 5)
321*9f1bdd7eSHui.Liu #define PINMUX_GPIO36__FUNC_I1_MD32_1_RXD (MTK_PIN_NO(36) | 6)
322*9f1bdd7eSHui.Liu #define PINMUX_GPIO36__FUNC_B0_DBG_MON_A21 (MTK_PIN_NO(36) | 7)
323*9f1bdd7eSHui.Liu 
324*9f1bdd7eSHui.Liu #define PINMUX_GPIO37__FUNC_B_GPIO37 (MTK_PIN_NO(37) | 0)
325*9f1bdd7eSHui.Liu #define PINMUX_GPIO37__FUNC_B1_JTMS_SEL1 (MTK_PIN_NO(37) | 1)
326*9f1bdd7eSHui.Liu #define PINMUX_GPIO37__FUNC_I0_UDI_TMS (MTK_PIN_NO(37) | 2)
327*9f1bdd7eSHui.Liu #define PINMUX_GPIO37__FUNC_I1_SPM_JTAG_TMS (MTK_PIN_NO(37) | 3)
328*9f1bdd7eSHui.Liu #define PINMUX_GPIO37__FUNC_I1_ADSP_JTAG0_TMS (MTK_PIN_NO(37) | 4)
329*9f1bdd7eSHui.Liu #define PINMUX_GPIO37__FUNC_I1_SCP_JTAG0_TMS (MTK_PIN_NO(37) | 5)
330*9f1bdd7eSHui.Liu #define PINMUX_GPIO37__FUNC_I1_CCU0_JTAG_TMS (MTK_PIN_NO(37) | 6)
331*9f1bdd7eSHui.Liu #define PINMUX_GPIO37__FUNC_I1_MCUPM_JTAG_TMS (MTK_PIN_NO(37) | 7)
332*9f1bdd7eSHui.Liu 
333*9f1bdd7eSHui.Liu #define PINMUX_GPIO38__FUNC_B_GPIO38 (MTK_PIN_NO(38) | 0)
334*9f1bdd7eSHui.Liu #define PINMUX_GPIO38__FUNC_I0_JTCK_SEL1 (MTK_PIN_NO(38) | 1)
335*9f1bdd7eSHui.Liu #define PINMUX_GPIO38__FUNC_I0_UDI_TCK (MTK_PIN_NO(38) | 2)
336*9f1bdd7eSHui.Liu #define PINMUX_GPIO38__FUNC_I1_SPM_JTAG_TCK (MTK_PIN_NO(38) | 3)
337*9f1bdd7eSHui.Liu #define PINMUX_GPIO38__FUNC_I0_ADSP_JTAG0_TCK (MTK_PIN_NO(38) | 4)
338*9f1bdd7eSHui.Liu #define PINMUX_GPIO38__FUNC_I1_SCP_JTAG0_TCK (MTK_PIN_NO(38) | 5)
339*9f1bdd7eSHui.Liu #define PINMUX_GPIO38__FUNC_I1_CCU0_JTAG_TCK (MTK_PIN_NO(38) | 6)
340*9f1bdd7eSHui.Liu #define PINMUX_GPIO38__FUNC_I1_MCUPM_JTAG_TCK (MTK_PIN_NO(38) | 7)
341*9f1bdd7eSHui.Liu 
342*9f1bdd7eSHui.Liu #define PINMUX_GPIO39__FUNC_B_GPIO39 (MTK_PIN_NO(39) | 0)
343*9f1bdd7eSHui.Liu #define PINMUX_GPIO39__FUNC_I1_JTDI_SEL1 (MTK_PIN_NO(39) | 1)
344*9f1bdd7eSHui.Liu #define PINMUX_GPIO39__FUNC_I0_UDI_TDI (MTK_PIN_NO(39) | 2)
345*9f1bdd7eSHui.Liu #define PINMUX_GPIO39__FUNC_I1_SPM_JTAG_TDI (MTK_PIN_NO(39) | 3)
346*9f1bdd7eSHui.Liu #define PINMUX_GPIO39__FUNC_I1_ADSP_JTAG0_TDI (MTK_PIN_NO(39) | 4)
347*9f1bdd7eSHui.Liu #define PINMUX_GPIO39__FUNC_I1_SCP_JTAG0_TDI (MTK_PIN_NO(39) | 5)
348*9f1bdd7eSHui.Liu #define PINMUX_GPIO39__FUNC_I1_CCU0_JTAG_TDI (MTK_PIN_NO(39) | 6)
349*9f1bdd7eSHui.Liu #define PINMUX_GPIO39__FUNC_I1_MCUPM_JTAG_TDI (MTK_PIN_NO(39) | 7)
350*9f1bdd7eSHui.Liu 
351*9f1bdd7eSHui.Liu #define PINMUX_GPIO40__FUNC_B_GPIO40 (MTK_PIN_NO(40) | 0)
352*9f1bdd7eSHui.Liu #define PINMUX_GPIO40__FUNC_O_JTDO_SEL1 (MTK_PIN_NO(40) | 1)
353*9f1bdd7eSHui.Liu #define PINMUX_GPIO40__FUNC_O_UDI_TDO (MTK_PIN_NO(40) | 2)
354*9f1bdd7eSHui.Liu #define PINMUX_GPIO40__FUNC_O_SPM_JTAG_TDO (MTK_PIN_NO(40) | 3)
355*9f1bdd7eSHui.Liu #define PINMUX_GPIO40__FUNC_O_ADSP_JTAG0_TDO (MTK_PIN_NO(40) | 4)
356*9f1bdd7eSHui.Liu #define PINMUX_GPIO40__FUNC_O_SCP_JTAG0_TDO (MTK_PIN_NO(40) | 5)
357*9f1bdd7eSHui.Liu #define PINMUX_GPIO40__FUNC_O_CCU0_JTAG_TDO (MTK_PIN_NO(40) | 6)
358*9f1bdd7eSHui.Liu #define PINMUX_GPIO40__FUNC_O_MCUPM_JTAG_TDO (MTK_PIN_NO(40) | 7)
359*9f1bdd7eSHui.Liu 
360*9f1bdd7eSHui.Liu #define PINMUX_GPIO41__FUNC_B_GPIO41 (MTK_PIN_NO(41) | 0)
361*9f1bdd7eSHui.Liu #define PINMUX_GPIO41__FUNC_I1_JTRSTn_SEL1 (MTK_PIN_NO(41) | 1)
362*9f1bdd7eSHui.Liu #define PINMUX_GPIO41__FUNC_I0_UDI_NTRST (MTK_PIN_NO(41) | 2)
363*9f1bdd7eSHui.Liu #define PINMUX_GPIO41__FUNC_I0_SPM_JTAG_TRSTN (MTK_PIN_NO(41) | 3)
364*9f1bdd7eSHui.Liu #define PINMUX_GPIO41__FUNC_I1_ADSP_JTAG0_TRSTN (MTK_PIN_NO(41) | 4)
365*9f1bdd7eSHui.Liu #define PINMUX_GPIO41__FUNC_I0_SCP_JTAG0_TRSTN (MTK_PIN_NO(41) | 5)
366*9f1bdd7eSHui.Liu #define PINMUX_GPIO41__FUNC_I1_CCU0_JTAG_TRST (MTK_PIN_NO(41) | 6)
367*9f1bdd7eSHui.Liu #define PINMUX_GPIO41__FUNC_I0_MCUPM_JTAG_TRSTN (MTK_PIN_NO(41) | 7)
368*9f1bdd7eSHui.Liu 
369*9f1bdd7eSHui.Liu #define PINMUX_GPIO42__FUNC_B_GPIO42 (MTK_PIN_NO(42) | 0)
370*9f1bdd7eSHui.Liu #define PINMUX_GPIO42__FUNC_B1_KPCOL0 (MTK_PIN_NO(42) | 1)
371*9f1bdd7eSHui.Liu 
372*9f1bdd7eSHui.Liu #define PINMUX_GPIO43__FUNC_B_GPIO43 (MTK_PIN_NO(43) | 0)
373*9f1bdd7eSHui.Liu #define PINMUX_GPIO43__FUNC_B1_KPCOL1 (MTK_PIN_NO(43) | 1)
374*9f1bdd7eSHui.Liu #define PINMUX_GPIO43__FUNC_I0_DP_TX_HPD (MTK_PIN_NO(43) | 2)
375*9f1bdd7eSHui.Liu #define PINMUX_GPIO43__FUNC_O_CMFLASH2 (MTK_PIN_NO(43) | 3)
376*9f1bdd7eSHui.Liu #define PINMUX_GPIO43__FUNC_I0_DVFSRC_EXT_REQ (MTK_PIN_NO(43) | 4)
377*9f1bdd7eSHui.Liu #define PINMUX_GPIO43__FUNC_O_mbistwriteen_trigger (MTK_PIN_NO(43) | 7)
378*9f1bdd7eSHui.Liu 
379*9f1bdd7eSHui.Liu #define PINMUX_GPIO44__FUNC_B_GPIO44 (MTK_PIN_NO(44) | 0)
380*9f1bdd7eSHui.Liu #define PINMUX_GPIO44__FUNC_B1_KPROW0 (MTK_PIN_NO(44) | 1)
381*9f1bdd7eSHui.Liu 
382*9f1bdd7eSHui.Liu #define PINMUX_GPIO45__FUNC_B_GPIO45 (MTK_PIN_NO(45) | 0)
383*9f1bdd7eSHui.Liu #define PINMUX_GPIO45__FUNC_B1_KPROW1 (MTK_PIN_NO(45) | 1)
384*9f1bdd7eSHui.Liu #define PINMUX_GPIO45__FUNC_I0_EDP_TX_HPD (MTK_PIN_NO(45) | 2)
385*9f1bdd7eSHui.Liu #define PINMUX_GPIO45__FUNC_O_CMFLASH3 (MTK_PIN_NO(45) | 3)
386*9f1bdd7eSHui.Liu #define PINMUX_GPIO45__FUNC_B0_I2SIN_MCK (MTK_PIN_NO(45) | 4)
387*9f1bdd7eSHui.Liu #define PINMUX_GPIO45__FUNC_O_mbistreaden_trigger (MTK_PIN_NO(45) | 7)
388*9f1bdd7eSHui.Liu 
389*9f1bdd7eSHui.Liu #define PINMUX_GPIO46__FUNC_B_GPIO46 (MTK_PIN_NO(46) | 0)
390*9f1bdd7eSHui.Liu #define PINMUX_GPIO46__FUNC_I0_DP_TX_HPD (MTK_PIN_NO(46) | 1)
391*9f1bdd7eSHui.Liu #define PINMUX_GPIO46__FUNC_O_PWM_0 (MTK_PIN_NO(46) | 2)
392*9f1bdd7eSHui.Liu #define PINMUX_GPIO46__FUNC_I0_VBUSVALID_2P (MTK_PIN_NO(46) | 3)
393*9f1bdd7eSHui.Liu #define PINMUX_GPIO46__FUNC_B0_DBG_MON_A22 (MTK_PIN_NO(46) | 7)
394*9f1bdd7eSHui.Liu 
395*9f1bdd7eSHui.Liu #define PINMUX_GPIO47__FUNC_B_GPIO47 (MTK_PIN_NO(47) | 0)
396*9f1bdd7eSHui.Liu #define PINMUX_GPIO47__FUNC_I1_WAKEN (MTK_PIN_NO(47) | 1)
397*9f1bdd7eSHui.Liu #define PINMUX_GPIO47__FUNC_O_GDU_TROOPS_DET0 (MTK_PIN_NO(47) | 6)
398*9f1bdd7eSHui.Liu 
399*9f1bdd7eSHui.Liu #define PINMUX_GPIO48__FUNC_B_GPIO48 (MTK_PIN_NO(48) | 0)
400*9f1bdd7eSHui.Liu #define PINMUX_GPIO48__FUNC_O_PERSTN (MTK_PIN_NO(48) | 1)
401*9f1bdd7eSHui.Liu #define PINMUX_GPIO48__FUNC_O_GDU_TROOPS_DET1 (MTK_PIN_NO(48) | 6)
402*9f1bdd7eSHui.Liu 
403*9f1bdd7eSHui.Liu #define PINMUX_GPIO49__FUNC_B_GPIO49 (MTK_PIN_NO(49) | 0)
404*9f1bdd7eSHui.Liu #define PINMUX_GPIO49__FUNC_B1_CLKREQN (MTK_PIN_NO(49) | 1)
405*9f1bdd7eSHui.Liu #define PINMUX_GPIO49__FUNC_O_GDU_TROOPS_DET2 (MTK_PIN_NO(49) | 6)
406*9f1bdd7eSHui.Liu 
407*9f1bdd7eSHui.Liu #define PINMUX_GPIO50__FUNC_B_GPIO50 (MTK_PIN_NO(50) | 0)
408*9f1bdd7eSHui.Liu #define PINMUX_GPIO50__FUNC_O_HDMITX20_PWR5V (MTK_PIN_NO(50) | 1)
409*9f1bdd7eSHui.Liu #define PINMUX_GPIO50__FUNC_I1_IDDIG_1P (MTK_PIN_NO(50) | 3)
410*9f1bdd7eSHui.Liu #define PINMUX_GPIO50__FUNC_I1_SCP_JTAG1_TMS (MTK_PIN_NO(50) | 4)
411*9f1bdd7eSHui.Liu #define PINMUX_GPIO50__FUNC_I1_SSPM_JTAG_TMS (MTK_PIN_NO(50) | 5)
412*9f1bdd7eSHui.Liu #define PINMUX_GPIO50__FUNC_I1_MD32_0_JTAG_TMS (MTK_PIN_NO(50) | 6)
413*9f1bdd7eSHui.Liu #define PINMUX_GPIO50__FUNC_I1_MD32_1_JTAG_TMS (MTK_PIN_NO(50) | 7)
414*9f1bdd7eSHui.Liu 
415*9f1bdd7eSHui.Liu #define PINMUX_GPIO51__FUNC_B_GPIO51 (MTK_PIN_NO(51) | 0)
416*9f1bdd7eSHui.Liu #define PINMUX_GPIO51__FUNC_I0_HDMITX20_HTPLG (MTK_PIN_NO(51) | 1)
417*9f1bdd7eSHui.Liu #define PINMUX_GPIO51__FUNC_I0_EDP_TX_HPD (MTK_PIN_NO(51) | 2)
418*9f1bdd7eSHui.Liu #define PINMUX_GPIO51__FUNC_O_USB_DRVVBUS_1P (MTK_PIN_NO(51) | 3)
419*9f1bdd7eSHui.Liu #define PINMUX_GPIO51__FUNC_I1_SCP_JTAG1_TCK (MTK_PIN_NO(51) | 4)
420*9f1bdd7eSHui.Liu #define PINMUX_GPIO51__FUNC_I1_SSPM_JTAG_TCK (MTK_PIN_NO(51) | 5)
421*9f1bdd7eSHui.Liu #define PINMUX_GPIO51__FUNC_I1_MD32_0_JTAG_TCK (MTK_PIN_NO(51) | 6)
422*9f1bdd7eSHui.Liu #define PINMUX_GPIO51__FUNC_I1_MD32_1_JTAG_TCK (MTK_PIN_NO(51) | 7)
423*9f1bdd7eSHui.Liu 
424*9f1bdd7eSHui.Liu #define PINMUX_GPIO52__FUNC_B_GPIO52 (MTK_PIN_NO(52) | 0)
425*9f1bdd7eSHui.Liu #define PINMUX_GPIO52__FUNC_B1_HDMITX20_CEC (MTK_PIN_NO(52) | 1)
426*9f1bdd7eSHui.Liu #define PINMUX_GPIO52__FUNC_I0_VBUSVALID_1P (MTK_PIN_NO(52) | 3)
427*9f1bdd7eSHui.Liu #define PINMUX_GPIO52__FUNC_I1_SCP_JTAG1_TDI (MTK_PIN_NO(52) | 4)
428*9f1bdd7eSHui.Liu #define PINMUX_GPIO52__FUNC_I1_SSPM_JTAG_TDI (MTK_PIN_NO(52) | 5)
429*9f1bdd7eSHui.Liu #define PINMUX_GPIO52__FUNC_I1_MD32_0_JTAG_TDI (MTK_PIN_NO(52) | 6)
430*9f1bdd7eSHui.Liu #define PINMUX_GPIO52__FUNC_I1_MD32_1_JTAG_TDI (MTK_PIN_NO(52) | 7)
431*9f1bdd7eSHui.Liu 
432*9f1bdd7eSHui.Liu #define PINMUX_GPIO53__FUNC_B_GPIO53 (MTK_PIN_NO(53) | 0)
433*9f1bdd7eSHui.Liu #define PINMUX_GPIO53__FUNC_B1_HDMITX20_SCL (MTK_PIN_NO(53) | 1)
434*9f1bdd7eSHui.Liu #define PINMUX_GPIO53__FUNC_I1_IDDIG_2P (MTK_PIN_NO(53) | 3)
435*9f1bdd7eSHui.Liu #define PINMUX_GPIO53__FUNC_O_SCP_JTAG1_TDO (MTK_PIN_NO(53) | 4)
436*9f1bdd7eSHui.Liu #define PINMUX_GPIO53__FUNC_O_SSPM_JTAG_TDO (MTK_PIN_NO(53) | 5)
437*9f1bdd7eSHui.Liu #define PINMUX_GPIO53__FUNC_O_MD32_0_JTAG_TDO (MTK_PIN_NO(53) | 6)
438*9f1bdd7eSHui.Liu #define PINMUX_GPIO53__FUNC_O_MD32_1_JTAG_TDO (MTK_PIN_NO(53) | 7)
439*9f1bdd7eSHui.Liu 
440*9f1bdd7eSHui.Liu #define PINMUX_GPIO54__FUNC_B_GPIO54 (MTK_PIN_NO(54) | 0)
441*9f1bdd7eSHui.Liu #define PINMUX_GPIO54__FUNC_B1_HDMITX20_SDA (MTK_PIN_NO(54) | 1)
442*9f1bdd7eSHui.Liu #define PINMUX_GPIO54__FUNC_O_USB_DRVVBUS_2P (MTK_PIN_NO(54) | 3)
443*9f1bdd7eSHui.Liu #define PINMUX_GPIO54__FUNC_I0_SCP_JTAG1_TRSTN (MTK_PIN_NO(54) | 4)
444*9f1bdd7eSHui.Liu #define PINMUX_GPIO54__FUNC_I0_SSPM_JTAG_TRSTN (MTK_PIN_NO(54) | 5)
445*9f1bdd7eSHui.Liu #define PINMUX_GPIO54__FUNC_I1_MD32_0_JTAG_TRST (MTK_PIN_NO(54) | 6)
446*9f1bdd7eSHui.Liu #define PINMUX_GPIO54__FUNC_I1_MD32_1_JTAG_TRST (MTK_PIN_NO(54) | 7)
447*9f1bdd7eSHui.Liu 
448*9f1bdd7eSHui.Liu #define PINMUX_GPIO55__FUNC_B_GPIO55 (MTK_PIN_NO(55) | 0)
449*9f1bdd7eSHui.Liu #define PINMUX_GPIO55__FUNC_B1_SCL0 (MTK_PIN_NO(55) | 1)
450*9f1bdd7eSHui.Liu #define PINMUX_GPIO55__FUNC_B1_SCP_SCL0 (MTK_PIN_NO(55) | 2)
451*9f1bdd7eSHui.Liu #define PINMUX_GPIO55__FUNC_B1_SCP_SCL1 (MTK_PIN_NO(55) | 3)
452*9f1bdd7eSHui.Liu #define PINMUX_GPIO55__FUNC_B1_PCIE_PHY_I2C_SCL (MTK_PIN_NO(55) | 4)
453*9f1bdd7eSHui.Liu 
454*9f1bdd7eSHui.Liu #define PINMUX_GPIO56__FUNC_B_GPIO56 (MTK_PIN_NO(56) | 0)
455*9f1bdd7eSHui.Liu #define PINMUX_GPIO56__FUNC_B1_SDA0 (MTK_PIN_NO(56) | 1)
456*9f1bdd7eSHui.Liu #define PINMUX_GPIO56__FUNC_B1_SCP_SDA0 (MTK_PIN_NO(56) | 2)
457*9f1bdd7eSHui.Liu #define PINMUX_GPIO56__FUNC_B1_SCP_SDA1 (MTK_PIN_NO(56) | 3)
458*9f1bdd7eSHui.Liu #define PINMUX_GPIO56__FUNC_B1_PCIE_PHY_I2C_SDA (MTK_PIN_NO(56) | 4)
459*9f1bdd7eSHui.Liu 
460*9f1bdd7eSHui.Liu #define PINMUX_GPIO57__FUNC_B_GPIO57 (MTK_PIN_NO(57) | 0)
461*9f1bdd7eSHui.Liu #define PINMUX_GPIO57__FUNC_B1_SCL1 (MTK_PIN_NO(57) | 1)
462*9f1bdd7eSHui.Liu 
463*9f1bdd7eSHui.Liu #define PINMUX_GPIO58__FUNC_B_GPIO58 (MTK_PIN_NO(58) | 0)
464*9f1bdd7eSHui.Liu #define PINMUX_GPIO58__FUNC_B1_SDA1 (MTK_PIN_NO(58) | 1)
465*9f1bdd7eSHui.Liu 
466*9f1bdd7eSHui.Liu #define PINMUX_GPIO59__FUNC_B_GPIO59 (MTK_PIN_NO(59) | 0)
467*9f1bdd7eSHui.Liu #define PINMUX_GPIO59__FUNC_B1_SCL2 (MTK_PIN_NO(59) | 1)
468*9f1bdd7eSHui.Liu #define PINMUX_GPIO59__FUNC_B1_SCP_SCL0 (MTK_PIN_NO(59) | 2)
469*9f1bdd7eSHui.Liu #define PINMUX_GPIO59__FUNC_B1_SCP_SCL1 (MTK_PIN_NO(59) | 3)
470*9f1bdd7eSHui.Liu 
471*9f1bdd7eSHui.Liu #define PINMUX_GPIO60__FUNC_B_GPIO60 (MTK_PIN_NO(60) | 0)
472*9f1bdd7eSHui.Liu #define PINMUX_GPIO60__FUNC_B1_SDA2 (MTK_PIN_NO(60) | 1)
473*9f1bdd7eSHui.Liu #define PINMUX_GPIO60__FUNC_B1_SCP_SDA0 (MTK_PIN_NO(60) | 2)
474*9f1bdd7eSHui.Liu #define PINMUX_GPIO60__FUNC_B1_SCP_SDA1 (MTK_PIN_NO(60) | 3)
475*9f1bdd7eSHui.Liu 
476*9f1bdd7eSHui.Liu #define PINMUX_GPIO61__FUNC_B_GPIO61 (MTK_PIN_NO(61) | 0)
477*9f1bdd7eSHui.Liu #define PINMUX_GPIO61__FUNC_B1_SCL3 (MTK_PIN_NO(61) | 1)
478*9f1bdd7eSHui.Liu #define PINMUX_GPIO61__FUNC_B1_SCP_SCL0 (MTK_PIN_NO(61) | 2)
479*9f1bdd7eSHui.Liu #define PINMUX_GPIO61__FUNC_B1_SCP_SCL1 (MTK_PIN_NO(61) | 3)
480*9f1bdd7eSHui.Liu #define PINMUX_GPIO61__FUNC_B1_PCIE_PHY_I2C_SCL (MTK_PIN_NO(61) | 4)
481*9f1bdd7eSHui.Liu 
482*9f1bdd7eSHui.Liu #define PINMUX_GPIO62__FUNC_B_GPIO62 (MTK_PIN_NO(62) | 0)
483*9f1bdd7eSHui.Liu #define PINMUX_GPIO62__FUNC_B1_SDA3 (MTK_PIN_NO(62) | 1)
484*9f1bdd7eSHui.Liu #define PINMUX_GPIO62__FUNC_B1_SCP_SDA0 (MTK_PIN_NO(62) | 2)
485*9f1bdd7eSHui.Liu #define PINMUX_GPIO62__FUNC_B1_SCP_SDA1 (MTK_PIN_NO(62) | 3)
486*9f1bdd7eSHui.Liu #define PINMUX_GPIO62__FUNC_B1_PCIE_PHY_I2C_SDA (MTK_PIN_NO(62) | 4)
487*9f1bdd7eSHui.Liu 
488*9f1bdd7eSHui.Liu #define PINMUX_GPIO63__FUNC_B_GPIO63 (MTK_PIN_NO(63) | 0)
489*9f1bdd7eSHui.Liu #define PINMUX_GPIO63__FUNC_B1_SCL4 (MTK_PIN_NO(63) | 1)
490*9f1bdd7eSHui.Liu 
491*9f1bdd7eSHui.Liu #define PINMUX_GPIO64__FUNC_B_GPIO64 (MTK_PIN_NO(64) | 0)
492*9f1bdd7eSHui.Liu #define PINMUX_GPIO64__FUNC_B1_SDA4 (MTK_PIN_NO(64) | 1)
493*9f1bdd7eSHui.Liu 
494*9f1bdd7eSHui.Liu #define PINMUX_GPIO65__FUNC_B_GPIO65 (MTK_PIN_NO(65) | 0)
495*9f1bdd7eSHui.Liu #define PINMUX_GPIO65__FUNC_B1_SCL5 (MTK_PIN_NO(65) | 1)
496*9f1bdd7eSHui.Liu #define PINMUX_GPIO65__FUNC_B1_SCP_SCL0 (MTK_PIN_NO(65) | 2)
497*9f1bdd7eSHui.Liu #define PINMUX_GPIO65__FUNC_B1_SCP_SCL1 (MTK_PIN_NO(65) | 3)
498*9f1bdd7eSHui.Liu 
499*9f1bdd7eSHui.Liu #define PINMUX_GPIO66__FUNC_B_GPIO66 (MTK_PIN_NO(66) | 0)
500*9f1bdd7eSHui.Liu #define PINMUX_GPIO66__FUNC_B1_SDA5 (MTK_PIN_NO(66) | 1)
501*9f1bdd7eSHui.Liu #define PINMUX_GPIO66__FUNC_B1_SCP_SDA0 (MTK_PIN_NO(66) | 2)
502*9f1bdd7eSHui.Liu #define PINMUX_GPIO66__FUNC_B1_SCP_SDA1 (MTK_PIN_NO(66) | 3)
503*9f1bdd7eSHui.Liu 
504*9f1bdd7eSHui.Liu #define PINMUX_GPIO67__FUNC_B_GPIO67 (MTK_PIN_NO(67) | 0)
505*9f1bdd7eSHui.Liu #define PINMUX_GPIO67__FUNC_B1_SCL6 (MTK_PIN_NO(67) | 1)
506*9f1bdd7eSHui.Liu #define PINMUX_GPIO67__FUNC_B1_SCP_SCL0 (MTK_PIN_NO(67) | 2)
507*9f1bdd7eSHui.Liu #define PINMUX_GPIO67__FUNC_B1_SCP_SCL1 (MTK_PIN_NO(67) | 3)
508*9f1bdd7eSHui.Liu #define PINMUX_GPIO67__FUNC_B1_PCIE_PHY_I2C_SCL (MTK_PIN_NO(67) | 4)
509*9f1bdd7eSHui.Liu 
510*9f1bdd7eSHui.Liu #define PINMUX_GPIO68__FUNC_B_GPIO68 (MTK_PIN_NO(68) | 0)
511*9f1bdd7eSHui.Liu #define PINMUX_GPIO68__FUNC_B1_SDA6 (MTK_PIN_NO(68) | 1)
512*9f1bdd7eSHui.Liu #define PINMUX_GPIO68__FUNC_B1_SCP_SDA0 (MTK_PIN_NO(68) | 2)
513*9f1bdd7eSHui.Liu #define PINMUX_GPIO68__FUNC_B1_SCP_SDA1 (MTK_PIN_NO(68) | 3)
514*9f1bdd7eSHui.Liu #define PINMUX_GPIO68__FUNC_B1_PCIE_PHY_I2C_SDA (MTK_PIN_NO(68) | 4)
515*9f1bdd7eSHui.Liu 
516*9f1bdd7eSHui.Liu #define PINMUX_GPIO69__FUNC_B_GPIO69 (MTK_PIN_NO(69) | 0)
517*9f1bdd7eSHui.Liu #define PINMUX_GPIO69__FUNC_O_SPIM0_CSB (MTK_PIN_NO(69) | 1)
518*9f1bdd7eSHui.Liu #define PINMUX_GPIO69__FUNC_O_SCP_SPI0_CS (MTK_PIN_NO(69) | 2)
519*9f1bdd7eSHui.Liu #define PINMUX_GPIO69__FUNC_O_DMIC3_CLK (MTK_PIN_NO(69) | 3)
520*9f1bdd7eSHui.Liu #define PINMUX_GPIO69__FUNC_B0_MD32_1_GPIO0 (MTK_PIN_NO(69) | 4)
521*9f1bdd7eSHui.Liu #define PINMUX_GPIO69__FUNC_O_CMVREF0 (MTK_PIN_NO(69) | 5)
522*9f1bdd7eSHui.Liu #define PINMUX_GPIO69__FUNC_O_GDU_SUM_TROOP0_0 (MTK_PIN_NO(69) | 6)
523*9f1bdd7eSHui.Liu #define PINMUX_GPIO69__FUNC_B0_DBG_MON_A23 (MTK_PIN_NO(69) | 7)
524*9f1bdd7eSHui.Liu 
525*9f1bdd7eSHui.Liu #define PINMUX_GPIO70__FUNC_B_GPIO70 (MTK_PIN_NO(70) | 0)
526*9f1bdd7eSHui.Liu #define PINMUX_GPIO70__FUNC_O_SPIM0_CLK (MTK_PIN_NO(70) | 1)
527*9f1bdd7eSHui.Liu #define PINMUX_GPIO70__FUNC_O_SCP_SPI0_CK (MTK_PIN_NO(70) | 2)
528*9f1bdd7eSHui.Liu #define PINMUX_GPIO70__FUNC_I0_DMIC3_DAT (MTK_PIN_NO(70) | 3)
529*9f1bdd7eSHui.Liu #define PINMUX_GPIO70__FUNC_B0_MD32_1_GPIO1 (MTK_PIN_NO(70) | 4)
530*9f1bdd7eSHui.Liu #define PINMUX_GPIO70__FUNC_O_CMVREF1 (MTK_PIN_NO(70) | 5)
531*9f1bdd7eSHui.Liu #define PINMUX_GPIO70__FUNC_O_GDU_SUM_TROOP0_1 (MTK_PIN_NO(70) | 6)
532*9f1bdd7eSHui.Liu #define PINMUX_GPIO70__FUNC_B0_DBG_MON_A24 (MTK_PIN_NO(70) | 7)
533*9f1bdd7eSHui.Liu 
534*9f1bdd7eSHui.Liu #define PINMUX_GPIO71__FUNC_B_GPIO71 (MTK_PIN_NO(71) | 0)
535*9f1bdd7eSHui.Liu #define PINMUX_GPIO71__FUNC_B0_SPIM0_MOSI (MTK_PIN_NO(71) | 1)
536*9f1bdd7eSHui.Liu #define PINMUX_GPIO71__FUNC_O_SCP_SPI0_MO (MTK_PIN_NO(71) | 2)
537*9f1bdd7eSHui.Liu #define PINMUX_GPIO71__FUNC_I0_DMIC3_DAT_R (MTK_PIN_NO(71) | 3)
538*9f1bdd7eSHui.Liu #define PINMUX_GPIO71__FUNC_B0_MD32_1_GPIO2 (MTK_PIN_NO(71) | 4)
539*9f1bdd7eSHui.Liu #define PINMUX_GPIO71__FUNC_O_CMVREF2 (MTK_PIN_NO(71) | 5)
540*9f1bdd7eSHui.Liu #define PINMUX_GPIO71__FUNC_O_GDU_SUM_TROOP0_2 (MTK_PIN_NO(71) | 6)
541*9f1bdd7eSHui.Liu #define PINMUX_GPIO71__FUNC_B0_DBG_MON_A25 (MTK_PIN_NO(71) | 7)
542*9f1bdd7eSHui.Liu 
543*9f1bdd7eSHui.Liu #define PINMUX_GPIO72__FUNC_B_GPIO72 (MTK_PIN_NO(72) | 0)
544*9f1bdd7eSHui.Liu #define PINMUX_GPIO72__FUNC_B0_SPIM0_MISO (MTK_PIN_NO(72) | 1)
545*9f1bdd7eSHui.Liu #define PINMUX_GPIO72__FUNC_I0_SCP_SPI0_MI (MTK_PIN_NO(72) | 2)
546*9f1bdd7eSHui.Liu #define PINMUX_GPIO72__FUNC_O_DMIC4_CLK (MTK_PIN_NO(72) | 3)
547*9f1bdd7eSHui.Liu #define PINMUX_GPIO72__FUNC_O_CMVREF3 (MTK_PIN_NO(72) | 5)
548*9f1bdd7eSHui.Liu #define PINMUX_GPIO72__FUNC_O_GDU_SUM_TROOP1_0 (MTK_PIN_NO(72) | 6)
549*9f1bdd7eSHui.Liu #define PINMUX_GPIO72__FUNC_B0_DBG_MON_A26 (MTK_PIN_NO(72) | 7)
550*9f1bdd7eSHui.Liu 
551*9f1bdd7eSHui.Liu #define PINMUX_GPIO73__FUNC_B_GPIO73 (MTK_PIN_NO(73) | 0)
552*9f1bdd7eSHui.Liu #define PINMUX_GPIO73__FUNC_B0_SPIM0_MIO2 (MTK_PIN_NO(73) | 1)
553*9f1bdd7eSHui.Liu #define PINMUX_GPIO73__FUNC_O_UTXD3 (MTK_PIN_NO(73) | 2)
554*9f1bdd7eSHui.Liu #define PINMUX_GPIO73__FUNC_I0_DMIC4_DAT (MTK_PIN_NO(73) | 3)
555*9f1bdd7eSHui.Liu #define PINMUX_GPIO73__FUNC_O_CLKM0 (MTK_PIN_NO(73) | 4)
556*9f1bdd7eSHui.Liu #define PINMUX_GPIO73__FUNC_O_CMVREF4 (MTK_PIN_NO(73) | 5)
557*9f1bdd7eSHui.Liu #define PINMUX_GPIO73__FUNC_O_GDU_SUM_TROOP1_1 (MTK_PIN_NO(73) | 6)
558*9f1bdd7eSHui.Liu #define PINMUX_GPIO73__FUNC_B0_DBG_MON_A27 (MTK_PIN_NO(73) | 7)
559*9f1bdd7eSHui.Liu 
560*9f1bdd7eSHui.Liu #define PINMUX_GPIO74__FUNC_B_GPIO74 (MTK_PIN_NO(74) | 0)
561*9f1bdd7eSHui.Liu #define PINMUX_GPIO74__FUNC_B0_SPIM0_MIO3 (MTK_PIN_NO(74) | 1)
562*9f1bdd7eSHui.Liu #define PINMUX_GPIO74__FUNC_I1_URXD3 (MTK_PIN_NO(74) | 2)
563*9f1bdd7eSHui.Liu #define PINMUX_GPIO74__FUNC_I0_DMIC4_DAT_R (MTK_PIN_NO(74) | 3)
564*9f1bdd7eSHui.Liu #define PINMUX_GPIO74__FUNC_O_CLKM1 (MTK_PIN_NO(74) | 4)
565*9f1bdd7eSHui.Liu #define PINMUX_GPIO74__FUNC_O_CMVREF5 (MTK_PIN_NO(74) | 5)
566*9f1bdd7eSHui.Liu #define PINMUX_GPIO74__FUNC_O_GDU_SUM_TROOP1_2 (MTK_PIN_NO(74) | 6)
567*9f1bdd7eSHui.Liu #define PINMUX_GPIO74__FUNC_B0_DBG_MON_A28 (MTK_PIN_NO(74) | 7)
568*9f1bdd7eSHui.Liu 
569*9f1bdd7eSHui.Liu #define PINMUX_GPIO75__FUNC_B_GPIO75 (MTK_PIN_NO(75) | 0)
570*9f1bdd7eSHui.Liu #define PINMUX_GPIO75__FUNC_O_SPIM1_CSB (MTK_PIN_NO(75) | 1)
571*9f1bdd7eSHui.Liu #define PINMUX_GPIO75__FUNC_O_SCP_SPI1_A_CS (MTK_PIN_NO(75) | 2)
572*9f1bdd7eSHui.Liu #define PINMUX_GPIO75__FUNC_B0_TDMIN_MCK (MTK_PIN_NO(75) | 3)
573*9f1bdd7eSHui.Liu #define PINMUX_GPIO75__FUNC_B1_SCP_SCL0 (MTK_PIN_NO(75) | 4)
574*9f1bdd7eSHui.Liu #define PINMUX_GPIO75__FUNC_O_CMVREF6 (MTK_PIN_NO(75) | 5)
575*9f1bdd7eSHui.Liu #define PINMUX_GPIO75__FUNC_O_GDU_SUM_TROOP2_0 (MTK_PIN_NO(75) | 6)
576*9f1bdd7eSHui.Liu #define PINMUX_GPIO75__FUNC_B0_DBG_MON_A29 (MTK_PIN_NO(75) | 7)
577*9f1bdd7eSHui.Liu 
578*9f1bdd7eSHui.Liu #define PINMUX_GPIO76__FUNC_B_GPIO76 (MTK_PIN_NO(76) | 0)
579*9f1bdd7eSHui.Liu #define PINMUX_GPIO76__FUNC_O_SPIM1_CLK (MTK_PIN_NO(76) | 1)
580*9f1bdd7eSHui.Liu #define PINMUX_GPIO76__FUNC_O_SCP_SPI1_A_CK (MTK_PIN_NO(76) | 2)
581*9f1bdd7eSHui.Liu #define PINMUX_GPIO76__FUNC_B0_TDMIN_BCK (MTK_PIN_NO(76) | 3)
582*9f1bdd7eSHui.Liu #define PINMUX_GPIO76__FUNC_B1_SCP_SDA0 (MTK_PIN_NO(76) | 4)
583*9f1bdd7eSHui.Liu #define PINMUX_GPIO76__FUNC_O_CMVREF7 (MTK_PIN_NO(76) | 5)
584*9f1bdd7eSHui.Liu #define PINMUX_GPIO76__FUNC_O_GDU_SUM_TROOP2_1 (MTK_PIN_NO(76) | 6)
585*9f1bdd7eSHui.Liu #define PINMUX_GPIO76__FUNC_B0_DBG_MON_A30 (MTK_PIN_NO(76) | 7)
586*9f1bdd7eSHui.Liu 
587*9f1bdd7eSHui.Liu #define PINMUX_GPIO77__FUNC_B_GPIO77 (MTK_PIN_NO(77) | 0)
588*9f1bdd7eSHui.Liu #define PINMUX_GPIO77__FUNC_B0_SPIM1_MOSI (MTK_PIN_NO(77) | 1)
589*9f1bdd7eSHui.Liu #define PINMUX_GPIO77__FUNC_O_SCP_SPI1_A_MO (MTK_PIN_NO(77) | 2)
590*9f1bdd7eSHui.Liu #define PINMUX_GPIO77__FUNC_B0_TDMIN_LRCK (MTK_PIN_NO(77) | 3)
591*9f1bdd7eSHui.Liu #define PINMUX_GPIO77__FUNC_B1_SCP_SCL1 (MTK_PIN_NO(77) | 4)
592*9f1bdd7eSHui.Liu #define PINMUX_GPIO77__FUNC_O_GDU_SUM_TROOP2_2 (MTK_PIN_NO(77) | 6)
593*9f1bdd7eSHui.Liu #define PINMUX_GPIO77__FUNC_B0_DBG_MON_A31 (MTK_PIN_NO(77) | 7)
594*9f1bdd7eSHui.Liu 
595*9f1bdd7eSHui.Liu #define PINMUX_GPIO78__FUNC_B_GPIO78 (MTK_PIN_NO(78) | 0)
596*9f1bdd7eSHui.Liu #define PINMUX_GPIO78__FUNC_B0_SPIM1_MISO (MTK_PIN_NO(78) | 1)
597*9f1bdd7eSHui.Liu #define PINMUX_GPIO78__FUNC_I0_SCP_SPI1_A_MI (MTK_PIN_NO(78) | 2)
598*9f1bdd7eSHui.Liu #define PINMUX_GPIO78__FUNC_I0_TDMIN_DI (MTK_PIN_NO(78) | 3)
599*9f1bdd7eSHui.Liu #define PINMUX_GPIO78__FUNC_B1_SCP_SDA1 (MTK_PIN_NO(78) | 4)
600*9f1bdd7eSHui.Liu #define PINMUX_GPIO78__FUNC_B0_DBG_MON_A32 (MTK_PIN_NO(78) | 7)
601*9f1bdd7eSHui.Liu 
602*9f1bdd7eSHui.Liu #define PINMUX_GPIO79__FUNC_B_GPIO79 (MTK_PIN_NO(79) | 0)
603*9f1bdd7eSHui.Liu #define PINMUX_GPIO79__FUNC_O_SPIM2_CSB (MTK_PIN_NO(79) | 1)
604*9f1bdd7eSHui.Liu #define PINMUX_GPIO79__FUNC_O_SCP_SPI2_CS (MTK_PIN_NO(79) | 2)
605*9f1bdd7eSHui.Liu #define PINMUX_GPIO79__FUNC_O_I2SO1_MCK (MTK_PIN_NO(79) | 3)
606*9f1bdd7eSHui.Liu #define PINMUX_GPIO79__FUNC_O_UTXD2 (MTK_PIN_NO(79) | 4)
607*9f1bdd7eSHui.Liu #define PINMUX_GPIO79__FUNC_O_TP_UTXD2_AO (MTK_PIN_NO(79) | 5)
608*9f1bdd7eSHui.Liu #define PINMUX_GPIO79__FUNC_B0_PCM_SYNC (MTK_PIN_NO(79) | 6)
609*9f1bdd7eSHui.Liu #define PINMUX_GPIO79__FUNC_B0_DBG_MON_B0 (MTK_PIN_NO(79) | 7)
610*9f1bdd7eSHui.Liu 
611*9f1bdd7eSHui.Liu #define PINMUX_GPIO80__FUNC_B_GPIO80 (MTK_PIN_NO(80) | 0)
612*9f1bdd7eSHui.Liu #define PINMUX_GPIO80__FUNC_O_SPIM2_CLK (MTK_PIN_NO(80) | 1)
613*9f1bdd7eSHui.Liu #define PINMUX_GPIO80__FUNC_O_SCP_SPI2_CK (MTK_PIN_NO(80) | 2)
614*9f1bdd7eSHui.Liu #define PINMUX_GPIO80__FUNC_O_I2SO1_BCK (MTK_PIN_NO(80) | 3)
615*9f1bdd7eSHui.Liu #define PINMUX_GPIO80__FUNC_I1_URXD2 (MTK_PIN_NO(80) | 4)
616*9f1bdd7eSHui.Liu #define PINMUX_GPIO80__FUNC_I1_TP_URXD2_AO (MTK_PIN_NO(80) | 5)
617*9f1bdd7eSHui.Liu #define PINMUX_GPIO80__FUNC_B0_PCM_CLK (MTK_PIN_NO(80) | 6)
618*9f1bdd7eSHui.Liu #define PINMUX_GPIO80__FUNC_B0_DBG_MON_B1 (MTK_PIN_NO(80) | 7)
619*9f1bdd7eSHui.Liu 
620*9f1bdd7eSHui.Liu #define PINMUX_GPIO81__FUNC_B_GPIO81 (MTK_PIN_NO(81) | 0)
621*9f1bdd7eSHui.Liu #define PINMUX_GPIO81__FUNC_B0_SPIM2_MOSI (MTK_PIN_NO(81) | 1)
622*9f1bdd7eSHui.Liu #define PINMUX_GPIO81__FUNC_O_SCP_SPI2_MO (MTK_PIN_NO(81) | 2)
623*9f1bdd7eSHui.Liu #define PINMUX_GPIO81__FUNC_O_I2SO1_WS (MTK_PIN_NO(81) | 3)
624*9f1bdd7eSHui.Liu #define PINMUX_GPIO81__FUNC_O_URTS2 (MTK_PIN_NO(81) | 4)
625*9f1bdd7eSHui.Liu #define PINMUX_GPIO81__FUNC_O_TP_URTS2_AO (MTK_PIN_NO(81) | 5)
626*9f1bdd7eSHui.Liu #define PINMUX_GPIO81__FUNC_O_PCM_DO (MTK_PIN_NO(81) | 6)
627*9f1bdd7eSHui.Liu #define PINMUX_GPIO81__FUNC_B0_DBG_MON_B2 (MTK_PIN_NO(81) | 7)
628*9f1bdd7eSHui.Liu 
629*9f1bdd7eSHui.Liu #define PINMUX_GPIO82__FUNC_B_GPIO82 (MTK_PIN_NO(82) | 0)
630*9f1bdd7eSHui.Liu #define PINMUX_GPIO82__FUNC_B0_SPIM2_MISO (MTK_PIN_NO(82) | 1)
631*9f1bdd7eSHui.Liu #define PINMUX_GPIO82__FUNC_I0_SCP_SPI2_MI (MTK_PIN_NO(82) | 2)
632*9f1bdd7eSHui.Liu #define PINMUX_GPIO82__FUNC_O_I2SO1_D0 (MTK_PIN_NO(82) | 3)
633*9f1bdd7eSHui.Liu #define PINMUX_GPIO82__FUNC_I1_UCTS2 (MTK_PIN_NO(82) | 4)
634*9f1bdd7eSHui.Liu #define PINMUX_GPIO82__FUNC_I1_TP_UCTS2_AO (MTK_PIN_NO(82) | 5)
635*9f1bdd7eSHui.Liu #define PINMUX_GPIO82__FUNC_I0_PCM_DI (MTK_PIN_NO(82) | 6)
636*9f1bdd7eSHui.Liu #define PINMUX_GPIO82__FUNC_B0_DBG_MON_B3 (MTK_PIN_NO(82) | 7)
637*9f1bdd7eSHui.Liu 
638*9f1bdd7eSHui.Liu #define PINMUX_GPIO83__FUNC_B_GPIO83 (MTK_PIN_NO(83) | 0)
639*9f1bdd7eSHui.Liu #define PINMUX_GPIO83__FUNC_I1_IDDIG (MTK_PIN_NO(83) | 1)
640*9f1bdd7eSHui.Liu 
641*9f1bdd7eSHui.Liu #define PINMUX_GPIO84__FUNC_B_GPIO84 (MTK_PIN_NO(84) | 0)
642*9f1bdd7eSHui.Liu #define PINMUX_GPIO84__FUNC_O_USB_DRVVBUS (MTK_PIN_NO(84) | 1)
643*9f1bdd7eSHui.Liu 
644*9f1bdd7eSHui.Liu #define PINMUX_GPIO85__FUNC_B_GPIO85 (MTK_PIN_NO(85) | 0)
645*9f1bdd7eSHui.Liu #define PINMUX_GPIO85__FUNC_I0_VBUSVALID (MTK_PIN_NO(85) | 1)
646*9f1bdd7eSHui.Liu 
647*9f1bdd7eSHui.Liu #define PINMUX_GPIO86__FUNC_B_GPIO86 (MTK_PIN_NO(86) | 0)
648*9f1bdd7eSHui.Liu #define PINMUX_GPIO86__FUNC_I1_IDDIG_1P (MTK_PIN_NO(86) | 1)
649*9f1bdd7eSHui.Liu #define PINMUX_GPIO86__FUNC_O_UTXD1 (MTK_PIN_NO(86) | 2)
650*9f1bdd7eSHui.Liu #define PINMUX_GPIO86__FUNC_O_URTS2 (MTK_PIN_NO(86) | 3)
651*9f1bdd7eSHui.Liu #define PINMUX_GPIO86__FUNC_O_PWM_2 (MTK_PIN_NO(86) | 4)
652*9f1bdd7eSHui.Liu #define PINMUX_GPIO86__FUNC_B0_TP_GPIO4_AO (MTK_PIN_NO(86) | 5)
653*9f1bdd7eSHui.Liu #define PINMUX_GPIO86__FUNC_O_AUXIF_ST0 (MTK_PIN_NO(86) | 6)
654*9f1bdd7eSHui.Liu #define PINMUX_GPIO86__FUNC_B0_DBG_MON_B4 (MTK_PIN_NO(86) | 7)
655*9f1bdd7eSHui.Liu 
656*9f1bdd7eSHui.Liu #define PINMUX_GPIO87__FUNC_B_GPIO87 (MTK_PIN_NO(87) | 0)
657*9f1bdd7eSHui.Liu #define PINMUX_GPIO87__FUNC_O_USB_DRVVBUS_1P (MTK_PIN_NO(87) | 1)
658*9f1bdd7eSHui.Liu #define PINMUX_GPIO87__FUNC_I1_URXD1 (MTK_PIN_NO(87) | 2)
659*9f1bdd7eSHui.Liu #define PINMUX_GPIO87__FUNC_I1_UCTS2 (MTK_PIN_NO(87) | 3)
660*9f1bdd7eSHui.Liu #define PINMUX_GPIO87__FUNC_O_PWM_3 (MTK_PIN_NO(87) | 4)
661*9f1bdd7eSHui.Liu #define PINMUX_GPIO87__FUNC_B0_TP_GPIO5_AO (MTK_PIN_NO(87) | 5)
662*9f1bdd7eSHui.Liu #define PINMUX_GPIO87__FUNC_O_AUXIF_CLK0 (MTK_PIN_NO(87) | 6)
663*9f1bdd7eSHui.Liu #define PINMUX_GPIO87__FUNC_B0_DBG_MON_B5 (MTK_PIN_NO(87) | 7)
664*9f1bdd7eSHui.Liu 
665*9f1bdd7eSHui.Liu #define PINMUX_GPIO88__FUNC_B_GPIO88 (MTK_PIN_NO(88) | 0)
666*9f1bdd7eSHui.Liu #define PINMUX_GPIO88__FUNC_I0_VBUSVALID_1P (MTK_PIN_NO(88) | 1)
667*9f1bdd7eSHui.Liu #define PINMUX_GPIO88__FUNC_O_UTXD2 (MTK_PIN_NO(88) | 2)
668*9f1bdd7eSHui.Liu #define PINMUX_GPIO88__FUNC_O_URTS1 (MTK_PIN_NO(88) | 3)
669*9f1bdd7eSHui.Liu #define PINMUX_GPIO88__FUNC_O_CLKM2 (MTK_PIN_NO(88) | 4)
670*9f1bdd7eSHui.Liu #define PINMUX_GPIO88__FUNC_B0_TP_GPIO6_AO (MTK_PIN_NO(88) | 5)
671*9f1bdd7eSHui.Liu #define PINMUX_GPIO88__FUNC_O_AUXIF_ST1 (MTK_PIN_NO(88) | 6)
672*9f1bdd7eSHui.Liu #define PINMUX_GPIO88__FUNC_B0_DBG_MON_B6 (MTK_PIN_NO(88) | 7)
673*9f1bdd7eSHui.Liu 
674*9f1bdd7eSHui.Liu #define PINMUX_GPIO89__FUNC_B_GPIO89 (MTK_PIN_NO(89) | 0)
675*9f1bdd7eSHui.Liu #define PINMUX_GPIO89__FUNC_I1_IDDIG_2P (MTK_PIN_NO(89) | 1)
676*9f1bdd7eSHui.Liu #define PINMUX_GPIO89__FUNC_I1_URXD2 (MTK_PIN_NO(89) | 2)
677*9f1bdd7eSHui.Liu #define PINMUX_GPIO89__FUNC_I1_UCTS1 (MTK_PIN_NO(89) | 3)
678*9f1bdd7eSHui.Liu #define PINMUX_GPIO89__FUNC_O_CLKM3 (MTK_PIN_NO(89) | 4)
679*9f1bdd7eSHui.Liu #define PINMUX_GPIO89__FUNC_B0_TP_GPIO7_AO (MTK_PIN_NO(89) | 5)
680*9f1bdd7eSHui.Liu #define PINMUX_GPIO89__FUNC_O_AUXIF_CLK1 (MTK_PIN_NO(89) | 6)
681*9f1bdd7eSHui.Liu #define PINMUX_GPIO89__FUNC_B0_DBG_MON_B7 (MTK_PIN_NO(89) | 7)
682*9f1bdd7eSHui.Liu 
683*9f1bdd7eSHui.Liu #define PINMUX_GPIO90__FUNC_B_GPIO90 (MTK_PIN_NO(90) | 0)
684*9f1bdd7eSHui.Liu #define PINMUX_GPIO90__FUNC_O_USB_DRVVBUS_2P (MTK_PIN_NO(90) | 1)
685*9f1bdd7eSHui.Liu #define PINMUX_GPIO90__FUNC_O_UTXD3 (MTK_PIN_NO(90) | 2)
686*9f1bdd7eSHui.Liu #define PINMUX_GPIO90__FUNC_O_ADSP_UTXD0 (MTK_PIN_NO(90) | 3)
687*9f1bdd7eSHui.Liu #define PINMUX_GPIO90__FUNC_O_SSPM_UTXD_AO (MTK_PIN_NO(90) | 4)
688*9f1bdd7eSHui.Liu #define PINMUX_GPIO90__FUNC_O_MD32_0_TXD (MTK_PIN_NO(90) | 5)
689*9f1bdd7eSHui.Liu #define PINMUX_GPIO90__FUNC_O_MD32_1_TXD (MTK_PIN_NO(90) | 6)
690*9f1bdd7eSHui.Liu #define PINMUX_GPIO90__FUNC_B0_DBG_MON_B8 (MTK_PIN_NO(90) | 7)
691*9f1bdd7eSHui.Liu 
692*9f1bdd7eSHui.Liu #define PINMUX_GPIO91__FUNC_B_GPIO91 (MTK_PIN_NO(91) | 0)
693*9f1bdd7eSHui.Liu #define PINMUX_GPIO91__FUNC_I0_VBUSVALID_2P (MTK_PIN_NO(91) | 1)
694*9f1bdd7eSHui.Liu #define PINMUX_GPIO91__FUNC_I1_URXD3 (MTK_PIN_NO(91) | 2)
695*9f1bdd7eSHui.Liu #define PINMUX_GPIO91__FUNC_I1_ADSP_URXD0 (MTK_PIN_NO(91) | 3)
696*9f1bdd7eSHui.Liu #define PINMUX_GPIO91__FUNC_I1_SSPM_URXD_AO (MTK_PIN_NO(91) | 4)
697*9f1bdd7eSHui.Liu #define PINMUX_GPIO91__FUNC_I1_MD32_0_RXD (MTK_PIN_NO(91) | 5)
698*9f1bdd7eSHui.Liu #define PINMUX_GPIO91__FUNC_I1_MD32_1_RXD (MTK_PIN_NO(91) | 6)
699*9f1bdd7eSHui.Liu #define PINMUX_GPIO91__FUNC_B0_DBG_MON_B9 (MTK_PIN_NO(91) | 7)
700*9f1bdd7eSHui.Liu 
701*9f1bdd7eSHui.Liu #define PINMUX_GPIO92__FUNC_B_GPIO92 (MTK_PIN_NO(92) | 0)
702*9f1bdd7eSHui.Liu #define PINMUX_GPIO92__FUNC_O_PWRAP_SPI0_CSN (MTK_PIN_NO(92) | 1)
703*9f1bdd7eSHui.Liu 
704*9f1bdd7eSHui.Liu #define PINMUX_GPIO93__FUNC_B_GPIO93 (MTK_PIN_NO(93) | 0)
705*9f1bdd7eSHui.Liu #define PINMUX_GPIO93__FUNC_O_PWRAP_SPI0_CK (MTK_PIN_NO(93) | 1)
706*9f1bdd7eSHui.Liu 
707*9f1bdd7eSHui.Liu #define PINMUX_GPIO94__FUNC_B_GPIO94 (MTK_PIN_NO(94) | 0)
708*9f1bdd7eSHui.Liu #define PINMUX_GPIO94__FUNC_B0_PWRAP_SPI0_MO (MTK_PIN_NO(94) | 1)
709*9f1bdd7eSHui.Liu #define PINMUX_GPIO94__FUNC_B0_PWRAP_SPI0_MI (MTK_PIN_NO(94) | 2)
710*9f1bdd7eSHui.Liu 
711*9f1bdd7eSHui.Liu #define PINMUX_GPIO95__FUNC_B_GPIO95 (MTK_PIN_NO(95) | 0)
712*9f1bdd7eSHui.Liu #define PINMUX_GPIO95__FUNC_B0_PWRAP_SPI0_MI (MTK_PIN_NO(95) | 1)
713*9f1bdd7eSHui.Liu #define PINMUX_GPIO95__FUNC_B0_PWRAP_SPI0_MO (MTK_PIN_NO(95) | 2)
714*9f1bdd7eSHui.Liu 
715*9f1bdd7eSHui.Liu #define PINMUX_GPIO96__FUNC_B_GPIO96 (MTK_PIN_NO(96) | 0)
716*9f1bdd7eSHui.Liu #define PINMUX_GPIO96__FUNC_O_SRCLKENA0 (MTK_PIN_NO(96) | 1)
717*9f1bdd7eSHui.Liu 
718*9f1bdd7eSHui.Liu #define PINMUX_GPIO97__FUNC_B_GPIO97 (MTK_PIN_NO(97) | 0)
719*9f1bdd7eSHui.Liu #define PINMUX_GPIO97__FUNC_O_SRCLKENA1 (MTK_PIN_NO(97) | 1)
720*9f1bdd7eSHui.Liu 
721*9f1bdd7eSHui.Liu #define PINMUX_GPIO98__FUNC_B_GPIO98 (MTK_PIN_NO(98) | 0)
722*9f1bdd7eSHui.Liu #define PINMUX_GPIO98__FUNC_O_SCP_VREQ_VAO (MTK_PIN_NO(98) | 1)
723*9f1bdd7eSHui.Liu #define PINMUX_GPIO98__FUNC_I0_DVFSRC_EXT_REQ (MTK_PIN_NO(98) | 2)
724*9f1bdd7eSHui.Liu 
725*9f1bdd7eSHui.Liu #define PINMUX_GPIO99__FUNC_B_GPIO99 (MTK_PIN_NO(99) | 0)
726*9f1bdd7eSHui.Liu #define PINMUX_GPIO99__FUNC_I0_RTC32K_CK (MTK_PIN_NO(99) | 1)
727*9f1bdd7eSHui.Liu 
728*9f1bdd7eSHui.Liu #define PINMUX_GPIO100__FUNC_B_GPIO100 (MTK_PIN_NO(100) | 0)
729*9f1bdd7eSHui.Liu #define PINMUX_GPIO100__FUNC_O_WATCHDOG (MTK_PIN_NO(100) | 1)
730*9f1bdd7eSHui.Liu 
731*9f1bdd7eSHui.Liu #define PINMUX_GPIO101__FUNC_B_GPIO101 (MTK_PIN_NO(101) | 0)
732*9f1bdd7eSHui.Liu #define PINMUX_GPIO101__FUNC_O_AUD_CLK_MOSI (MTK_PIN_NO(101) | 1)
733*9f1bdd7eSHui.Liu #define PINMUX_GPIO101__FUNC_O_I2SO1_MCK (MTK_PIN_NO(101) | 2)
734*9f1bdd7eSHui.Liu #define PINMUX_GPIO101__FUNC_B0_I2SIN_BCK (MTK_PIN_NO(101) | 3)
735*9f1bdd7eSHui.Liu 
736*9f1bdd7eSHui.Liu #define PINMUX_GPIO102__FUNC_B_GPIO102 (MTK_PIN_NO(102) | 0)
737*9f1bdd7eSHui.Liu #define PINMUX_GPIO102__FUNC_O_AUD_SYNC_MOSI (MTK_PIN_NO(102) | 1)
738*9f1bdd7eSHui.Liu #define PINMUX_GPIO102__FUNC_O_I2SO1_BCK (MTK_PIN_NO(102) | 2)
739*9f1bdd7eSHui.Liu #define PINMUX_GPIO102__FUNC_B0_I2SIN_WS (MTK_PIN_NO(102) | 3)
740*9f1bdd7eSHui.Liu 
741*9f1bdd7eSHui.Liu #define PINMUX_GPIO103__FUNC_B_GPIO103 (MTK_PIN_NO(103) | 0)
742*9f1bdd7eSHui.Liu #define PINMUX_GPIO103__FUNC_O_AUD_DAT_MOSI0 (MTK_PIN_NO(103) | 1)
743*9f1bdd7eSHui.Liu #define PINMUX_GPIO103__FUNC_O_I2SO1_WS (MTK_PIN_NO(103) | 2)
744*9f1bdd7eSHui.Liu #define PINMUX_GPIO103__FUNC_I0_I2SIN_D0 (MTK_PIN_NO(103) | 3)
745*9f1bdd7eSHui.Liu 
746*9f1bdd7eSHui.Liu #define PINMUX_GPIO104__FUNC_B_GPIO104 (MTK_PIN_NO(104) | 0)
747*9f1bdd7eSHui.Liu #define PINMUX_GPIO104__FUNC_O_AUD_DAT_MOSI1 (MTK_PIN_NO(104) | 1)
748*9f1bdd7eSHui.Liu #define PINMUX_GPIO104__FUNC_O_I2SO1_D0 (MTK_PIN_NO(104) | 2)
749*9f1bdd7eSHui.Liu #define PINMUX_GPIO104__FUNC_I0_I2SIN_D1 (MTK_PIN_NO(104) | 3)
750*9f1bdd7eSHui.Liu 
751*9f1bdd7eSHui.Liu #define PINMUX_GPIO105__FUNC_B_GPIO105 (MTK_PIN_NO(105) | 0)
752*9f1bdd7eSHui.Liu #define PINMUX_GPIO105__FUNC_I0_AUD_DAT_MISO0 (MTK_PIN_NO(105) | 1)
753*9f1bdd7eSHui.Liu #define PINMUX_GPIO105__FUNC_I0_VOW_DAT_MISO (MTK_PIN_NO(105) | 2)
754*9f1bdd7eSHui.Liu #define PINMUX_GPIO105__FUNC_I0_I2SIN_D2 (MTK_PIN_NO(105) | 3)
755*9f1bdd7eSHui.Liu 
756*9f1bdd7eSHui.Liu #define PINMUX_GPIO106__FUNC_B_GPIO106 (MTK_PIN_NO(106) | 0)
757*9f1bdd7eSHui.Liu #define PINMUX_GPIO106__FUNC_I0_AUD_DAT_MISO1 (MTK_PIN_NO(106) | 1)
758*9f1bdd7eSHui.Liu #define PINMUX_GPIO106__FUNC_I0_VOW_CLK_MISO (MTK_PIN_NO(106) | 2)
759*9f1bdd7eSHui.Liu #define PINMUX_GPIO106__FUNC_I0_I2SIN_D3 (MTK_PIN_NO(106) | 3)
760*9f1bdd7eSHui.Liu 
761*9f1bdd7eSHui.Liu #define PINMUX_GPIO107__FUNC_B_GPIO107 (MTK_PIN_NO(107) | 0)
762*9f1bdd7eSHui.Liu #define PINMUX_GPIO107__FUNC_B0_I2SIN_MCK (MTK_PIN_NO(107) | 1)
763*9f1bdd7eSHui.Liu #define PINMUX_GPIO107__FUNC_I0_SPLIN_MCK (MTK_PIN_NO(107) | 2)
764*9f1bdd7eSHui.Liu #define PINMUX_GPIO107__FUNC_I0_SPDIF_IN0 (MTK_PIN_NO(107) | 3)
765*9f1bdd7eSHui.Liu #define PINMUX_GPIO107__FUNC_O_CMVREF4 (MTK_PIN_NO(107) | 4)
766*9f1bdd7eSHui.Liu #define PINMUX_GPIO107__FUNC_O_AUXIF_ST0 (MTK_PIN_NO(107) | 5)
767*9f1bdd7eSHui.Liu #define PINMUX_GPIO107__FUNC_O_PGD_LV_LSC_PWR0 (MTK_PIN_NO(107) | 6)
768*9f1bdd7eSHui.Liu 
769*9f1bdd7eSHui.Liu #define PINMUX_GPIO108__FUNC_B_GPIO108 (MTK_PIN_NO(108) | 0)
770*9f1bdd7eSHui.Liu #define PINMUX_GPIO108__FUNC_B0_I2SIN_BCK (MTK_PIN_NO(108) | 1)
771*9f1bdd7eSHui.Liu #define PINMUX_GPIO108__FUNC_I0_SPLIN_LRCK (MTK_PIN_NO(108) | 2)
772*9f1bdd7eSHui.Liu #define PINMUX_GPIO108__FUNC_O_DMIC4_CLK (MTK_PIN_NO(108) | 3)
773*9f1bdd7eSHui.Liu #define PINMUX_GPIO108__FUNC_O_CMVREF5 (MTK_PIN_NO(108) | 4)
774*9f1bdd7eSHui.Liu #define PINMUX_GPIO108__FUNC_O_AUXIF_CLK0 (MTK_PIN_NO(108) | 5)
775*9f1bdd7eSHui.Liu #define PINMUX_GPIO108__FUNC_O_PGD_LV_LSC_PWR1 (MTK_PIN_NO(108) | 6)
776*9f1bdd7eSHui.Liu #define PINMUX_GPIO108__FUNC_B0_DBG_MON_B10 (MTK_PIN_NO(108) | 7)
777*9f1bdd7eSHui.Liu 
778*9f1bdd7eSHui.Liu #define PINMUX_GPIO109__FUNC_B_GPIO109 (MTK_PIN_NO(109) | 0)
779*9f1bdd7eSHui.Liu #define PINMUX_GPIO109__FUNC_B0_I2SIN_WS (MTK_PIN_NO(109) | 1)
780*9f1bdd7eSHui.Liu #define PINMUX_GPIO109__FUNC_I0_SPLIN_BCK (MTK_PIN_NO(109) | 2)
781*9f1bdd7eSHui.Liu #define PINMUX_GPIO109__FUNC_I0_DMIC4_DAT (MTK_PIN_NO(109) | 3)
782*9f1bdd7eSHui.Liu #define PINMUX_GPIO109__FUNC_O_CMVREF6 (MTK_PIN_NO(109) | 4)
783*9f1bdd7eSHui.Liu #define PINMUX_GPIO109__FUNC_O_AUXIF_ST1 (MTK_PIN_NO(109) | 5)
784*9f1bdd7eSHui.Liu #define PINMUX_GPIO109__FUNC_O_PGD_LV_LSC_PWR2 (MTK_PIN_NO(109) | 6)
785*9f1bdd7eSHui.Liu #define PINMUX_GPIO109__FUNC_B0_DBG_MON_B11 (MTK_PIN_NO(109) | 7)
786*9f1bdd7eSHui.Liu 
787*9f1bdd7eSHui.Liu #define PINMUX_GPIO110__FUNC_B_GPIO110 (MTK_PIN_NO(110) | 0)
788*9f1bdd7eSHui.Liu #define PINMUX_GPIO110__FUNC_I0_I2SIN_D0 (MTK_PIN_NO(110) | 1)
789*9f1bdd7eSHui.Liu #define PINMUX_GPIO110__FUNC_I0_SPLIN_D0 (MTK_PIN_NO(110) | 2)
790*9f1bdd7eSHui.Liu #define PINMUX_GPIO110__FUNC_I0_DMIC4_DAT_R (MTK_PIN_NO(110) | 3)
791*9f1bdd7eSHui.Liu #define PINMUX_GPIO110__FUNC_O_CMVREF7 (MTK_PIN_NO(110) | 4)
792*9f1bdd7eSHui.Liu #define PINMUX_GPIO110__FUNC_O_AUXIF_CLK1 (MTK_PIN_NO(110) | 5)
793*9f1bdd7eSHui.Liu #define PINMUX_GPIO110__FUNC_O_PGD_LV_LSC_PWR3 (MTK_PIN_NO(110) | 6)
794*9f1bdd7eSHui.Liu #define PINMUX_GPIO110__FUNC_B0_DBG_MON_B12 (MTK_PIN_NO(110) | 7)
795*9f1bdd7eSHui.Liu 
796*9f1bdd7eSHui.Liu #define PINMUX_GPIO111__FUNC_B_GPIO111 (MTK_PIN_NO(111) | 0)
797*9f1bdd7eSHui.Liu #define PINMUX_GPIO111__FUNC_I0_I2SIN_D1 (MTK_PIN_NO(111) | 1)
798*9f1bdd7eSHui.Liu #define PINMUX_GPIO111__FUNC_I0_SPLIN_D1 (MTK_PIN_NO(111) | 2)
799*9f1bdd7eSHui.Liu #define PINMUX_GPIO111__FUNC_O_DMIC3_CLK (MTK_PIN_NO(111) | 3)
800*9f1bdd7eSHui.Liu #define PINMUX_GPIO111__FUNC_O_SPDIF_OUT (MTK_PIN_NO(111) | 4)
801*9f1bdd7eSHui.Liu #define PINMUX_GPIO111__FUNC_O_PGD_LV_LSC_PWR4 (MTK_PIN_NO(111) | 6)
802*9f1bdd7eSHui.Liu #define PINMUX_GPIO111__FUNC_B0_DBG_MON_B13 (MTK_PIN_NO(111) | 7)
803*9f1bdd7eSHui.Liu 
804*9f1bdd7eSHui.Liu #define PINMUX_GPIO112__FUNC_B_GPIO112 (MTK_PIN_NO(112) | 0)
805*9f1bdd7eSHui.Liu #define PINMUX_GPIO112__FUNC_I0_I2SIN_D2 (MTK_PIN_NO(112) | 1)
806*9f1bdd7eSHui.Liu #define PINMUX_GPIO112__FUNC_I0_SPLIN_D2 (MTK_PIN_NO(112) | 2)
807*9f1bdd7eSHui.Liu #define PINMUX_GPIO112__FUNC_I0_DMIC3_DAT (MTK_PIN_NO(112) | 3)
808*9f1bdd7eSHui.Liu #define PINMUX_GPIO112__FUNC_B0_TDMIN_MCK (MTK_PIN_NO(112) | 4)
809*9f1bdd7eSHui.Liu #define PINMUX_GPIO112__FUNC_O_I2SO1_WS (MTK_PIN_NO(112) | 5)
810*9f1bdd7eSHui.Liu #define PINMUX_GPIO112__FUNC_O_PGD_LV_LSC_PWR5 (MTK_PIN_NO(112) | 6)
811*9f1bdd7eSHui.Liu #define PINMUX_GPIO112__FUNC_B0_DBG_MON_B14 (MTK_PIN_NO(112) | 7)
812*9f1bdd7eSHui.Liu 
813*9f1bdd7eSHui.Liu #define PINMUX_GPIO113__FUNC_B_GPIO113 (MTK_PIN_NO(113) | 0)
814*9f1bdd7eSHui.Liu #define PINMUX_GPIO113__FUNC_I0_I2SIN_D3 (MTK_PIN_NO(113) | 1)
815*9f1bdd7eSHui.Liu #define PINMUX_GPIO113__FUNC_I0_SPLIN_D3 (MTK_PIN_NO(113) | 2)
816*9f1bdd7eSHui.Liu #define PINMUX_GPIO113__FUNC_I0_DMIC3_DAT_R (MTK_PIN_NO(113) | 3)
817*9f1bdd7eSHui.Liu #define PINMUX_GPIO113__FUNC_B0_TDMIN_BCK (MTK_PIN_NO(113) | 4)
818*9f1bdd7eSHui.Liu #define PINMUX_GPIO113__FUNC_O_I2SO1_D0 (MTK_PIN_NO(113) | 5)
819*9f1bdd7eSHui.Liu #define PINMUX_GPIO113__FUNC_B0_DBG_MON_B15 (MTK_PIN_NO(113) | 7)
820*9f1bdd7eSHui.Liu 
821*9f1bdd7eSHui.Liu #define PINMUX_GPIO114__FUNC_B_GPIO114 (MTK_PIN_NO(114) | 0)
822*9f1bdd7eSHui.Liu #define PINMUX_GPIO114__FUNC_O_I2SO2_MCK (MTK_PIN_NO(114) | 1)
823*9f1bdd7eSHui.Liu #define PINMUX_GPIO114__FUNC_B0_I2SIN_MCK (MTK_PIN_NO(114) | 2)
824*9f1bdd7eSHui.Liu #define PINMUX_GPIO114__FUNC_I1_MCUPM_JTAG_TMS (MTK_PIN_NO(114) | 3)
825*9f1bdd7eSHui.Liu #define PINMUX_GPIO114__FUNC_B1_APU_JTAG_TMS (MTK_PIN_NO(114) | 4)
826*9f1bdd7eSHui.Liu #define PINMUX_GPIO114__FUNC_I1_SCP_JTAG1_TMS (MTK_PIN_NO(114) | 5)
827*9f1bdd7eSHui.Liu #define PINMUX_GPIO114__FUNC_I1_SPM_JTAG_TMS (MTK_PIN_NO(114) | 6)
828*9f1bdd7eSHui.Liu #define PINMUX_GPIO114__FUNC_B0_DBG_MON_B16 (MTK_PIN_NO(114) | 7)
829*9f1bdd7eSHui.Liu 
830*9f1bdd7eSHui.Liu #define PINMUX_GPIO115__FUNC_B_GPIO115 (MTK_PIN_NO(115) | 0)
831*9f1bdd7eSHui.Liu #define PINMUX_GPIO115__FUNC_B0_I2SO2_BCK (MTK_PIN_NO(115) | 1)
832*9f1bdd7eSHui.Liu #define PINMUX_GPIO115__FUNC_B0_I2SIN_BCK (MTK_PIN_NO(115) | 2)
833*9f1bdd7eSHui.Liu #define PINMUX_GPIO115__FUNC_I1_MCUPM_JTAG_TCK (MTK_PIN_NO(115) | 3)
834*9f1bdd7eSHui.Liu #define PINMUX_GPIO115__FUNC_I0_APU_JTAG_TCK (MTK_PIN_NO(115) | 4)
835*9f1bdd7eSHui.Liu #define PINMUX_GPIO115__FUNC_I1_SCP_JTAG1_TCK (MTK_PIN_NO(115) | 5)
836*9f1bdd7eSHui.Liu #define PINMUX_GPIO115__FUNC_I1_SPM_JTAG_TCK (MTK_PIN_NO(115) | 6)
837*9f1bdd7eSHui.Liu #define PINMUX_GPIO115__FUNC_B0_DBG_MON_B17 (MTK_PIN_NO(115) | 7)
838*9f1bdd7eSHui.Liu 
839*9f1bdd7eSHui.Liu #define PINMUX_GPIO116__FUNC_B_GPIO116 (MTK_PIN_NO(116) | 0)
840*9f1bdd7eSHui.Liu #define PINMUX_GPIO116__FUNC_B0_I2SO2_WS (MTK_PIN_NO(116) | 1)
841*9f1bdd7eSHui.Liu #define PINMUX_GPIO116__FUNC_B0_I2SIN_WS (MTK_PIN_NO(116) | 2)
842*9f1bdd7eSHui.Liu #define PINMUX_GPIO116__FUNC_I1_MCUPM_JTAG_TDI (MTK_PIN_NO(116) | 3)
843*9f1bdd7eSHui.Liu #define PINMUX_GPIO116__FUNC_I1_APU_JTAG_TDI (MTK_PIN_NO(116) | 4)
844*9f1bdd7eSHui.Liu #define PINMUX_GPIO116__FUNC_I1_SCP_JTAG1_TDI (MTK_PIN_NO(116) | 5)
845*9f1bdd7eSHui.Liu #define PINMUX_GPIO116__FUNC_I1_SPM_JTAG_TDI (MTK_PIN_NO(116) | 6)
846*9f1bdd7eSHui.Liu #define PINMUX_GPIO116__FUNC_B0_DBG_MON_B18 (MTK_PIN_NO(116) | 7)
847*9f1bdd7eSHui.Liu 
848*9f1bdd7eSHui.Liu #define PINMUX_GPIO117__FUNC_B_GPIO117 (MTK_PIN_NO(117) | 0)
849*9f1bdd7eSHui.Liu #define PINMUX_GPIO117__FUNC_O_I2SO2_D0 (MTK_PIN_NO(117) | 1)
850*9f1bdd7eSHui.Liu #define PINMUX_GPIO117__FUNC_I0_I2SIN_D0 (MTK_PIN_NO(117) | 2)
851*9f1bdd7eSHui.Liu #define PINMUX_GPIO117__FUNC_O_MCUPM_JTAG_TDO (MTK_PIN_NO(117) | 3)
852*9f1bdd7eSHui.Liu #define PINMUX_GPIO117__FUNC_O_APU_JTAG_TDO (MTK_PIN_NO(117) | 4)
853*9f1bdd7eSHui.Liu #define PINMUX_GPIO117__FUNC_O_SCP_JTAG1_TDO (MTK_PIN_NO(117) | 5)
854*9f1bdd7eSHui.Liu #define PINMUX_GPIO117__FUNC_O_SPM_JTAG_TDO (MTK_PIN_NO(117) | 6)
855*9f1bdd7eSHui.Liu #define PINMUX_GPIO117__FUNC_B0_DBG_MON_B19 (MTK_PIN_NO(117) | 7)
856*9f1bdd7eSHui.Liu 
857*9f1bdd7eSHui.Liu #define PINMUX_GPIO118__FUNC_B_GPIO118 (MTK_PIN_NO(118) | 0)
858*9f1bdd7eSHui.Liu #define PINMUX_GPIO118__FUNC_O_I2SO2_D1 (MTK_PIN_NO(118) | 1)
859*9f1bdd7eSHui.Liu #define PINMUX_GPIO118__FUNC_I0_I2SIN_D1 (MTK_PIN_NO(118) | 2)
860*9f1bdd7eSHui.Liu #define PINMUX_GPIO118__FUNC_I0_MCUPM_JTAG_TRSTN (MTK_PIN_NO(118) | 3)
861*9f1bdd7eSHui.Liu #define PINMUX_GPIO118__FUNC_I0_APU_JTAG_TRST (MTK_PIN_NO(118) | 4)
862*9f1bdd7eSHui.Liu #define PINMUX_GPIO118__FUNC_I0_SCP_JTAG1_TRSTN (MTK_PIN_NO(118) | 5)
863*9f1bdd7eSHui.Liu #define PINMUX_GPIO118__FUNC_I0_SPM_JTAG_TRSTN (MTK_PIN_NO(118) | 6)
864*9f1bdd7eSHui.Liu #define PINMUX_GPIO118__FUNC_B0_DBG_MON_B20 (MTK_PIN_NO(118) | 7)
865*9f1bdd7eSHui.Liu 
866*9f1bdd7eSHui.Liu #define PINMUX_GPIO119__FUNC_B_GPIO119 (MTK_PIN_NO(119) | 0)
867*9f1bdd7eSHui.Liu #define PINMUX_GPIO119__FUNC_O_I2SO2_D2 (MTK_PIN_NO(119) | 1)
868*9f1bdd7eSHui.Liu #define PINMUX_GPIO119__FUNC_I0_I2SIN_D2 (MTK_PIN_NO(119) | 2)
869*9f1bdd7eSHui.Liu #define PINMUX_GPIO119__FUNC_O_UTXD3 (MTK_PIN_NO(119) | 3)
870*9f1bdd7eSHui.Liu #define PINMUX_GPIO119__FUNC_B0_TDMIN_LRCK (MTK_PIN_NO(119) | 4)
871*9f1bdd7eSHui.Liu #define PINMUX_GPIO119__FUNC_O_I2SO1_MCK (MTK_PIN_NO(119) | 5)
872*9f1bdd7eSHui.Liu #define PINMUX_GPIO119__FUNC_O_SSPM_UTXD_AO (MTK_PIN_NO(119) | 6)
873*9f1bdd7eSHui.Liu #define PINMUX_GPIO119__FUNC_B0_DBG_MON_B21 (MTK_PIN_NO(119) | 7)
874*9f1bdd7eSHui.Liu 
875*9f1bdd7eSHui.Liu #define PINMUX_GPIO120__FUNC_B_GPIO120 (MTK_PIN_NO(120) | 0)
876*9f1bdd7eSHui.Liu #define PINMUX_GPIO120__FUNC_O_I2SO2_D3 (MTK_PIN_NO(120) | 1)
877*9f1bdd7eSHui.Liu #define PINMUX_GPIO120__FUNC_I0_I2SIN_D3 (MTK_PIN_NO(120) | 2)
878*9f1bdd7eSHui.Liu #define PINMUX_GPIO120__FUNC_I1_URXD3 (MTK_PIN_NO(120) | 3)
879*9f1bdd7eSHui.Liu #define PINMUX_GPIO120__FUNC_I0_TDMIN_DI (MTK_PIN_NO(120) | 4)
880*9f1bdd7eSHui.Liu #define PINMUX_GPIO120__FUNC_O_I2SO1_BCK (MTK_PIN_NO(120) | 5)
881*9f1bdd7eSHui.Liu #define PINMUX_GPIO120__FUNC_I1_SSPM_URXD_AO (MTK_PIN_NO(120) | 6)
882*9f1bdd7eSHui.Liu #define PINMUX_GPIO120__FUNC_B0_DBG_MON_B22 (MTK_PIN_NO(120) | 7)
883*9f1bdd7eSHui.Liu 
884*9f1bdd7eSHui.Liu #define PINMUX_GPIO121__FUNC_B_GPIO121 (MTK_PIN_NO(121) | 0)
885*9f1bdd7eSHui.Liu #define PINMUX_GPIO121__FUNC_B0_PCM_CLK (MTK_PIN_NO(121) | 1)
886*9f1bdd7eSHui.Liu #define PINMUX_GPIO121__FUNC_O_SPIM4_CSB (MTK_PIN_NO(121) | 2)
887*9f1bdd7eSHui.Liu #define PINMUX_GPIO121__FUNC_O_SCP_SPI1_B_CS (MTK_PIN_NO(121) | 3)
888*9f1bdd7eSHui.Liu #define PINMUX_GPIO121__FUNC_O_TP_UTXD2_AO (MTK_PIN_NO(121) | 4)
889*9f1bdd7eSHui.Liu #define PINMUX_GPIO121__FUNC_O_AUXIF_ST0 (MTK_PIN_NO(121) | 5)
890*9f1bdd7eSHui.Liu #define PINMUX_GPIO121__FUNC_O_PGD_DA_EFUSE_RDY (MTK_PIN_NO(121) | 6)
891*9f1bdd7eSHui.Liu #define PINMUX_GPIO121__FUNC_B0_DBG_MON_B23 (MTK_PIN_NO(121) | 7)
892*9f1bdd7eSHui.Liu 
893*9f1bdd7eSHui.Liu #define PINMUX_GPIO122__FUNC_B_GPIO122 (MTK_PIN_NO(122) | 0)
894*9f1bdd7eSHui.Liu #define PINMUX_GPIO122__FUNC_B0_PCM_SYNC (MTK_PIN_NO(122) | 1)
895*9f1bdd7eSHui.Liu #define PINMUX_GPIO122__FUNC_O_SPIM4_CLK (MTK_PIN_NO(122) | 2)
896*9f1bdd7eSHui.Liu #define PINMUX_GPIO122__FUNC_O_SCP_SPI1_B_CK (MTK_PIN_NO(122) | 3)
897*9f1bdd7eSHui.Liu #define PINMUX_GPIO122__FUNC_I1_TP_URXD2_AO (MTK_PIN_NO(122) | 4)
898*9f1bdd7eSHui.Liu #define PINMUX_GPIO122__FUNC_O_AUXIF_CLK0 (MTK_PIN_NO(122) | 5)
899*9f1bdd7eSHui.Liu #define PINMUX_GPIO122__FUNC_O_PGD_DA_EFUSE_RDY_PRE (MTK_PIN_NO(122) | 6)
900*9f1bdd7eSHui.Liu #define PINMUX_GPIO122__FUNC_B0_DBG_MON_B24 (MTK_PIN_NO(122) | 7)
901*9f1bdd7eSHui.Liu 
902*9f1bdd7eSHui.Liu #define PINMUX_GPIO123__FUNC_B_GPIO123 (MTK_PIN_NO(123) | 0)
903*9f1bdd7eSHui.Liu #define PINMUX_GPIO123__FUNC_O_PCM_DO (MTK_PIN_NO(123) | 1)
904*9f1bdd7eSHui.Liu #define PINMUX_GPIO123__FUNC_B0_SPIM4_MOSI (MTK_PIN_NO(123) | 2)
905*9f1bdd7eSHui.Liu #define PINMUX_GPIO123__FUNC_O_SCP_SPI1_B_MO (MTK_PIN_NO(123) | 3)
906*9f1bdd7eSHui.Liu #define PINMUX_GPIO123__FUNC_O_TP_URTS2_AO (MTK_PIN_NO(123) | 4)
907*9f1bdd7eSHui.Liu #define PINMUX_GPIO123__FUNC_O_AUXIF_ST1 (MTK_PIN_NO(123) | 5)
908*9f1bdd7eSHui.Liu #define PINMUX_GPIO123__FUNC_O_PGD_DA_PWRGD_RESET (MTK_PIN_NO(123) | 6)
909*9f1bdd7eSHui.Liu #define PINMUX_GPIO123__FUNC_B0_DBG_MON_B25 (MTK_PIN_NO(123) | 7)
910*9f1bdd7eSHui.Liu 
911*9f1bdd7eSHui.Liu #define PINMUX_GPIO124__FUNC_B_GPIO124 (MTK_PIN_NO(124) | 0)
912*9f1bdd7eSHui.Liu #define PINMUX_GPIO124__FUNC_I0_PCM_DI (MTK_PIN_NO(124) | 1)
913*9f1bdd7eSHui.Liu #define PINMUX_GPIO124__FUNC_B0_SPIM4_MISO (MTK_PIN_NO(124) | 2)
914*9f1bdd7eSHui.Liu #define PINMUX_GPIO124__FUNC_I0_SCP_SPI1_B_MI (MTK_PIN_NO(124) | 3)
915*9f1bdd7eSHui.Liu #define PINMUX_GPIO124__FUNC_I1_TP_UCTS2_AO (MTK_PIN_NO(124) | 4)
916*9f1bdd7eSHui.Liu #define PINMUX_GPIO124__FUNC_O_AUXIF_CLK1 (MTK_PIN_NO(124) | 5)
917*9f1bdd7eSHui.Liu #define PINMUX_GPIO124__FUNC_O_PGD_DA_PWRGD_ENB (MTK_PIN_NO(124) | 6)
918*9f1bdd7eSHui.Liu #define PINMUX_GPIO124__FUNC_B0_DBG_MON_B26 (MTK_PIN_NO(124) | 7)
919*9f1bdd7eSHui.Liu 
920*9f1bdd7eSHui.Liu #define PINMUX_GPIO125__FUNC_B_GPIO125 (MTK_PIN_NO(125) | 0)
921*9f1bdd7eSHui.Liu #define PINMUX_GPIO125__FUNC_O_DMIC1_CLK (MTK_PIN_NO(125) | 1)
922*9f1bdd7eSHui.Liu #define PINMUX_GPIO125__FUNC_O_SPINOR_CK (MTK_PIN_NO(125) | 2)
923*9f1bdd7eSHui.Liu #define PINMUX_GPIO125__FUNC_B0_TDMIN_MCK (MTK_PIN_NO(125) | 3)
924*9f1bdd7eSHui.Liu #define PINMUX_GPIO125__FUNC_O_LVTS_FOUT (MTK_PIN_NO(125) | 6)
925*9f1bdd7eSHui.Liu #define PINMUX_GPIO125__FUNC_B0_DBG_MON_B27 (MTK_PIN_NO(125) | 7)
926*9f1bdd7eSHui.Liu 
927*9f1bdd7eSHui.Liu #define PINMUX_GPIO126__FUNC_B_GPIO126 (MTK_PIN_NO(126) | 0)
928*9f1bdd7eSHui.Liu #define PINMUX_GPIO126__FUNC_I0_DMIC1_DAT (MTK_PIN_NO(126) | 1)
929*9f1bdd7eSHui.Liu #define PINMUX_GPIO126__FUNC_O_SPINOR_CS (MTK_PIN_NO(126) | 2)
930*9f1bdd7eSHui.Liu #define PINMUX_GPIO126__FUNC_B0_TDMIN_BCK (MTK_PIN_NO(126) | 3)
931*9f1bdd7eSHui.Liu #define PINMUX_GPIO126__FUNC_O_LVTS_SDO (MTK_PIN_NO(126) | 6)
932*9f1bdd7eSHui.Liu #define PINMUX_GPIO126__FUNC_B0_DBG_MON_B28 (MTK_PIN_NO(126) | 7)
933*9f1bdd7eSHui.Liu 
934*9f1bdd7eSHui.Liu #define PINMUX_GPIO127__FUNC_B_GPIO127 (MTK_PIN_NO(127) | 0)
935*9f1bdd7eSHui.Liu #define PINMUX_GPIO127__FUNC_I0_DMIC1_DAT_R (MTK_PIN_NO(127) | 1)
936*9f1bdd7eSHui.Liu #define PINMUX_GPIO127__FUNC_B0_SPINOR_IO0 (MTK_PIN_NO(127) | 2)
937*9f1bdd7eSHui.Liu #define PINMUX_GPIO127__FUNC_B0_TDMIN_LRCK (MTK_PIN_NO(127) | 3)
938*9f1bdd7eSHui.Liu #define PINMUX_GPIO127__FUNC_I0_LVTS_26M (MTK_PIN_NO(127) | 6)
939*9f1bdd7eSHui.Liu #define PINMUX_GPIO127__FUNC_B0_DBG_MON_B29 (MTK_PIN_NO(127) | 7)
940*9f1bdd7eSHui.Liu 
941*9f1bdd7eSHui.Liu #define PINMUX_GPIO128__FUNC_B_GPIO128 (MTK_PIN_NO(128) | 0)
942*9f1bdd7eSHui.Liu #define PINMUX_GPIO128__FUNC_O_DMIC2_CLK (MTK_PIN_NO(128) | 1)
943*9f1bdd7eSHui.Liu #define PINMUX_GPIO128__FUNC_B0_SPINOR_IO1 (MTK_PIN_NO(128) | 2)
944*9f1bdd7eSHui.Liu #define PINMUX_GPIO128__FUNC_I0_TDMIN_DI (MTK_PIN_NO(128) | 3)
945*9f1bdd7eSHui.Liu #define PINMUX_GPIO128__FUNC_I0_LVTS_SCF (MTK_PIN_NO(128) | 6)
946*9f1bdd7eSHui.Liu #define PINMUX_GPIO128__FUNC_B0_DBG_MON_B30 (MTK_PIN_NO(128) | 7)
947*9f1bdd7eSHui.Liu 
948*9f1bdd7eSHui.Liu #define PINMUX_GPIO129__FUNC_B_GPIO129 (MTK_PIN_NO(129) | 0)
949*9f1bdd7eSHui.Liu #define PINMUX_GPIO129__FUNC_I0_DMIC2_DAT (MTK_PIN_NO(129) | 1)
950*9f1bdd7eSHui.Liu #define PINMUX_GPIO129__FUNC_B0_SPINOR_IO2 (MTK_PIN_NO(129) | 2)
951*9f1bdd7eSHui.Liu #define PINMUX_GPIO129__FUNC_I0_SPDIF_IN1 (MTK_PIN_NO(129) | 3)
952*9f1bdd7eSHui.Liu #define PINMUX_GPIO129__FUNC_I0_LVTS_SCK (MTK_PIN_NO(129) | 6)
953*9f1bdd7eSHui.Liu #define PINMUX_GPIO129__FUNC_B0_DBG_MON_B31 (MTK_PIN_NO(129) | 7)
954*9f1bdd7eSHui.Liu 
955*9f1bdd7eSHui.Liu #define PINMUX_GPIO130__FUNC_B_GPIO130 (MTK_PIN_NO(130) | 0)
956*9f1bdd7eSHui.Liu #define PINMUX_GPIO130__FUNC_I0_DMIC2_DAT_R (MTK_PIN_NO(130) | 1)
957*9f1bdd7eSHui.Liu #define PINMUX_GPIO130__FUNC_B0_SPINOR_IO3 (MTK_PIN_NO(130) | 2)
958*9f1bdd7eSHui.Liu #define PINMUX_GPIO130__FUNC_I0_SPDIF_IN2 (MTK_PIN_NO(130) | 3)
959*9f1bdd7eSHui.Liu #define PINMUX_GPIO130__FUNC_I0_LVTS_SDI (MTK_PIN_NO(130) | 6)
960*9f1bdd7eSHui.Liu #define PINMUX_GPIO130__FUNC_B0_DBG_MON_B32 (MTK_PIN_NO(130) | 7)
961*9f1bdd7eSHui.Liu 
962*9f1bdd7eSHui.Liu #define PINMUX_GPIO131__FUNC_B_GPIO131 (MTK_PIN_NO(131) | 0)
963*9f1bdd7eSHui.Liu #define PINMUX_GPIO131__FUNC_O_DPI_D0 (MTK_PIN_NO(131) | 1)
964*9f1bdd7eSHui.Liu #define PINMUX_GPIO131__FUNC_O_GBE_TXD3 (MTK_PIN_NO(131) | 2)
965*9f1bdd7eSHui.Liu #define PINMUX_GPIO131__FUNC_O_DMIC1_CLK (MTK_PIN_NO(131) | 3)
966*9f1bdd7eSHui.Liu #define PINMUX_GPIO131__FUNC_O_I2SO2_MCK (MTK_PIN_NO(131) | 4)
967*9f1bdd7eSHui.Liu #define PINMUX_GPIO131__FUNC_B0_TP_GPIO0_AO (MTK_PIN_NO(131) | 5)
968*9f1bdd7eSHui.Liu #define PINMUX_GPIO131__FUNC_O_SPIM5_CSB (MTK_PIN_NO(131) | 6)
969*9f1bdd7eSHui.Liu #define PINMUX_GPIO131__FUNC_O_PGD_LV_HSC_PWR0 (MTK_PIN_NO(131) | 7)
970*9f1bdd7eSHui.Liu 
971*9f1bdd7eSHui.Liu #define PINMUX_GPIO132__FUNC_B_GPIO132 (MTK_PIN_NO(132) | 0)
972*9f1bdd7eSHui.Liu #define PINMUX_GPIO132__FUNC_O_DPI_D1 (MTK_PIN_NO(132) | 1)
973*9f1bdd7eSHui.Liu #define PINMUX_GPIO132__FUNC_O_GBE_TXD2 (MTK_PIN_NO(132) | 2)
974*9f1bdd7eSHui.Liu #define PINMUX_GPIO132__FUNC_I0_DMIC1_DAT (MTK_PIN_NO(132) | 3)
975*9f1bdd7eSHui.Liu #define PINMUX_GPIO132__FUNC_B0_I2SO2_BCK (MTK_PIN_NO(132) | 4)
976*9f1bdd7eSHui.Liu #define PINMUX_GPIO132__FUNC_B0_TP_GPIO1_AO (MTK_PIN_NO(132) | 5)
977*9f1bdd7eSHui.Liu #define PINMUX_GPIO132__FUNC_O_SPIM5_CLK (MTK_PIN_NO(132) | 6)
978*9f1bdd7eSHui.Liu #define PINMUX_GPIO132__FUNC_O_PGD_LV_HSC_PWR1 (MTK_PIN_NO(132) | 7)
979*9f1bdd7eSHui.Liu 
980*9f1bdd7eSHui.Liu #define PINMUX_GPIO133__FUNC_B_GPIO133 (MTK_PIN_NO(133) | 0)
981*9f1bdd7eSHui.Liu #define PINMUX_GPIO133__FUNC_O_DPI_D2 (MTK_PIN_NO(133) | 1)
982*9f1bdd7eSHui.Liu #define PINMUX_GPIO133__FUNC_O_GBE_TXD1 (MTK_PIN_NO(133) | 2)
983*9f1bdd7eSHui.Liu #define PINMUX_GPIO133__FUNC_I0_DMIC1_DAT_R (MTK_PIN_NO(133) | 3)
984*9f1bdd7eSHui.Liu #define PINMUX_GPIO133__FUNC_B0_I2SO2_WS (MTK_PIN_NO(133) | 4)
985*9f1bdd7eSHui.Liu #define PINMUX_GPIO133__FUNC_B0_TP_GPIO2_AO (MTK_PIN_NO(133) | 5)
986*9f1bdd7eSHui.Liu #define PINMUX_GPIO133__FUNC_B0_SPIM5_MOSI (MTK_PIN_NO(133) | 6)
987*9f1bdd7eSHui.Liu #define PINMUX_GPIO133__FUNC_O_PGD_LV_HSC_PWR2 (MTK_PIN_NO(133) | 7)
988*9f1bdd7eSHui.Liu 
989*9f1bdd7eSHui.Liu #define PINMUX_GPIO134__FUNC_B_GPIO134 (MTK_PIN_NO(134) | 0)
990*9f1bdd7eSHui.Liu #define PINMUX_GPIO134__FUNC_O_DPI_D3 (MTK_PIN_NO(134) | 1)
991*9f1bdd7eSHui.Liu #define PINMUX_GPIO134__FUNC_O_GBE_TXD0 (MTK_PIN_NO(134) | 2)
992*9f1bdd7eSHui.Liu #define PINMUX_GPIO134__FUNC_O_DMIC2_CLK (MTK_PIN_NO(134) | 3)
993*9f1bdd7eSHui.Liu #define PINMUX_GPIO134__FUNC_O_I2SO2_D0 (MTK_PIN_NO(134) | 4)
994*9f1bdd7eSHui.Liu #define PINMUX_GPIO134__FUNC_B0_TP_GPIO3_AO (MTK_PIN_NO(134) | 5)
995*9f1bdd7eSHui.Liu #define PINMUX_GPIO134__FUNC_B0_SPIM5_MISO (MTK_PIN_NO(134) | 6)
996*9f1bdd7eSHui.Liu #define PINMUX_GPIO134__FUNC_O_PGD_LV_HSC_PWR3 (MTK_PIN_NO(134) | 7)
997*9f1bdd7eSHui.Liu 
998*9f1bdd7eSHui.Liu #define PINMUX_GPIO135__FUNC_B_GPIO135 (MTK_PIN_NO(135) | 0)
999*9f1bdd7eSHui.Liu #define PINMUX_GPIO135__FUNC_O_DPI_D4 (MTK_PIN_NO(135) | 1)
1000*9f1bdd7eSHui.Liu #define PINMUX_GPIO135__FUNC_I0_GBE_RXD3 (MTK_PIN_NO(135) | 2)
1001*9f1bdd7eSHui.Liu #define PINMUX_GPIO135__FUNC_I0_DMIC2_DAT (MTK_PIN_NO(135) | 3)
1002*9f1bdd7eSHui.Liu #define PINMUX_GPIO135__FUNC_O_I2SO2_D1 (MTK_PIN_NO(135) | 4)
1003*9f1bdd7eSHui.Liu #define PINMUX_GPIO135__FUNC_B0_TP_GPIO4_AO (MTK_PIN_NO(135) | 5)
1004*9f1bdd7eSHui.Liu #define PINMUX_GPIO135__FUNC_I1_WAKEN (MTK_PIN_NO(135) | 6)
1005*9f1bdd7eSHui.Liu #define PINMUX_GPIO135__FUNC_O_PGD_LV_HSC_PWR4 (MTK_PIN_NO(135) | 7)
1006*9f1bdd7eSHui.Liu 
1007*9f1bdd7eSHui.Liu #define PINMUX_GPIO136__FUNC_B_GPIO136 (MTK_PIN_NO(136) | 0)
1008*9f1bdd7eSHui.Liu #define PINMUX_GPIO136__FUNC_O_DPI_D5 (MTK_PIN_NO(136) | 1)
1009*9f1bdd7eSHui.Liu #define PINMUX_GPIO136__FUNC_I0_GBE_RXD2 (MTK_PIN_NO(136) | 2)
1010*9f1bdd7eSHui.Liu #define PINMUX_GPIO136__FUNC_I0_DMIC2_DAT_R (MTK_PIN_NO(136) | 3)
1011*9f1bdd7eSHui.Liu #define PINMUX_GPIO136__FUNC_O_I2SO2_D2 (MTK_PIN_NO(136) | 4)
1012*9f1bdd7eSHui.Liu #define PINMUX_GPIO136__FUNC_B0_TP_GPIO5_AO (MTK_PIN_NO(136) | 5)
1013*9f1bdd7eSHui.Liu #define PINMUX_GPIO136__FUNC_O_PERSTN (MTK_PIN_NO(136) | 6)
1014*9f1bdd7eSHui.Liu #define PINMUX_GPIO136__FUNC_O_PGD_LV_HSC_PWR5 (MTK_PIN_NO(136) | 7)
1015*9f1bdd7eSHui.Liu 
1016*9f1bdd7eSHui.Liu #define PINMUX_GPIO137__FUNC_B_GPIO137 (MTK_PIN_NO(137) | 0)
1017*9f1bdd7eSHui.Liu #define PINMUX_GPIO137__FUNC_O_DPI_D6 (MTK_PIN_NO(137) | 1)
1018*9f1bdd7eSHui.Liu #define PINMUX_GPIO137__FUNC_I0_GBE_RXD1 (MTK_PIN_NO(137) | 2)
1019*9f1bdd7eSHui.Liu #define PINMUX_GPIO137__FUNC_O_DMIC3_CLK (MTK_PIN_NO(137) | 3)
1020*9f1bdd7eSHui.Liu #define PINMUX_GPIO137__FUNC_O_I2SO2_D3 (MTK_PIN_NO(137) | 4)
1021*9f1bdd7eSHui.Liu #define PINMUX_GPIO137__FUNC_B0_TP_GPIO6_AO (MTK_PIN_NO(137) | 5)
1022*9f1bdd7eSHui.Liu #define PINMUX_GPIO137__FUNC_B1_CLKREQN (MTK_PIN_NO(137) | 6)
1023*9f1bdd7eSHui.Liu #define PINMUX_GPIO137__FUNC_O_PWM_0 (MTK_PIN_NO(137) | 7)
1024*9f1bdd7eSHui.Liu 
1025*9f1bdd7eSHui.Liu #define PINMUX_GPIO138__FUNC_B_GPIO138 (MTK_PIN_NO(138) | 0)
1026*9f1bdd7eSHui.Liu #define PINMUX_GPIO138__FUNC_O_DPI_D7 (MTK_PIN_NO(138) | 1)
1027*9f1bdd7eSHui.Liu #define PINMUX_GPIO138__FUNC_I0_GBE_RXD0 (MTK_PIN_NO(138) | 2)
1028*9f1bdd7eSHui.Liu #define PINMUX_GPIO138__FUNC_I0_DMIC3_DAT (MTK_PIN_NO(138) | 3)
1029*9f1bdd7eSHui.Liu #define PINMUX_GPIO138__FUNC_O_CLKM2 (MTK_PIN_NO(138) | 4)
1030*9f1bdd7eSHui.Liu #define PINMUX_GPIO138__FUNC_B0_TP_GPIO7_AO (MTK_PIN_NO(138) | 5)
1031*9f1bdd7eSHui.Liu #define PINMUX_GPIO138__FUNC_B0_MD32_0_GPIO0 (MTK_PIN_NO(138) | 7)
1032*9f1bdd7eSHui.Liu 
1033*9f1bdd7eSHui.Liu #define PINMUX_GPIO139__FUNC_B_GPIO139 (MTK_PIN_NO(139) | 0)
1034*9f1bdd7eSHui.Liu #define PINMUX_GPIO139__FUNC_O_DPI_D8 (MTK_PIN_NO(139) | 1)
1035*9f1bdd7eSHui.Liu #define PINMUX_GPIO139__FUNC_B0_GBE_TXC (MTK_PIN_NO(139) | 2)
1036*9f1bdd7eSHui.Liu #define PINMUX_GPIO139__FUNC_I0_DMIC3_DAT_R (MTK_PIN_NO(139) | 3)
1037*9f1bdd7eSHui.Liu #define PINMUX_GPIO139__FUNC_O_CLKM3 (MTK_PIN_NO(139) | 4)
1038*9f1bdd7eSHui.Liu #define PINMUX_GPIO139__FUNC_O_TP_UTXD2_AO (MTK_PIN_NO(139) | 5)
1039*9f1bdd7eSHui.Liu #define PINMUX_GPIO139__FUNC_O_UTXD2 (MTK_PIN_NO(139) | 6)
1040*9f1bdd7eSHui.Liu #define PINMUX_GPIO139__FUNC_B0_MD32_0_GPIO1 (MTK_PIN_NO(139) | 7)
1041*9f1bdd7eSHui.Liu 
1042*9f1bdd7eSHui.Liu #define PINMUX_GPIO140__FUNC_B_GPIO140 (MTK_PIN_NO(140) | 0)
1043*9f1bdd7eSHui.Liu #define PINMUX_GPIO140__FUNC_O_DPI_D9 (MTK_PIN_NO(140) | 1)
1044*9f1bdd7eSHui.Liu #define PINMUX_GPIO140__FUNC_I0_GBE_RXC (MTK_PIN_NO(140) | 2)
1045*9f1bdd7eSHui.Liu #define PINMUX_GPIO140__FUNC_O_DMIC4_CLK (MTK_PIN_NO(140) | 3)
1046*9f1bdd7eSHui.Liu #define PINMUX_GPIO140__FUNC_O_PWM_2 (MTK_PIN_NO(140) | 4)
1047*9f1bdd7eSHui.Liu #define PINMUX_GPIO140__FUNC_I1_TP_URXD2_AO (MTK_PIN_NO(140) | 5)
1048*9f1bdd7eSHui.Liu #define PINMUX_GPIO140__FUNC_I1_URXD2 (MTK_PIN_NO(140) | 6)
1049*9f1bdd7eSHui.Liu #define PINMUX_GPIO140__FUNC_B0_MD32_0_GPIO2 (MTK_PIN_NO(140) | 7)
1050*9f1bdd7eSHui.Liu 
1051*9f1bdd7eSHui.Liu #define PINMUX_GPIO141__FUNC_B_GPIO141 (MTK_PIN_NO(141) | 0)
1052*9f1bdd7eSHui.Liu #define PINMUX_GPIO141__FUNC_O_DPI_D10 (MTK_PIN_NO(141) | 1)
1053*9f1bdd7eSHui.Liu #define PINMUX_GPIO141__FUNC_I0_GBE_RXDV (MTK_PIN_NO(141) | 2)
1054*9f1bdd7eSHui.Liu #define PINMUX_GPIO141__FUNC_I0_DMIC4_DAT (MTK_PIN_NO(141) | 3)
1055*9f1bdd7eSHui.Liu #define PINMUX_GPIO141__FUNC_O_PWM_3 (MTK_PIN_NO(141) | 4)
1056*9f1bdd7eSHui.Liu #define PINMUX_GPIO141__FUNC_O_TP_URTS2_AO (MTK_PIN_NO(141) | 5)
1057*9f1bdd7eSHui.Liu #define PINMUX_GPIO141__FUNC_O_URTS2 (MTK_PIN_NO(141) | 6)
1058*9f1bdd7eSHui.Liu #define PINMUX_GPIO141__FUNC_B0_MD32_1_GPIO0 (MTK_PIN_NO(141) | 7)
1059*9f1bdd7eSHui.Liu 
1060*9f1bdd7eSHui.Liu #define PINMUX_GPIO142__FUNC_B_GPIO142 (MTK_PIN_NO(142) | 0)
1061*9f1bdd7eSHui.Liu #define PINMUX_GPIO142__FUNC_O_DPI_D11 (MTK_PIN_NO(142) | 1)
1062*9f1bdd7eSHui.Liu #define PINMUX_GPIO142__FUNC_O_GBE_TXEN (MTK_PIN_NO(142) | 2)
1063*9f1bdd7eSHui.Liu #define PINMUX_GPIO142__FUNC_I0_DMIC4_DAT_R (MTK_PIN_NO(142) | 3)
1064*9f1bdd7eSHui.Liu #define PINMUX_GPIO142__FUNC_O_PWM_1 (MTK_PIN_NO(142) | 4)
1065*9f1bdd7eSHui.Liu #define PINMUX_GPIO142__FUNC_I1_TP_UCTS2_AO (MTK_PIN_NO(142) | 5)
1066*9f1bdd7eSHui.Liu #define PINMUX_GPIO142__FUNC_I1_UCTS2 (MTK_PIN_NO(142) | 6)
1067*9f1bdd7eSHui.Liu #define PINMUX_GPIO142__FUNC_B0_MD32_1_GPIO1 (MTK_PIN_NO(142) | 7)
1068*9f1bdd7eSHui.Liu 
1069*9f1bdd7eSHui.Liu #define PINMUX_GPIO143__FUNC_B_GPIO143 (MTK_PIN_NO(143) | 0)
1070*9f1bdd7eSHui.Liu #define PINMUX_GPIO143__FUNC_O_DPI_D12 (MTK_PIN_NO(143) | 1)
1071*9f1bdd7eSHui.Liu #define PINMUX_GPIO143__FUNC_O_GBE_MDC (MTK_PIN_NO(143) | 2)
1072*9f1bdd7eSHui.Liu #define PINMUX_GPIO143__FUNC_B0_MD32_0_GPIO0 (MTK_PIN_NO(143) | 3)
1073*9f1bdd7eSHui.Liu #define PINMUX_GPIO143__FUNC_O_CLKM0 (MTK_PIN_NO(143) | 4)
1074*9f1bdd7eSHui.Liu #define PINMUX_GPIO143__FUNC_O_SPIM3_CSB (MTK_PIN_NO(143) | 5)
1075*9f1bdd7eSHui.Liu #define PINMUX_GPIO143__FUNC_O_UTXD1 (MTK_PIN_NO(143) | 6)
1076*9f1bdd7eSHui.Liu #define PINMUX_GPIO143__FUNC_B0_MD32_1_GPIO2 (MTK_PIN_NO(143) | 7)
1077*9f1bdd7eSHui.Liu 
1078*9f1bdd7eSHui.Liu #define PINMUX_GPIO144__FUNC_B_GPIO144 (MTK_PIN_NO(144) | 0)
1079*9f1bdd7eSHui.Liu #define PINMUX_GPIO144__FUNC_O_DPI_D13 (MTK_PIN_NO(144) | 1)
1080*9f1bdd7eSHui.Liu #define PINMUX_GPIO144__FUNC_B1_GBE_MDIO (MTK_PIN_NO(144) | 2)
1081*9f1bdd7eSHui.Liu #define PINMUX_GPIO144__FUNC_B0_MD32_0_GPIO1 (MTK_PIN_NO(144) | 3)
1082*9f1bdd7eSHui.Liu #define PINMUX_GPIO144__FUNC_O_CLKM1 (MTK_PIN_NO(144) | 4)
1083*9f1bdd7eSHui.Liu #define PINMUX_GPIO144__FUNC_O_SPIM3_CLK (MTK_PIN_NO(144) | 5)
1084*9f1bdd7eSHui.Liu #define PINMUX_GPIO144__FUNC_I1_URXD1 (MTK_PIN_NO(144) | 6)
1085*9f1bdd7eSHui.Liu #define PINMUX_GPIO144__FUNC_O_PGD_HV_HSC_PWR0 (MTK_PIN_NO(144) | 7)
1086*9f1bdd7eSHui.Liu 
1087*9f1bdd7eSHui.Liu #define PINMUX_GPIO145__FUNC_B_GPIO145 (MTK_PIN_NO(145) | 0)
1088*9f1bdd7eSHui.Liu #define PINMUX_GPIO145__FUNC_O_DPI_D14 (MTK_PIN_NO(145) | 1)
1089*9f1bdd7eSHui.Liu #define PINMUX_GPIO145__FUNC_O_GBE_TXER (MTK_PIN_NO(145) | 2)
1090*9f1bdd7eSHui.Liu #define PINMUX_GPIO145__FUNC_B0_MD32_1_GPIO0 (MTK_PIN_NO(145) | 3)
1091*9f1bdd7eSHui.Liu #define PINMUX_GPIO145__FUNC_O_CMFLASH0 (MTK_PIN_NO(145) | 4)
1092*9f1bdd7eSHui.Liu #define PINMUX_GPIO145__FUNC_B0_SPIM3_MOSI (MTK_PIN_NO(145) | 5)
1093*9f1bdd7eSHui.Liu #define PINMUX_GPIO145__FUNC_B0_GBE_AUX_PPS2 (MTK_PIN_NO(145) | 6)
1094*9f1bdd7eSHui.Liu #define PINMUX_GPIO145__FUNC_O_PGD_HV_HSC_PWR1 (MTK_PIN_NO(145) | 7)
1095*9f1bdd7eSHui.Liu 
1096*9f1bdd7eSHui.Liu #define PINMUX_GPIO146__FUNC_B_GPIO146 (MTK_PIN_NO(146) | 0)
1097*9f1bdd7eSHui.Liu #define PINMUX_GPIO146__FUNC_O_DPI_D15 (MTK_PIN_NO(146) | 1)
1098*9f1bdd7eSHui.Liu #define PINMUX_GPIO146__FUNC_I0_GBE_RXER (MTK_PIN_NO(146) | 2)
1099*9f1bdd7eSHui.Liu #define PINMUX_GPIO146__FUNC_B0_MD32_1_GPIO1 (MTK_PIN_NO(146) | 3)
1100*9f1bdd7eSHui.Liu #define PINMUX_GPIO146__FUNC_O_CMFLASH1 (MTK_PIN_NO(146) | 4)
1101*9f1bdd7eSHui.Liu #define PINMUX_GPIO146__FUNC_B0_SPIM3_MISO (MTK_PIN_NO(146) | 5)
1102*9f1bdd7eSHui.Liu #define PINMUX_GPIO146__FUNC_B0_GBE_AUX_PPS3 (MTK_PIN_NO(146) | 6)
1103*9f1bdd7eSHui.Liu #define PINMUX_GPIO146__FUNC_O_PGD_HV_HSC_PWR2 (MTK_PIN_NO(146) | 7)
1104*9f1bdd7eSHui.Liu 
1105*9f1bdd7eSHui.Liu #define PINMUX_GPIO147__FUNC_B_GPIO147 (MTK_PIN_NO(147) | 0)
1106*9f1bdd7eSHui.Liu #define PINMUX_GPIO147__FUNC_O_DPI_HSYNC (MTK_PIN_NO(147) | 1)
1107*9f1bdd7eSHui.Liu #define PINMUX_GPIO147__FUNC_I0_GBE_COL (MTK_PIN_NO(147) | 2)
1108*9f1bdd7eSHui.Liu #define PINMUX_GPIO147__FUNC_O_I2SO1_MCK (MTK_PIN_NO(147) | 3)
1109*9f1bdd7eSHui.Liu #define PINMUX_GPIO147__FUNC_O_CMVREF0 (MTK_PIN_NO(147) | 4)
1110*9f1bdd7eSHui.Liu #define PINMUX_GPIO147__FUNC_O_SPDIF_OUT (MTK_PIN_NO(147) | 5)
1111*9f1bdd7eSHui.Liu #define PINMUX_GPIO147__FUNC_O_URTS1 (MTK_PIN_NO(147) | 6)
1112*9f1bdd7eSHui.Liu #define PINMUX_GPIO147__FUNC_O_PGD_HV_HSC_PWR3 (MTK_PIN_NO(147) | 7)
1113*9f1bdd7eSHui.Liu 
1114*9f1bdd7eSHui.Liu #define PINMUX_GPIO148__FUNC_B_GPIO148 (MTK_PIN_NO(148) | 0)
1115*9f1bdd7eSHui.Liu #define PINMUX_GPIO148__FUNC_O_DPI_VSYNC (MTK_PIN_NO(148) | 1)
1116*9f1bdd7eSHui.Liu #define PINMUX_GPIO148__FUNC_I0_GBE_INTR (MTK_PIN_NO(148) | 2)
1117*9f1bdd7eSHui.Liu #define PINMUX_GPIO148__FUNC_O_I2SO1_BCK (MTK_PIN_NO(148) | 3)
1118*9f1bdd7eSHui.Liu #define PINMUX_GPIO148__FUNC_O_CMVREF1 (MTK_PIN_NO(148) | 4)
1119*9f1bdd7eSHui.Liu #define PINMUX_GPIO148__FUNC_I0_SPDIF_IN0 (MTK_PIN_NO(148) | 5)
1120*9f1bdd7eSHui.Liu #define PINMUX_GPIO148__FUNC_I1_UCTS1 (MTK_PIN_NO(148) | 6)
1121*9f1bdd7eSHui.Liu #define PINMUX_GPIO148__FUNC_O_PGD_HV_HSC_PWR4 (MTK_PIN_NO(148) | 7)
1122*9f1bdd7eSHui.Liu 
1123*9f1bdd7eSHui.Liu #define PINMUX_GPIO149__FUNC_B_GPIO149 (MTK_PIN_NO(149) | 0)
1124*9f1bdd7eSHui.Liu #define PINMUX_GPIO149__FUNC_O_DPI_DE (MTK_PIN_NO(149) | 1)
1125*9f1bdd7eSHui.Liu #define PINMUX_GPIO149__FUNC_B0_GBE_AUX_PPS0 (MTK_PIN_NO(149) | 2)
1126*9f1bdd7eSHui.Liu #define PINMUX_GPIO149__FUNC_O_I2SO1_WS (MTK_PIN_NO(149) | 3)
1127*9f1bdd7eSHui.Liu #define PINMUX_GPIO149__FUNC_O_CMVREF2 (MTK_PIN_NO(149) | 4)
1128*9f1bdd7eSHui.Liu #define PINMUX_GPIO149__FUNC_I0_SPDIF_IN1 (MTK_PIN_NO(149) | 5)
1129*9f1bdd7eSHui.Liu #define PINMUX_GPIO149__FUNC_O_UTXD3 (MTK_PIN_NO(149) | 6)
1130*9f1bdd7eSHui.Liu #define PINMUX_GPIO149__FUNC_O_PGD_HV_HSC_PWR5 (MTK_PIN_NO(149) | 7)
1131*9f1bdd7eSHui.Liu 
1132*9f1bdd7eSHui.Liu #define PINMUX_GPIO150__FUNC_B_GPIO150 (MTK_PIN_NO(150) | 0)
1133*9f1bdd7eSHui.Liu #define PINMUX_GPIO150__FUNC_O_DPI_CK (MTK_PIN_NO(150) | 1)
1134*9f1bdd7eSHui.Liu #define PINMUX_GPIO150__FUNC_B0_GBE_AUX_PPS1 (MTK_PIN_NO(150) | 2)
1135*9f1bdd7eSHui.Liu #define PINMUX_GPIO150__FUNC_O_I2SO1_D0 (MTK_PIN_NO(150) | 3)
1136*9f1bdd7eSHui.Liu #define PINMUX_GPIO150__FUNC_O_CMVREF3 (MTK_PIN_NO(150) | 4)
1137*9f1bdd7eSHui.Liu #define PINMUX_GPIO150__FUNC_I0_SPDIF_IN2 (MTK_PIN_NO(150) | 5)
1138*9f1bdd7eSHui.Liu #define PINMUX_GPIO150__FUNC_I1_URXD3 (MTK_PIN_NO(150) | 6)
1139*9f1bdd7eSHui.Liu 
1140*9f1bdd7eSHui.Liu #define PINMUX_GPIO151__FUNC_B_GPIO151 (MTK_PIN_NO(151) | 0)
1141*9f1bdd7eSHui.Liu #define PINMUX_GPIO151__FUNC_B1_MSDC0_DAT7 (MTK_PIN_NO(151) | 1)
1142*9f1bdd7eSHui.Liu 
1143*9f1bdd7eSHui.Liu #define PINMUX_GPIO152__FUNC_B_GPIO152 (MTK_PIN_NO(152) | 0)
1144*9f1bdd7eSHui.Liu #define PINMUX_GPIO152__FUNC_B1_MSDC0_DAT6 (MTK_PIN_NO(152) | 1)
1145*9f1bdd7eSHui.Liu 
1146*9f1bdd7eSHui.Liu #define PINMUX_GPIO153__FUNC_B_GPIO153 (MTK_PIN_NO(153) | 0)
1147*9f1bdd7eSHui.Liu #define PINMUX_GPIO153__FUNC_B1_MSDC0_DAT5 (MTK_PIN_NO(153) | 1)
1148*9f1bdd7eSHui.Liu 
1149*9f1bdd7eSHui.Liu #define PINMUX_GPIO154__FUNC_B_GPIO154 (MTK_PIN_NO(154) | 0)
1150*9f1bdd7eSHui.Liu #define PINMUX_GPIO154__FUNC_B1_MSDC0_DAT4 (MTK_PIN_NO(154) | 1)
1151*9f1bdd7eSHui.Liu 
1152*9f1bdd7eSHui.Liu #define PINMUX_GPIO155__FUNC_B_GPIO155 (MTK_PIN_NO(155) | 0)
1153*9f1bdd7eSHui.Liu #define PINMUX_GPIO155__FUNC_O_MSDC0_RSTB (MTK_PIN_NO(155) | 1)
1154*9f1bdd7eSHui.Liu 
1155*9f1bdd7eSHui.Liu #define PINMUX_GPIO156__FUNC_B_GPIO156 (MTK_PIN_NO(156) | 0)
1156*9f1bdd7eSHui.Liu #define PINMUX_GPIO156__FUNC_B1_MSDC0_CMD (MTK_PIN_NO(156) | 1)
1157*9f1bdd7eSHui.Liu 
1158*9f1bdd7eSHui.Liu #define PINMUX_GPIO157__FUNC_B_GPIO157 (MTK_PIN_NO(157) | 0)
1159*9f1bdd7eSHui.Liu #define PINMUX_GPIO157__FUNC_B1_MSDC0_CLK (MTK_PIN_NO(157) | 1)
1160*9f1bdd7eSHui.Liu 
1161*9f1bdd7eSHui.Liu #define PINMUX_GPIO158__FUNC_B_GPIO158 (MTK_PIN_NO(158) | 0)
1162*9f1bdd7eSHui.Liu #define PINMUX_GPIO158__FUNC_B1_MSDC0_DAT3 (MTK_PIN_NO(158) | 1)
1163*9f1bdd7eSHui.Liu 
1164*9f1bdd7eSHui.Liu #define PINMUX_GPIO159__FUNC_B_GPIO159 (MTK_PIN_NO(159) | 0)
1165*9f1bdd7eSHui.Liu #define PINMUX_GPIO159__FUNC_B1_MSDC0_DAT2 (MTK_PIN_NO(159) | 1)
1166*9f1bdd7eSHui.Liu 
1167*9f1bdd7eSHui.Liu #define PINMUX_GPIO160__FUNC_B_GPIO160 (MTK_PIN_NO(160) | 0)
1168*9f1bdd7eSHui.Liu #define PINMUX_GPIO160__FUNC_B1_MSDC0_DAT1 (MTK_PIN_NO(160) | 1)
1169*9f1bdd7eSHui.Liu 
1170*9f1bdd7eSHui.Liu #define PINMUX_GPIO161__FUNC_B_GPIO161 (MTK_PIN_NO(161) | 0)
1171*9f1bdd7eSHui.Liu #define PINMUX_GPIO161__FUNC_B1_MSDC0_DAT0 (MTK_PIN_NO(161) | 1)
1172*9f1bdd7eSHui.Liu 
1173*9f1bdd7eSHui.Liu #define PINMUX_GPIO162__FUNC_B_GPIO162 (MTK_PIN_NO(162) | 0)
1174*9f1bdd7eSHui.Liu #define PINMUX_GPIO162__FUNC_B0_MSDC0_DSL (MTK_PIN_NO(162) | 1)
1175*9f1bdd7eSHui.Liu 
1176*9f1bdd7eSHui.Liu #define PINMUX_GPIO163__FUNC_B_GPIO163 (MTK_PIN_NO(163) | 0)
1177*9f1bdd7eSHui.Liu #define PINMUX_GPIO163__FUNC_B1_MSDC1_CMD (MTK_PIN_NO(163) | 1)
1178*9f1bdd7eSHui.Liu #define PINMUX_GPIO163__FUNC_O_SPDIF_OUT (MTK_PIN_NO(163) | 2)
1179*9f1bdd7eSHui.Liu #define PINMUX_GPIO163__FUNC_I1_MD32_0_JTAG_TMS (MTK_PIN_NO(163) | 3)
1180*9f1bdd7eSHui.Liu #define PINMUX_GPIO163__FUNC_I1_ADSP_JTAG0_TMS (MTK_PIN_NO(163) | 4)
1181*9f1bdd7eSHui.Liu #define PINMUX_GPIO163__FUNC_I1_SCP_JTAG0_TMS (MTK_PIN_NO(163) | 5)
1182*9f1bdd7eSHui.Liu #define PINMUX_GPIO163__FUNC_I1_CCU0_JTAG_TMS (MTK_PIN_NO(163) | 6)
1183*9f1bdd7eSHui.Liu #define PINMUX_GPIO163__FUNC_I0_IPU_JTAG_TMS (MTK_PIN_NO(163) | 7)
1184*9f1bdd7eSHui.Liu 
1185*9f1bdd7eSHui.Liu #define PINMUX_GPIO164__FUNC_B_GPIO164 (MTK_PIN_NO(164) | 0)
1186*9f1bdd7eSHui.Liu #define PINMUX_GPIO164__FUNC_B1_MSDC1_CLK (MTK_PIN_NO(164) | 1)
1187*9f1bdd7eSHui.Liu #define PINMUX_GPIO164__FUNC_I0_SPDIF_IN0 (MTK_PIN_NO(164) | 2)
1188*9f1bdd7eSHui.Liu #define PINMUX_GPIO164__FUNC_I1_MD32_0_JTAG_TCK (MTK_PIN_NO(164) | 3)
1189*9f1bdd7eSHui.Liu #define PINMUX_GPIO164__FUNC_I0_ADSP_JTAG0_TCK (MTK_PIN_NO(164) | 4)
1190*9f1bdd7eSHui.Liu #define PINMUX_GPIO164__FUNC_I1_SCP_JTAG0_TCK (MTK_PIN_NO(164) | 5)
1191*9f1bdd7eSHui.Liu #define PINMUX_GPIO164__FUNC_I1_CCU0_JTAG_TCK (MTK_PIN_NO(164) | 6)
1192*9f1bdd7eSHui.Liu #define PINMUX_GPIO164__FUNC_I0_IPU_JTAG_TCK (MTK_PIN_NO(164) | 7)
1193*9f1bdd7eSHui.Liu 
1194*9f1bdd7eSHui.Liu #define PINMUX_GPIO165__FUNC_B_GPIO165 (MTK_PIN_NO(165) | 0)
1195*9f1bdd7eSHui.Liu #define PINMUX_GPIO165__FUNC_B1_MSDC1_DAT0 (MTK_PIN_NO(165) | 1)
1196*9f1bdd7eSHui.Liu #define PINMUX_GPIO165__FUNC_I0_SPDIF_IN1 (MTK_PIN_NO(165) | 2)
1197*9f1bdd7eSHui.Liu #define PINMUX_GPIO165__FUNC_I1_MD32_0_JTAG_TDI (MTK_PIN_NO(165) | 3)
1198*9f1bdd7eSHui.Liu #define PINMUX_GPIO165__FUNC_I1_ADSP_JTAG0_TDI (MTK_PIN_NO(165) | 4)
1199*9f1bdd7eSHui.Liu #define PINMUX_GPIO165__FUNC_I1_SCP_JTAG0_TDI (MTK_PIN_NO(165) | 5)
1200*9f1bdd7eSHui.Liu #define PINMUX_GPIO165__FUNC_I1_CCU0_JTAG_TDI (MTK_PIN_NO(165) | 6)
1201*9f1bdd7eSHui.Liu #define PINMUX_GPIO165__FUNC_I0_IPU_JTAG_TDI (MTK_PIN_NO(165) | 7)
1202*9f1bdd7eSHui.Liu 
1203*9f1bdd7eSHui.Liu #define PINMUX_GPIO166__FUNC_B_GPIO166 (MTK_PIN_NO(166) | 0)
1204*9f1bdd7eSHui.Liu #define PINMUX_GPIO166__FUNC_B1_MSDC1_DAT1 (MTK_PIN_NO(166) | 1)
1205*9f1bdd7eSHui.Liu #define PINMUX_GPIO166__FUNC_I0_SPDIF_IN2 (MTK_PIN_NO(166) | 2)
1206*9f1bdd7eSHui.Liu #define PINMUX_GPIO166__FUNC_O_MD32_0_JTAG_TDO (MTK_PIN_NO(166) | 3)
1207*9f1bdd7eSHui.Liu #define PINMUX_GPIO166__FUNC_O_ADSP_JTAG0_TDO (MTK_PIN_NO(166) | 4)
1208*9f1bdd7eSHui.Liu #define PINMUX_GPIO166__FUNC_O_SCP_JTAG0_TDO (MTK_PIN_NO(166) | 5)
1209*9f1bdd7eSHui.Liu #define PINMUX_GPIO166__FUNC_O_CCU0_JTAG_TDO (MTK_PIN_NO(166) | 6)
1210*9f1bdd7eSHui.Liu #define PINMUX_GPIO166__FUNC_O_IPU_JTAG_TDO (MTK_PIN_NO(166) | 7)
1211*9f1bdd7eSHui.Liu 
1212*9f1bdd7eSHui.Liu #define PINMUX_GPIO167__FUNC_B_GPIO167 (MTK_PIN_NO(167) | 0)
1213*9f1bdd7eSHui.Liu #define PINMUX_GPIO167__FUNC_B1_MSDC1_DAT2 (MTK_PIN_NO(167) | 1)
1214*9f1bdd7eSHui.Liu #define PINMUX_GPIO167__FUNC_O_PWM_0 (MTK_PIN_NO(167) | 2)
1215*9f1bdd7eSHui.Liu #define PINMUX_GPIO167__FUNC_I1_MD32_0_JTAG_TRST (MTK_PIN_NO(167) | 3)
1216*9f1bdd7eSHui.Liu #define PINMUX_GPIO167__FUNC_I1_ADSP_JTAG0_TRSTN (MTK_PIN_NO(167) | 4)
1217*9f1bdd7eSHui.Liu #define PINMUX_GPIO167__FUNC_I0_SCP_JTAG0_TRSTN (MTK_PIN_NO(167) | 5)
1218*9f1bdd7eSHui.Liu #define PINMUX_GPIO167__FUNC_I1_CCU0_JTAG_TRST (MTK_PIN_NO(167) | 6)
1219*9f1bdd7eSHui.Liu #define PINMUX_GPIO167__FUNC_I0_IPU_JTAG_TRST (MTK_PIN_NO(167) | 7)
1220*9f1bdd7eSHui.Liu 
1221*9f1bdd7eSHui.Liu #define PINMUX_GPIO168__FUNC_B_GPIO168 (MTK_PIN_NO(168) | 0)
1222*9f1bdd7eSHui.Liu #define PINMUX_GPIO168__FUNC_B1_MSDC1_DAT3 (MTK_PIN_NO(168) | 1)
1223*9f1bdd7eSHui.Liu #define PINMUX_GPIO168__FUNC_O_PWM_1 (MTK_PIN_NO(168) | 2)
1224*9f1bdd7eSHui.Liu #define PINMUX_GPIO168__FUNC_O_CLKM0 (MTK_PIN_NO(168) | 3)
1225*9f1bdd7eSHui.Liu 
1226*9f1bdd7eSHui.Liu #define PINMUX_GPIO169__FUNC_B_GPIO169 (MTK_PIN_NO(169) | 0)
1227*9f1bdd7eSHui.Liu #define PINMUX_GPIO169__FUNC_B1_MSDC2_CMD (MTK_PIN_NO(169) | 1)
1228*9f1bdd7eSHui.Liu #define PINMUX_GPIO169__FUNC_O_LVTS_FOUT (MTK_PIN_NO(169) | 2)
1229*9f1bdd7eSHui.Liu #define PINMUX_GPIO169__FUNC_I1_MD32_1_JTAG_TMS (MTK_PIN_NO(169) | 3)
1230*9f1bdd7eSHui.Liu #define PINMUX_GPIO169__FUNC_I0_UDI_TMS (MTK_PIN_NO(169) | 4)
1231*9f1bdd7eSHui.Liu #define PINMUX_GPIO169__FUNC_I0_VPU_UDI_TMS (MTK_PIN_NO(169) | 5)
1232*9f1bdd7eSHui.Liu #define PINMUX_GPIO169__FUNC_B0_TDMIN_MCK (MTK_PIN_NO(169) | 6)
1233*9f1bdd7eSHui.Liu #define PINMUX_GPIO169__FUNC_I1_SSPM_JTAG_TMS (MTK_PIN_NO(169) | 7)
1234*9f1bdd7eSHui.Liu 
1235*9f1bdd7eSHui.Liu #define PINMUX_GPIO170__FUNC_B_GPIO170 (MTK_PIN_NO(170) | 0)
1236*9f1bdd7eSHui.Liu #define PINMUX_GPIO170__FUNC_B1_MSDC2_CLK (MTK_PIN_NO(170) | 1)
1237*9f1bdd7eSHui.Liu #define PINMUX_GPIO170__FUNC_O_LVTS_SDO (MTK_PIN_NO(170) | 2)
1238*9f1bdd7eSHui.Liu #define PINMUX_GPIO170__FUNC_I1_MD32_1_JTAG_TCK (MTK_PIN_NO(170) | 3)
1239*9f1bdd7eSHui.Liu #define PINMUX_GPIO170__FUNC_I0_UDI_TCK (MTK_PIN_NO(170) | 4)
1240*9f1bdd7eSHui.Liu #define PINMUX_GPIO170__FUNC_I0_VPU_UDI_TCK (MTK_PIN_NO(170) | 5)
1241*9f1bdd7eSHui.Liu #define PINMUX_GPIO170__FUNC_B0_TDMIN_BCK (MTK_PIN_NO(170) | 6)
1242*9f1bdd7eSHui.Liu #define PINMUX_GPIO170__FUNC_I1_SSPM_JTAG_TCK (MTK_PIN_NO(170) | 7)
1243*9f1bdd7eSHui.Liu 
1244*9f1bdd7eSHui.Liu #define PINMUX_GPIO171__FUNC_B_GPIO171 (MTK_PIN_NO(171) | 0)
1245*9f1bdd7eSHui.Liu #define PINMUX_GPIO171__FUNC_B1_MSDC2_DAT0 (MTK_PIN_NO(171) | 1)
1246*9f1bdd7eSHui.Liu #define PINMUX_GPIO171__FUNC_I0_LVTS_26M (MTK_PIN_NO(171) | 2)
1247*9f1bdd7eSHui.Liu #define PINMUX_GPIO171__FUNC_I1_MD32_1_JTAG_TDI (MTK_PIN_NO(171) | 3)
1248*9f1bdd7eSHui.Liu #define PINMUX_GPIO171__FUNC_I0_UDI_TDI (MTK_PIN_NO(171) | 4)
1249*9f1bdd7eSHui.Liu #define PINMUX_GPIO171__FUNC_I0_VPU_UDI_TDI (MTK_PIN_NO(171) | 5)
1250*9f1bdd7eSHui.Liu #define PINMUX_GPIO171__FUNC_B0_TDMIN_LRCK (MTK_PIN_NO(171) | 6)
1251*9f1bdd7eSHui.Liu #define PINMUX_GPIO171__FUNC_I1_SSPM_JTAG_TDI (MTK_PIN_NO(171) | 7)
1252*9f1bdd7eSHui.Liu 
1253*9f1bdd7eSHui.Liu #define PINMUX_GPIO172__FUNC_B_GPIO172 (MTK_PIN_NO(172) | 0)
1254*9f1bdd7eSHui.Liu #define PINMUX_GPIO172__FUNC_B1_MSDC2_DAT1 (MTK_PIN_NO(172) | 1)
1255*9f1bdd7eSHui.Liu #define PINMUX_GPIO172__FUNC_I0_LVTS_SCF (MTK_PIN_NO(172) | 2)
1256*9f1bdd7eSHui.Liu #define PINMUX_GPIO172__FUNC_O_MD32_1_JTAG_TDO (MTK_PIN_NO(172) | 3)
1257*9f1bdd7eSHui.Liu #define PINMUX_GPIO172__FUNC_O_UDI_TDO (MTK_PIN_NO(172) | 4)
1258*9f1bdd7eSHui.Liu #define PINMUX_GPIO172__FUNC_O_VPU_UDI_TDO (MTK_PIN_NO(172) | 5)
1259*9f1bdd7eSHui.Liu #define PINMUX_GPIO172__FUNC_I0_TDMIN_DI (MTK_PIN_NO(172) | 6)
1260*9f1bdd7eSHui.Liu #define PINMUX_GPIO172__FUNC_O_SSPM_JTAG_TDO (MTK_PIN_NO(172) | 7)
1261*9f1bdd7eSHui.Liu 
1262*9f1bdd7eSHui.Liu #define PINMUX_GPIO173__FUNC_B_GPIO173 (MTK_PIN_NO(173) | 0)
1263*9f1bdd7eSHui.Liu #define PINMUX_GPIO173__FUNC_B1_MSDC2_DAT2 (MTK_PIN_NO(173) | 1)
1264*9f1bdd7eSHui.Liu #define PINMUX_GPIO173__FUNC_I0_LVTS_SCK (MTK_PIN_NO(173) | 2)
1265*9f1bdd7eSHui.Liu #define PINMUX_GPIO173__FUNC_I1_MD32_1_JTAG_TRST (MTK_PIN_NO(173) | 3)
1266*9f1bdd7eSHui.Liu #define PINMUX_GPIO173__FUNC_I0_UDI_NTRST (MTK_PIN_NO(173) | 4)
1267*9f1bdd7eSHui.Liu #define PINMUX_GPIO173__FUNC_I0_VPU_UDI_NTRST (MTK_PIN_NO(173) | 5)
1268*9f1bdd7eSHui.Liu #define PINMUX_GPIO173__FUNC_I0_SSPM_JTAG_TRSTN (MTK_PIN_NO(173) | 7)
1269*9f1bdd7eSHui.Liu 
1270*9f1bdd7eSHui.Liu #define PINMUX_GPIO174__FUNC_B_GPIO174 (MTK_PIN_NO(174) | 0)
1271*9f1bdd7eSHui.Liu #define PINMUX_GPIO174__FUNC_B1_MSDC2_DAT3 (MTK_PIN_NO(174) | 1)
1272*9f1bdd7eSHui.Liu #define PINMUX_GPIO174__FUNC_I0_LVTS_SDI (MTK_PIN_NO(174) | 2)
1273*9f1bdd7eSHui.Liu 
1274*9f1bdd7eSHui.Liu #define PINMUX_GPIO175__FUNC_B_GPIO175 (MTK_PIN_NO(175) | 0)
1275*9f1bdd7eSHui.Liu #define PINMUX_GPIO175__FUNC_B0_SPMI_M_SCL (MTK_PIN_NO(175) | 1)
1276*9f1bdd7eSHui.Liu 
1277*9f1bdd7eSHui.Liu #define PINMUX_GPIO176__FUNC_B_GPIO176 (MTK_PIN_NO(176) | 0)
1278*9f1bdd7eSHui.Liu #define PINMUX_GPIO176__FUNC_B0_SPMI_M_SDA (MTK_PIN_NO(176) | 1)
1279*9f1bdd7eSHui.Liu 
1280*9f1bdd7eSHui.Liu #endif /* __MEDIATEK_MT8188-PINFUNC_H */
1281