14d66c56fSDan Murphy /* SPDX-License-Identifier: GPL-2.0-only */
24d66c56fSDan Murphy /*
34d66c56fSDan Murphy  * Device Tree constants for the Texas Instruments DP83869 PHY
44d66c56fSDan Murphy  *
54d66c56fSDan Murphy  * Author: Dan Murphy <dmurphy@ti.com>
64d66c56fSDan Murphy  *
74d66c56fSDan Murphy  * Copyright:   (C) 2019 Texas Instruments, Inc.
84d66c56fSDan Murphy  */
94d66c56fSDan Murphy 
104d66c56fSDan Murphy #ifndef _DT_BINDINGS_TI_DP83869_H
114d66c56fSDan Murphy #define _DT_BINDINGS_TI_DP83869_H
124d66c56fSDan Murphy 
134d66c56fSDan Murphy /* PHY CTRL bits */
144d66c56fSDan Murphy #define DP83869_PHYCR_FIFO_DEPTH_3_B_NIB	0x00
154d66c56fSDan Murphy #define DP83869_PHYCR_FIFO_DEPTH_4_B_NIB	0x01
164d66c56fSDan Murphy #define DP83869_PHYCR_FIFO_DEPTH_6_B_NIB	0x02
174d66c56fSDan Murphy #define DP83869_PHYCR_FIFO_DEPTH_8_B_NIB	0x03
184d66c56fSDan Murphy 
194d66c56fSDan Murphy /* IO_MUX_CFG - Clock output selection */
204d66c56fSDan Murphy #define DP83869_CLK_O_SEL_CHN_A_RCLK		0x0
214d66c56fSDan Murphy #define DP83869_CLK_O_SEL_CHN_B_RCLK		0x1
224d66c56fSDan Murphy #define DP83869_CLK_O_SEL_CHN_C_RCLK		0x2
234d66c56fSDan Murphy #define DP83869_CLK_O_SEL_CHN_D_RCLK		0x3
244d66c56fSDan Murphy #define DP83869_CLK_O_SEL_CHN_A_RCLK_DIV5	0x4
254d66c56fSDan Murphy #define DP83869_CLK_O_SEL_CHN_B_RCLK_DIV5	0x5
264d66c56fSDan Murphy #define DP83869_CLK_O_SEL_CHN_C_RCLK_DIV5	0x6
274d66c56fSDan Murphy #define DP83869_CLK_O_SEL_CHN_D_RCLK_DIV5	0x7
284d66c56fSDan Murphy #define DP83869_CLK_O_SEL_CHN_A_TCLK		0x8
294d66c56fSDan Murphy #define DP83869_CLK_O_SEL_CHN_B_TCLK		0x9
304d66c56fSDan Murphy #define DP83869_CLK_O_SEL_CHN_C_TCLK		0xa
314d66c56fSDan Murphy #define DP83869_CLK_O_SEL_CHN_D_TCLK		0xb
324d66c56fSDan Murphy #define DP83869_CLK_O_SEL_REF_CLK		0xc
334d66c56fSDan Murphy 
344d66c56fSDan Murphy #define DP83869_RGMII_COPPER_ETHERNET		0x00
354d66c56fSDan Murphy #define DP83869_RGMII_1000_BASE			0x01
364d66c56fSDan Murphy #define DP83869_RGMII_100_BASE			0x02
374d66c56fSDan Murphy #define DP83869_RGMII_SGMII_BRIDGE		0x03
384d66c56fSDan Murphy #define DP83869_1000M_MEDIA_CONVERT		0x04
394d66c56fSDan Murphy #define DP83869_100M_MEDIA_CONVERT		0x05
404d66c56fSDan Murphy #define DP83869_SGMII_COPPER_ETHERNET		0x06
414d66c56fSDan Murphy 
424d66c56fSDan Murphy #endif
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