15c8d08f3SDmitry Osipenko /* SPDX-License-Identifier: GPL-2.0 */ 25c8d08f3SDmitry Osipenko #ifndef DT_BINDINGS_MEMORY_TEGRA20_MC_H 35c8d08f3SDmitry Osipenko #define DT_BINDINGS_MEMORY_TEGRA20_MC_H 45c8d08f3SDmitry Osipenko 55c8d08f3SDmitry Osipenko #define TEGRA20_MC_RESET_AVPC 0 65c8d08f3SDmitry Osipenko #define TEGRA20_MC_RESET_DC 1 75c8d08f3SDmitry Osipenko #define TEGRA20_MC_RESET_DCB 2 85c8d08f3SDmitry Osipenko #define TEGRA20_MC_RESET_EPP 3 95c8d08f3SDmitry Osipenko #define TEGRA20_MC_RESET_2D 4 105c8d08f3SDmitry Osipenko #define TEGRA20_MC_RESET_HC 5 115c8d08f3SDmitry Osipenko #define TEGRA20_MC_RESET_ISP 6 125c8d08f3SDmitry Osipenko #define TEGRA20_MC_RESET_MPCORE 7 135c8d08f3SDmitry Osipenko #define TEGRA20_MC_RESET_MPEA 8 145c8d08f3SDmitry Osipenko #define TEGRA20_MC_RESET_MPEB 9 155c8d08f3SDmitry Osipenko #define TEGRA20_MC_RESET_MPEC 10 165c8d08f3SDmitry Osipenko #define TEGRA20_MC_RESET_3D 11 175c8d08f3SDmitry Osipenko #define TEGRA20_MC_RESET_PPCS 12 185c8d08f3SDmitry Osipenko #define TEGRA20_MC_RESET_VDE 13 195c8d08f3SDmitry Osipenko #define TEGRA20_MC_RESET_VI 14 205c8d08f3SDmitry Osipenko 215c8d08f3SDmitry Osipenko #endif 22