1b5d2f741SDavid Dai /* SPDX-License-Identifier: GPL-2.0 */
2b5d2f741SDavid Dai /*
3b5d2f741SDavid Dai  * Qualcomm SDM845 interconnect IDs
4b5d2f741SDavid Dai  *
5b5d2f741SDavid Dai  * Copyright (c) 2018, Linaro Ltd.
6b5d2f741SDavid Dai  * Author: Georgi Djakov <georgi.djakov@linaro.org>
7b5d2f741SDavid Dai  */
8b5d2f741SDavid Dai 
9b5d2f741SDavid Dai #ifndef __DT_BINDINGS_INTERCONNECT_QCOM_SDM845_H
10b5d2f741SDavid Dai #define __DT_BINDINGS_INTERCONNECT_QCOM_SDM845_H
11b5d2f741SDavid Dai 
12b5d2f741SDavid Dai #define MASTER_A1NOC_CFG		0
13b5d2f741SDavid Dai #define MASTER_BLSP_1			1
14b5d2f741SDavid Dai #define MASTER_TSIF			2
15b5d2f741SDavid Dai #define MASTER_SDCC_2			3
16b5d2f741SDavid Dai #define MASTER_SDCC_4			4
17b5d2f741SDavid Dai #define MASTER_UFS_CARD			5
18b5d2f741SDavid Dai #define MASTER_UFS_MEM			6
19b5d2f741SDavid Dai #define MASTER_PCIE_0			7
20b5d2f741SDavid Dai #define MASTER_A2NOC_CFG		8
21b5d2f741SDavid Dai #define MASTER_QDSS_BAM			9
22b5d2f741SDavid Dai #define MASTER_BLSP_2			10
23b5d2f741SDavid Dai #define MASTER_CNOC_A2NOC		11
24b5d2f741SDavid Dai #define MASTER_CRYPTO			12
25b5d2f741SDavid Dai #define MASTER_IPA			13
26b5d2f741SDavid Dai #define MASTER_PCIE_1			14
27b5d2f741SDavid Dai #define MASTER_QDSS_ETR			15
28b5d2f741SDavid Dai #define MASTER_USB3_0			16
29b5d2f741SDavid Dai #define MASTER_USB3_1			17
30b5d2f741SDavid Dai #define MASTER_CAMNOC_HF0_UNCOMP	18
31b5d2f741SDavid Dai #define MASTER_CAMNOC_HF1_UNCOMP	19
32b5d2f741SDavid Dai #define MASTER_CAMNOC_SF_UNCOMP		20
33b5d2f741SDavid Dai #define MASTER_SPDM			21
34b5d2f741SDavid Dai #define MASTER_TIC			22
35b5d2f741SDavid Dai #define MASTER_SNOC_CNOC		23
36b5d2f741SDavid Dai #define MASTER_QDSS_DAP			24
37b5d2f741SDavid Dai #define MASTER_CNOC_DC_NOC		25
38b5d2f741SDavid Dai #define MASTER_APPSS_PROC		26
39b5d2f741SDavid Dai #define MASTER_GNOC_CFG			27
40b5d2f741SDavid Dai #define MASTER_LLCC			28
41b5d2f741SDavid Dai #define MASTER_TCU_0			29
42b5d2f741SDavid Dai #define MASTER_MEM_NOC_CFG		30
43b5d2f741SDavid Dai #define MASTER_GNOC_MEM_NOC		31
44b5d2f741SDavid Dai #define MASTER_MNOC_HF_MEM_NOC		32
45b5d2f741SDavid Dai #define MASTER_MNOC_SF_MEM_NOC		33
46b5d2f741SDavid Dai #define MASTER_SNOC_GC_MEM_NOC		34
47b5d2f741SDavid Dai #define MASTER_SNOC_SF_MEM_NOC		35
48b5d2f741SDavid Dai #define MASTER_GFX3D			36
49b5d2f741SDavid Dai #define MASTER_CNOC_MNOC_CFG		37
50b5d2f741SDavid Dai #define MASTER_CAMNOC_HF0		38
51b5d2f741SDavid Dai #define MASTER_CAMNOC_HF1		39
52b5d2f741SDavid Dai #define MASTER_CAMNOC_SF		40
53b5d2f741SDavid Dai #define MASTER_MDP0			41
54b5d2f741SDavid Dai #define MASTER_MDP1			42
55b5d2f741SDavid Dai #define MASTER_ROTATOR			43
56b5d2f741SDavid Dai #define MASTER_VIDEO_P0			44
57b5d2f741SDavid Dai #define MASTER_VIDEO_P1			45
58b5d2f741SDavid Dai #define MASTER_VIDEO_PROC		46
59b5d2f741SDavid Dai #define MASTER_SNOC_CFG			47
60b5d2f741SDavid Dai #define MASTER_A1NOC_SNOC		48
61b5d2f741SDavid Dai #define MASTER_A2NOC_SNOC		49
62b5d2f741SDavid Dai #define MASTER_GNOC_SNOC		50
63b5d2f741SDavid Dai #define MASTER_MEM_NOC_SNOC		51
64b5d2f741SDavid Dai #define MASTER_ANOC_PCIE_SNOC		52
65b5d2f741SDavid Dai #define MASTER_PIMEM			53
66b5d2f741SDavid Dai #define MASTER_GIC			54
67b5d2f741SDavid Dai #define SLAVE_A1NOC_SNOC		55
68b5d2f741SDavid Dai #define SLAVE_SERVICE_A1NOC		56
69b5d2f741SDavid Dai #define SLAVE_ANOC_PCIE_A1NOC_SNOC	57
70b5d2f741SDavid Dai #define SLAVE_A2NOC_SNOC		58
71b5d2f741SDavid Dai #define SLAVE_ANOC_PCIE_SNOC		59
72b5d2f741SDavid Dai #define SLAVE_SERVICE_A2NOC		60
73b5d2f741SDavid Dai #define SLAVE_CAMNOC_UNCOMP		61
74b5d2f741SDavid Dai #define SLAVE_A1NOC_CFG			62
75b5d2f741SDavid Dai #define SLAVE_A2NOC_CFG			63
76b5d2f741SDavid Dai #define SLAVE_AOP			64
77b5d2f741SDavid Dai #define SLAVE_AOSS			65
78b5d2f741SDavid Dai #define SLAVE_CAMERA_CFG		66
79b5d2f741SDavid Dai #define SLAVE_CLK_CTL			67
80b5d2f741SDavid Dai #define SLAVE_CDSP_CFG			68
81b5d2f741SDavid Dai #define SLAVE_RBCPR_CX_CFG		69
82b5d2f741SDavid Dai #define SLAVE_CRYPTO_0_CFG		70
83b5d2f741SDavid Dai #define SLAVE_DCC_CFG			71
84b5d2f741SDavid Dai #define SLAVE_CNOC_DDRSS		72
85b5d2f741SDavid Dai #define SLAVE_DISPLAY_CFG		73
86b5d2f741SDavid Dai #define SLAVE_GLM			74
87b5d2f741SDavid Dai #define SLAVE_GFX3D_CFG			75
88b5d2f741SDavid Dai #define SLAVE_IMEM_CFG			76
89b5d2f741SDavid Dai #define SLAVE_IPA_CFG			77
90b5d2f741SDavid Dai #define SLAVE_CNOC_MNOC_CFG		78
91b5d2f741SDavid Dai #define SLAVE_PCIE_0_CFG		79
92b5d2f741SDavid Dai #define SLAVE_PCIE_1_CFG		80
93b5d2f741SDavid Dai #define SLAVE_PDM			81
94b5d2f741SDavid Dai #define SLAVE_SOUTH_PHY_CFG		82
95b5d2f741SDavid Dai #define SLAVE_PIMEM_CFG			83
96b5d2f741SDavid Dai #define SLAVE_PRNG			84
97b5d2f741SDavid Dai #define SLAVE_QDSS_CFG			85
98b5d2f741SDavid Dai #define SLAVE_BLSP_2			86
99b5d2f741SDavid Dai #define SLAVE_BLSP_1			87
100b5d2f741SDavid Dai #define SLAVE_SDCC_2			88
101b5d2f741SDavid Dai #define SLAVE_SDCC_4			89
102b5d2f741SDavid Dai #define SLAVE_SNOC_CFG			90
103b5d2f741SDavid Dai #define SLAVE_SPDM_WRAPPER		91
104b5d2f741SDavid Dai #define SLAVE_SPSS_CFG			92
105b5d2f741SDavid Dai #define SLAVE_TCSR			93
106b5d2f741SDavid Dai #define SLAVE_TLMM_NORTH		94
107b5d2f741SDavid Dai #define SLAVE_TLMM_SOUTH		95
108b5d2f741SDavid Dai #define SLAVE_TSIF			96
109b5d2f741SDavid Dai #define SLAVE_UFS_CARD_CFG		97
110b5d2f741SDavid Dai #define SLAVE_UFS_MEM_CFG		98
111b5d2f741SDavid Dai #define SLAVE_USB3_0			99
112b5d2f741SDavid Dai #define SLAVE_USB3_1			100
113b5d2f741SDavid Dai #define SLAVE_VENUS_CFG			101
114b5d2f741SDavid Dai #define SLAVE_VSENSE_CTRL_CFG		102
115b5d2f741SDavid Dai #define SLAVE_CNOC_A2NOC		103
116b5d2f741SDavid Dai #define SLAVE_SERVICE_CNOC		104
117b5d2f741SDavid Dai #define SLAVE_LLCC_CFG			105
118b5d2f741SDavid Dai #define SLAVE_MEM_NOC_CFG		106
119b5d2f741SDavid Dai #define SLAVE_GNOC_SNOC			107
120b5d2f741SDavid Dai #define SLAVE_GNOC_MEM_NOC		108
121b5d2f741SDavid Dai #define SLAVE_SERVICE_GNOC		109
122b5d2f741SDavid Dai #define SLAVE_EBI1			110
123b5d2f741SDavid Dai #define SLAVE_MSS_PROC_MS_MPU_CFG	111
124b5d2f741SDavid Dai #define SLAVE_MEM_NOC_GNOC		112
125b5d2f741SDavid Dai #define SLAVE_LLCC			113
126b5d2f741SDavid Dai #define SLAVE_MEM_NOC_SNOC		114
127b5d2f741SDavid Dai #define SLAVE_SERVICE_MEM_NOC		115
128b5d2f741SDavid Dai #define SLAVE_MNOC_SF_MEM_NOC		116
129b5d2f741SDavid Dai #define SLAVE_MNOC_HF_MEM_NOC		117
130b5d2f741SDavid Dai #define SLAVE_SERVICE_MNOC		118
131b5d2f741SDavid Dai #define SLAVE_APPSS			119
132b5d2f741SDavid Dai #define SLAVE_SNOC_CNOC			120
133b5d2f741SDavid Dai #define SLAVE_SNOC_MEM_NOC_GC		121
134b5d2f741SDavid Dai #define SLAVE_SNOC_MEM_NOC_SF		122
135b5d2f741SDavid Dai #define SLAVE_IMEM			123
136b5d2f741SDavid Dai #define SLAVE_PCIE_0			124
137b5d2f741SDavid Dai #define SLAVE_PCIE_1			125
138b5d2f741SDavid Dai #define SLAVE_PIMEM			126
139b5d2f741SDavid Dai #define SLAVE_SERVICE_SNOC		127
140b5d2f741SDavid Dai #define SLAVE_QDSS_STM			128
141b5d2f741SDavid Dai #define SLAVE_TCU			129
142b5d2f741SDavid Dai 
143b5d2f741SDavid Dai #endif
144