1d1492bbdSJishnu Prakash /* SPDX-License-Identifier: GPL-2.0-only */ 2d1492bbdSJishnu Prakash /* 3d1492bbdSJishnu Prakash * Copyright (c) 2020 The Linux Foundation. All rights reserved. 4d1492bbdSJishnu Prakash */ 5d1492bbdSJishnu Prakash 6d1492bbdSJishnu Prakash #ifndef _DT_BINDINGS_QCOM_SPMI_VADC_PMK8350_H 7d1492bbdSJishnu Prakash #define _DT_BINDINGS_QCOM_SPMI_VADC_PMK8350_H 8d1492bbdSJishnu Prakash 9d1492bbdSJishnu Prakash #ifndef PMK8350_SID 10d1492bbdSJishnu Prakash #define PMK8350_SID 0 11d1492bbdSJishnu Prakash #endif 12d1492bbdSJishnu Prakash 13d1492bbdSJishnu Prakash /* ADC channels for PMK8350_ADC for PMIC7 */ 14d1492bbdSJishnu Prakash #define PMK8350_ADC7_REF_GND (PMK8350_SID << 8 | 0x0) 15d1492bbdSJishnu Prakash #define PMK8350_ADC7_1P25VREF (PMK8350_SID << 8 | 0x01) 16d1492bbdSJishnu Prakash #define PMK8350_ADC7_VREF_VADC (PMK8350_SID << 8 | 0x02) 17d1492bbdSJishnu Prakash #define PMK8350_ADC7_DIE_TEMP (PMK8350_SID << 8 | 0x03) 18d1492bbdSJishnu Prakash 19d1492bbdSJishnu Prakash #define PMK8350_ADC7_AMUX_THM1 (PMK8350_SID << 8 | 0x04) 20d1492bbdSJishnu Prakash #define PMK8350_ADC7_AMUX_THM2 (PMK8350_SID << 8 | 0x05) 21d1492bbdSJishnu Prakash #define PMK8350_ADC7_AMUX_THM3 (PMK8350_SID << 8 | 0x06) 22d1492bbdSJishnu Prakash #define PMK8350_ADC7_AMUX_THM4 (PMK8350_SID << 8 | 0x07) 23d1492bbdSJishnu Prakash #define PMK8350_ADC7_AMUX_THM5 (PMK8350_SID << 8 | 0x08) 24d1492bbdSJishnu Prakash 25d1492bbdSJishnu Prakash /* 30k pull-up1 */ 26d1492bbdSJishnu Prakash #define PMK8350_ADC7_AMUX_THM1_30K_PU (PMK8350_SID << 8 | 0x24) 27d1492bbdSJishnu Prakash #define PMK8350_ADC7_AMUX_THM2_30K_PU (PMK8350_SID << 8 | 0x25) 28d1492bbdSJishnu Prakash #define PMK8350_ADC7_AMUX_THM3_30K_PU (PMK8350_SID << 8 | 0x26) 29d1492bbdSJishnu Prakash #define PMK8350_ADC7_AMUX_THM4_30K_PU (PMK8350_SID << 8 | 0x27) 30d1492bbdSJishnu Prakash #define PMK8350_ADC7_AMUX_THM5_30K_PU (PMK8350_SID << 8 | 0x28) 31d1492bbdSJishnu Prakash 32d1492bbdSJishnu Prakash /* 100k pull-up2 */ 33d1492bbdSJishnu Prakash #define PMK8350_ADC7_AMUX_THM1_100K_PU (PMK8350_SID << 8 | 0x44) 34d1492bbdSJishnu Prakash #define PMK8350_ADC7_AMUX_THM2_100K_PU (PMK8350_SID << 8 | 0x45) 35d1492bbdSJishnu Prakash #define PMK8350_ADC7_AMUX_THM3_100K_PU (PMK8350_SID << 8 | 0x46) 36d1492bbdSJishnu Prakash #define PMK8350_ADC7_AMUX_THM4_100K_PU (PMK8350_SID << 8 | 0x47) 37d1492bbdSJishnu Prakash #define PMK8350_ADC7_AMUX_THM5_100K_PU (PMK8350_SID << 8 | 0x48) 38d1492bbdSJishnu Prakash 39d1492bbdSJishnu Prakash /* 400k pull-up3 */ 40d1492bbdSJishnu Prakash #define PMK8350_ADC7_AMUX_THM1_400K_PU (PMK8350_SID << 8 | 0x64) 41d1492bbdSJishnu Prakash #define PMK8350_ADC7_AMUX_THM2_400K_PU (PMK8350_SID << 8 | 0x65) 42d1492bbdSJishnu Prakash #define PMK8350_ADC7_AMUX_THM3_400K_PU (PMK8350_SID << 8 | 0x66) 43d1492bbdSJishnu Prakash #define PMK8350_ADC7_AMUX_THM4_400K_PU (PMK8350_SID << 8 | 0x67) 44d1492bbdSJishnu Prakash #define PMK8350_ADC7_AMUX_THM5_400K_PU (PMK8350_SID << 8 | 0x68) 45d1492bbdSJishnu Prakash 46d1492bbdSJishnu Prakash #endif /* _DT_BINDINGS_QCOM_SPMI_VADC_PMK8350_H */ 47