18fedf805SBibby Hsieh /* SPDX-License-Identifier: GPL-2.0 */ 28fedf805SBibby Hsieh /* 38fedf805SBibby Hsieh * Copyright (c) 2019 MediaTek Inc. 48fedf805SBibby Hsieh * Author: Bibby Hsieh <bibby.hsieh@mediatek.com> 58fedf805SBibby Hsieh * 68fedf805SBibby Hsieh */ 78fedf805SBibby Hsieh 88fedf805SBibby Hsieh #ifndef _DT_BINDINGS_GCE_MT8183_H 98fedf805SBibby Hsieh #define _DT_BINDINGS_GCE_MT8183_H 108fedf805SBibby Hsieh 118fedf805SBibby Hsieh #define CMDQ_NO_TIMEOUT 0xffffffff 128fedf805SBibby Hsieh 138fedf805SBibby Hsieh /* GCE HW thread priority */ 148fedf805SBibby Hsieh #define CMDQ_THR_PRIO_LOWEST 0 158fedf805SBibby Hsieh #define CMDQ_THR_PRIO_HIGHEST 1 168fedf805SBibby Hsieh 178fedf805SBibby Hsieh /* GCE SUBSYS */ 188fedf805SBibby Hsieh #define SUBSYS_1300XXXX 0 198fedf805SBibby Hsieh #define SUBSYS_1400XXXX 1 208fedf805SBibby Hsieh #define SUBSYS_1401XXXX 2 218fedf805SBibby Hsieh #define SUBSYS_1402XXXX 3 228fedf805SBibby Hsieh #define SUBSYS_1502XXXX 4 238fedf805SBibby Hsieh #define SUBSYS_1880XXXX 5 248fedf805SBibby Hsieh #define SUBSYS_1881XXXX 6 258fedf805SBibby Hsieh #define SUBSYS_1882XXXX 7 268fedf805SBibby Hsieh #define SUBSYS_1883XXXX 8 278fedf805SBibby Hsieh #define SUBSYS_1884XXXX 9 288fedf805SBibby Hsieh #define SUBSYS_1000XXXX 10 298fedf805SBibby Hsieh #define SUBSYS_1001XXXX 11 308fedf805SBibby Hsieh #define SUBSYS_1002XXXX 12 318fedf805SBibby Hsieh #define SUBSYS_1003XXXX 13 328fedf805SBibby Hsieh #define SUBSYS_1004XXXX 14 338fedf805SBibby Hsieh #define SUBSYS_1005XXXX 15 348fedf805SBibby Hsieh #define SUBSYS_1020XXXX 16 358fedf805SBibby Hsieh #define SUBSYS_1028XXXX 17 368fedf805SBibby Hsieh #define SUBSYS_1700XXXX 18 378fedf805SBibby Hsieh #define SUBSYS_1701XXXX 19 388fedf805SBibby Hsieh #define SUBSYS_1702XXXX 20 398fedf805SBibby Hsieh #define SUBSYS_1703XXXX 21 408fedf805SBibby Hsieh #define SUBSYS_1800XXXX 22 418fedf805SBibby Hsieh #define SUBSYS_1801XXXX 23 428fedf805SBibby Hsieh #define SUBSYS_1802XXXX 24 438fedf805SBibby Hsieh #define SUBSYS_1804XXXX 25 448fedf805SBibby Hsieh #define SUBSYS_1805XXXX 26 458fedf805SBibby Hsieh #define SUBSYS_1808XXXX 27 468fedf805SBibby Hsieh #define SUBSYS_180aXXXX 28 478fedf805SBibby Hsieh #define SUBSYS_180bXXXX 29 488fedf805SBibby Hsieh 498fedf805SBibby Hsieh #define CMDQ_EVENT_DISP_RDMA0_SOF 0 508fedf805SBibby Hsieh #define CMDQ_EVENT_DISP_RDMA1_SOF 1 518fedf805SBibby Hsieh #define CMDQ_EVENT_MDP_RDMA0_SOF 2 528fedf805SBibby Hsieh #define CMDQ_EVENT_MDP_RSZ0_SOF 4 538fedf805SBibby Hsieh #define CMDQ_EVENT_MDP_RSZ1_SOF 5 548fedf805SBibby Hsieh #define CMDQ_EVENT_MDP_TDSHP_SOF 6 558fedf805SBibby Hsieh #define CMDQ_EVENT_MDP_WROT0_SOF 7 568fedf805SBibby Hsieh #define CMDQ_EVENT_MDP_WDMA0_SOF 8 578fedf805SBibby Hsieh #define CMDQ_EVENT_DISP_OVL0_SOF 9 588fedf805SBibby Hsieh #define CMDQ_EVENT_DISP_OVL0_2L_SOF 10 598fedf805SBibby Hsieh #define CMDQ_EVENT_DISP_OVL1_2L_SOF 11 608fedf805SBibby Hsieh #define CMDQ_EVENT_DISP_WDMA0_SOF 12 618fedf805SBibby Hsieh #define CMDQ_EVENT_DISP_COLOR0_SOF 13 628fedf805SBibby Hsieh #define CMDQ_EVENT_DISP_CCORR0_SOF 14 638fedf805SBibby Hsieh #define CMDQ_EVENT_DISP_AAL0_SOF 15 648fedf805SBibby Hsieh #define CMDQ_EVENT_DISP_GAMMA0_SOF 16 658fedf805SBibby Hsieh #define CMDQ_EVENT_DISP_DITHER0_SOF 17 668fedf805SBibby Hsieh #define CMDQ_EVENT_DISP_PWM0_SOF 18 678fedf805SBibby Hsieh #define CMDQ_EVENT_DISP_DSI0_SOF 19 688fedf805SBibby Hsieh #define CMDQ_EVENT_DISP_DPI0_SOF 20 698fedf805SBibby Hsieh #define CMDQ_EVENT_DISP_RSZ_SOF 22 708fedf805SBibby Hsieh #define CMDQ_EVENT_MDP_AAL_SOF 23 718fedf805SBibby Hsieh #define CMDQ_EVENT_MDP_CCORR_SOF 24 728fedf805SBibby Hsieh #define CMDQ_EVENT_DISP_DBI_SOF 25 738fedf805SBibby Hsieh #define CMDQ_EVENT_DISP_RDMA0_EOF 26 748fedf805SBibby Hsieh #define CMDQ_EVENT_DISP_RDMA1_EOF 27 758fedf805SBibby Hsieh #define CMDQ_EVENT_MDP_RDMA0_EOF 28 768fedf805SBibby Hsieh #define CMDQ_EVENT_MDP_RSZ0_EOF 30 778fedf805SBibby Hsieh #define CMDQ_EVENT_MDP_RSZ1_EOF 31 788fedf805SBibby Hsieh #define CMDQ_EVENT_MDP_TDSHP_EOF 32 798fedf805SBibby Hsieh #define CMDQ_EVENT_MDP_WROT0_EOF 33 808fedf805SBibby Hsieh #define CMDQ_EVENT_MDP_WDMA0_EOF 34 818fedf805SBibby Hsieh #define CMDQ_EVENT_DISP_OVL0_EOF 35 828fedf805SBibby Hsieh #define CMDQ_EVENT_DISP_OVL0_2L_EOF 36 838fedf805SBibby Hsieh #define CMDQ_EVENT_DISP_OVL1_2L_EOF 37 848fedf805SBibby Hsieh #define CMDQ_EVENT_DISP_WDMA0_EOF 38 858fedf805SBibby Hsieh #define CMDQ_EVENT_DISP_COLOR0_EOF 39 868fedf805SBibby Hsieh #define CMDQ_EVENT_DISP_CCORR0_EOF 40 878fedf805SBibby Hsieh #define CMDQ_EVENT_DISP_AAL0_EOF 41 888fedf805SBibby Hsieh #define CMDQ_EVENT_DISP_GAMMA0_EOF 42 898fedf805SBibby Hsieh #define CMDQ_EVENT_DISP_DITHER0_EOF 43 908fedf805SBibby Hsieh #define CMDQ_EVENT_DSI0_EOF 44 918fedf805SBibby Hsieh #define CMDQ_EVENT_DPI0_EOF 45 928fedf805SBibby Hsieh #define CMDQ_EVENT_DISP_RSZ_EOF 47 938fedf805SBibby Hsieh #define CMDQ_EVENT_MDP_AAL_EOF 48 948fedf805SBibby Hsieh #define CMDQ_EVENT_MDP_CCORR_EOF 49 958fedf805SBibby Hsieh #define CMDQ_EVENT_DBI_EOF 50 968fedf805SBibby Hsieh #define CMDQ_EVENT_MUTEX_STREAM_DONE0 130 978fedf805SBibby Hsieh #define CMDQ_EVENT_MUTEX_STREAM_DONE1 131 988fedf805SBibby Hsieh #define CMDQ_EVENT_MUTEX_STREAM_DONE2 132 998fedf805SBibby Hsieh #define CMDQ_EVENT_MUTEX_STREAM_DONE3 133 1008fedf805SBibby Hsieh #define CMDQ_EVENT_MUTEX_STREAM_DONE4 134 1018fedf805SBibby Hsieh #define CMDQ_EVENT_MUTEX_STREAM_DONE5 135 1028fedf805SBibby Hsieh #define CMDQ_EVENT_MUTEX_STREAM_DONE6 136 1038fedf805SBibby Hsieh #define CMDQ_EVENT_MUTEX_STREAM_DONE7 137 1048fedf805SBibby Hsieh #define CMDQ_EVENT_MUTEX_STREAM_DONE8 138 1058fedf805SBibby Hsieh #define CMDQ_EVENT_MUTEX_STREAM_DONE9 139 1068fedf805SBibby Hsieh #define CMDQ_EVENT_MUTEX_STREAM_DONE10 140 1078fedf805SBibby Hsieh #define CMDQ_EVENT_MUTEX_STREAM_DONE11 141 1088fedf805SBibby Hsieh #define CMDQ_EVENT_DISP_RDMA0_BUF_UNDERRUN_EVEN 142 1098fedf805SBibby Hsieh #define CMDQ_EVENT_DISP_RDMA1_BUF_UNDERRUN_EVEN 143 1108fedf805SBibby Hsieh #define CMDQ_EVENT_DSI0_TE_EVENT 144 1118fedf805SBibby Hsieh #define CMDQ_EVENT_DSI0_IRQ_EVENT 145 1128fedf805SBibby Hsieh #define CMDQ_EVENT_DSI0_DONE_EVENT 146 1138fedf805SBibby Hsieh #define CMDQ_EVENT_DISP_WDMA0_SW_RST_DONE 150 1148fedf805SBibby Hsieh #define CMDQ_EVENT_MDP_WDMA_SW_RST_DONE 151 1158fedf805SBibby Hsieh #define CMDQ_EVENT_MDP_WROT0_SW_RST_DONE 152 1168fedf805SBibby Hsieh #define CMDQ_EVENT_MDP_RDMA0_SW_RST_DONE 154 1178fedf805SBibby Hsieh #define CMDQ_EVENT_DISP_OVL0_FRAME_RST_DONE_PULE 155 1188fedf805SBibby Hsieh #define CMDQ_EVENT_DISP_OVL0_2L_FRAME_RST_DONE_ULSE 156 1198fedf805SBibby Hsieh #define CMDQ_EVENT_DISP_OVL1_2L_FRAME_RST_DONE_ULSE 157 1208fedf805SBibby Hsieh #define CMDQ_EVENT_ISP_FRAME_DONE_P2_0 257 1218fedf805SBibby Hsieh #define CMDQ_EVENT_ISP_FRAME_DONE_P2_1 258 1228fedf805SBibby Hsieh #define CMDQ_EVENT_ISP_FRAME_DONE_P2_2 259 1238fedf805SBibby Hsieh #define CMDQ_EVENT_ISP_FRAME_DONE_P2_3 260 1248fedf805SBibby Hsieh #define CMDQ_EVENT_ISP_FRAME_DONE_P2_4 261 1258fedf805SBibby Hsieh #define CMDQ_EVENT_ISP_FRAME_DONE_P2_5 262 1268fedf805SBibby Hsieh #define CMDQ_EVENT_ISP_FRAME_DONE_P2_6 263 1278fedf805SBibby Hsieh #define CMDQ_EVENT_ISP_FRAME_DONE_P2_7 264 1288fedf805SBibby Hsieh #define CMDQ_EVENT_ISP_FRAME_DONE_P2_8 265 1298fedf805SBibby Hsieh #define CMDQ_EVENT_ISP_FRAME_DONE_P2_9 266 1308fedf805SBibby Hsieh #define CMDQ_EVENT_ISP_FRAME_DONE_P2_10 267 1318fedf805SBibby Hsieh #define CMDQ_EVENT_ISP_FRAME_DONE_P2_11 268 1328fedf805SBibby Hsieh #define CMDQ_EVENT_ISP_FRAME_DONE_P2_12 269 1338fedf805SBibby Hsieh #define CMDQ_EVENT_ISP_FRAME_DONE_P2_13 270 1348fedf805SBibby Hsieh #define CMDQ_EVENT_ISP_FRAME_DONE_P2_14 271 1358fedf805SBibby Hsieh #define CMDQ_EVENT_ISP_FRAME_DONE_P2_15 272 1368fedf805SBibby Hsieh #define CMDQ_EVENT_ISP_FRAME_DONE_P2_16 273 1378fedf805SBibby Hsieh #define CMDQ_EVENT_ISP_FRAME_DONE_P2_17 274 1388fedf805SBibby Hsieh #define CMDQ_EVENT_ISP_FRAME_DONE_P2_18 275 1398fedf805SBibby Hsieh #define CMDQ_EVENT_AMD_FRAME_DONE 276 1408fedf805SBibby Hsieh #define CMDQ_EVENT_DVE_DONE 277 1418fedf805SBibby Hsieh #define CMDQ_EVENT_WMFE_DONE 278 1428fedf805SBibby Hsieh #define CMDQ_EVENT_RSC_DONE 279 1438fedf805SBibby Hsieh #define CMDQ_EVENT_MFB_DONE 280 1448fedf805SBibby Hsieh #define CMDQ_EVENT_WPE_A_DONE 281 1458fedf805SBibby Hsieh #define CMDQ_EVENT_SPE_B_DONE 282 1468fedf805SBibby Hsieh #define CMDQ_EVENT_OCC_DONE 283 1478fedf805SBibby Hsieh #define CMDQ_EVENT_VENC_CMDQ_FRAME_DONE 289 1488fedf805SBibby Hsieh #define CMDQ_EVENT_JPG_ENC_CMDQ_DONE 290 1498fedf805SBibby Hsieh #define CMDQ_EVENT_JPG_DEC_CMDQ_DONE 291 1508fedf805SBibby Hsieh #define CMDQ_EVENT_VENC_CMDQ_MB_DONE 292 1518fedf805SBibby Hsieh #define CMDQ_EVENT_VENC_CMDQ_128BYTE_DONE 293 1528fedf805SBibby Hsieh #define CMDQ_EVENT_ISP_FRAME_DONE_A 321 1538fedf805SBibby Hsieh #define CMDQ_EVENT_ISP_FRAME_DONE_B 322 1548fedf805SBibby Hsieh #define CMDQ_EVENT_CAMSV0_PASS1_DONE 323 1558fedf805SBibby Hsieh #define CMDQ_EVENT_CAMSV1_PASS1_DONE 324 1568fedf805SBibby Hsieh #define CMDQ_EVENT_CAMSV2_PASS1_DONE 325 1578fedf805SBibby Hsieh #define CMDQ_EVENT_TSF_DONE 326 1588fedf805SBibby Hsieh #define CMDQ_EVENT_SENINF_CAM0_FIFO_FULL 327 1598fedf805SBibby Hsieh #define CMDQ_EVENT_SENINF_CAM1_FIFO_FULL 328 1608fedf805SBibby Hsieh #define CMDQ_EVENT_SENINF_CAM2_FIFO_FULL 329 1618fedf805SBibby Hsieh #define CMDQ_EVENT_SENINF_CAM3_FIFO_FULL 330 1628fedf805SBibby Hsieh #define CMDQ_EVENT_SENINF_CAM4_FIFO_FULL 331 1638fedf805SBibby Hsieh #define CMDQ_EVENT_SENINF_CAM5_FIFO_FULL 332 1648fedf805SBibby Hsieh #define CMDQ_EVENT_SENINF_CAM6_FIFO_FULL 333 1658fedf805SBibby Hsieh #define CMDQ_EVENT_SENINF_CAM7_FIFO_FULL 334 1668fedf805SBibby Hsieh #define CMDQ_EVENT_IPU_CORE0_DONE0 353 1678fedf805SBibby Hsieh #define CMDQ_EVENT_IPU_CORE0_DONE1 354 1688fedf805SBibby Hsieh #define CMDQ_EVENT_IPU_CORE0_DONE2 355 1698fedf805SBibby Hsieh #define CMDQ_EVENT_IPU_CORE0_DONE3 356 1708fedf805SBibby Hsieh #define CMDQ_EVENT_IPU_CORE1_DONE0 385 1718fedf805SBibby Hsieh #define CMDQ_EVENT_IPU_CORE1_DONE1 386 1728fedf805SBibby Hsieh #define CMDQ_EVENT_IPU_CORE1_DONE2 387 1738fedf805SBibby Hsieh #define CMDQ_EVENT_IPU_CORE1_DONE3 388 1748fedf805SBibby Hsieh 1758fedf805SBibby Hsieh #endif 176