1*440b075bSKrzysztof Kozlowski /* SPDX-License-Identifier: (GPL-2.0+ OR MIT) */
2fb038ce4SYangtao Li /*
3fb038ce4SYangtao Li  * Copyright (c) 2020 Yangtao Li <frank@allwinnertech.com>
4fb038ce4SYangtao Li  */
5fb038ce4SYangtao Li 
6fb038ce4SYangtao Li #ifndef _DT_BINDINGS_CLK_SUN50I_A100_H_
7fb038ce4SYangtao Li #define _DT_BINDINGS_CLK_SUN50I_A100_H_
8fb038ce4SYangtao Li 
9fb038ce4SYangtao Li #define CLK_PLL_PERIPH0		3
10fb038ce4SYangtao Li 
11fb038ce4SYangtao Li #define CLK_CPUX		24
12fb038ce4SYangtao Li 
13fb038ce4SYangtao Li #define CLK_APB1		29
14fb038ce4SYangtao Li 
15fb038ce4SYangtao Li #define CLK_MBUS		31
16fb038ce4SYangtao Li #define CLK_DE			32
17fb038ce4SYangtao Li #define CLK_BUS_DE		33
18fb038ce4SYangtao Li #define CLK_G2D			34
19fb038ce4SYangtao Li #define CLK_BUS_G2D		35
20fb038ce4SYangtao Li #define CLK_GPU			36
21fb038ce4SYangtao Li #define CLK_BUS_GPU		37
22fb038ce4SYangtao Li #define CLK_CE			38
23fb038ce4SYangtao Li #define CLK_BUS_CE		39
24fb038ce4SYangtao Li #define CLK_VE			40
25fb038ce4SYangtao Li #define CLK_BUS_VE		41
26fb038ce4SYangtao Li #define CLK_BUS_DMA		42
27fb038ce4SYangtao Li #define CLK_BUS_MSGBOX		43
28fb038ce4SYangtao Li #define CLK_BUS_SPINLOCK	44
29fb038ce4SYangtao Li #define CLK_BUS_HSTIMER		45
30fb038ce4SYangtao Li #define CLK_AVS			46
31fb038ce4SYangtao Li #define CLK_BUS_DBG		47
32fb038ce4SYangtao Li #define CLK_BUS_PSI		48
33fb038ce4SYangtao Li #define CLK_BUS_PWM		49
34fb038ce4SYangtao Li #define CLK_BUS_IOMMU		50
35fb038ce4SYangtao Li #define CLK_MBUS_DMA		51
36fb038ce4SYangtao Li #define CLK_MBUS_VE		52
37fb038ce4SYangtao Li #define CLK_MBUS_CE		53
38fb038ce4SYangtao Li #define CLK_MBUS_NAND		54
39fb038ce4SYangtao Li #define CLK_MBUS_CSI		55
40fb038ce4SYangtao Li #define CLK_MBUS_ISP		56
41fb038ce4SYangtao Li #define CLK_MBUS_G2D		57
42fb038ce4SYangtao Li 
43fb038ce4SYangtao Li #define CLK_NAND0		59
44fb038ce4SYangtao Li #define CLK_NAND1		60
45fb038ce4SYangtao Li #define CLK_BUS_NAND		61
46fb038ce4SYangtao Li #define CLK_MMC0		62
47fb038ce4SYangtao Li #define CLK_MMC1		63
48fb038ce4SYangtao Li #define CLK_MMC2		64
49fb038ce4SYangtao Li #define CLK_MMC3		65
50fb038ce4SYangtao Li #define CLK_BUS_MMC0		66
51fb038ce4SYangtao Li #define CLK_BUS_MMC1		67
52fb038ce4SYangtao Li #define CLK_BUS_MMC2		68
53fb038ce4SYangtao Li #define CLK_BUS_UART0		69
54fb038ce4SYangtao Li #define CLK_BUS_UART1		70
55fb038ce4SYangtao Li #define CLK_BUS_UART2		71
56fb038ce4SYangtao Li #define CLK_BUS_UART3		72
57fb038ce4SYangtao Li #define CLK_BUS_UART4		73
58fb038ce4SYangtao Li #define CLK_BUS_I2C0		74
59fb038ce4SYangtao Li #define CLK_BUS_I2C1		75
60fb038ce4SYangtao Li #define CLK_BUS_I2C2		76
61fb038ce4SYangtao Li #define CLK_BUS_I2C3		77
62fb038ce4SYangtao Li #define CLK_SPI0		78
63fb038ce4SYangtao Li #define CLK_SPI1		79
64fb038ce4SYangtao Li #define CLK_SPI2		80
65fb038ce4SYangtao Li #define CLK_BUS_SPI0		81
66fb038ce4SYangtao Li #define CLK_BUS_SPI1		82
67fb038ce4SYangtao Li #define CLK_BUS_SPI2		83
68fb038ce4SYangtao Li #define CLK_EMAC_25M		84
69fb038ce4SYangtao Li #define CLK_BUS_EMAC		85
70fb038ce4SYangtao Li #define CLK_IR_RX		86
71fb038ce4SYangtao Li #define CLK_BUS_IR_RX		87
72fb038ce4SYangtao Li #define CLK_IR_TX		88
73fb038ce4SYangtao Li #define CLK_BUS_IR_TX		89
74fb038ce4SYangtao Li #define CLK_BUS_GPADC		90
75fb038ce4SYangtao Li #define CLK_BUS_THS		91
76fb038ce4SYangtao Li #define CLK_I2S0		92
77fb038ce4SYangtao Li #define CLK_I2S1		93
78fb038ce4SYangtao Li #define CLK_I2S2		94
79fb038ce4SYangtao Li #define CLK_I2S3		95
80fb038ce4SYangtao Li #define CLK_BUS_I2S0		96
81fb038ce4SYangtao Li #define CLK_BUS_I2S1		97
82fb038ce4SYangtao Li #define CLK_BUS_I2S2		98
83fb038ce4SYangtao Li #define CLK_BUS_I2S3		99
84fb038ce4SYangtao Li #define CLK_SPDIF		100
85fb038ce4SYangtao Li #define CLK_BUS_SPDIF		101
86fb038ce4SYangtao Li #define CLK_DMIC		102
87fb038ce4SYangtao Li #define CLK_BUS_DMIC		103
88fb038ce4SYangtao Li #define CLK_AUDIO_DAC		104
89fb038ce4SYangtao Li #define CLK_AUDIO_ADC		105
90fb038ce4SYangtao Li #define CLK_AUDIO_4X		106
91fb038ce4SYangtao Li #define CLK_BUS_AUDIO_CODEC	107
92fb038ce4SYangtao Li #define CLK_USB_OHCI0		108
93fb038ce4SYangtao Li #define CLK_USB_PHY0		109
94fb038ce4SYangtao Li #define CLK_USB_OHCI1		110
95fb038ce4SYangtao Li #define CLK_USB_PHY1		111
96fb038ce4SYangtao Li #define CLK_BUS_OHCI0		112
97fb038ce4SYangtao Li #define CLK_BUS_OHCI1		113
98fb038ce4SYangtao Li #define CLK_BUS_EHCI0		114
99fb038ce4SYangtao Li #define CLK_BUS_EHCI1		115
100fb038ce4SYangtao Li #define CLK_BUS_OTG		116
101fb038ce4SYangtao Li #define CLK_BUS_LRADC		117
102fb038ce4SYangtao Li #define CLK_BUS_DPSS_TOP0	118
103fb038ce4SYangtao Li #define CLK_BUS_DPSS_TOP1	119
104fb038ce4SYangtao Li #define CLK_MIPI_DSI		120
105fb038ce4SYangtao Li #define CLK_BUS_MIPI_DSI	121
106fb038ce4SYangtao Li #define CLK_TCON_LCD		122
107fb038ce4SYangtao Li #define CLK_BUS_TCON_LCD	123
108fb038ce4SYangtao Li #define CLK_LEDC		124
109fb038ce4SYangtao Li #define CLK_BUS_LEDC		125
110fb038ce4SYangtao Li #define CLK_CSI_TOP		126
111fb038ce4SYangtao Li #define CLK_CSI0_MCLK		127
112fb038ce4SYangtao Li #define CLK_CSI1_MCLK		128
113fb038ce4SYangtao Li #define CLK_BUS_CSI		129
114fb038ce4SYangtao Li #define CLK_CSI_ISP		130
115fb038ce4SYangtao Li 
116fb038ce4SYangtao Li #endif /* _DT_BINDINGS_CLK_SUN50I_A100_H_ */
117