1f8b50363SGabriel Fernandez /* 2f8b50363SGabriel Fernandez * stm32fx-clock.h 3f8b50363SGabriel Fernandez * 4f8b50363SGabriel Fernandez * Copyright (C) 2016 STMicroelectronics 5f8b50363SGabriel Fernandez * Author: Gabriel Fernandez for STMicroelectronics. 6f8b50363SGabriel Fernandez * License terms: GNU General Public License (GPL), version 2 7f8b50363SGabriel Fernandez */ 8f8b50363SGabriel Fernandez 9f8b50363SGabriel Fernandez /* 10f8b50363SGabriel Fernandez * List of clocks wich are not derived from system clock (SYSCLOCK) 11f8b50363SGabriel Fernandez * 12f8b50363SGabriel Fernandez * The index of these clocks is the secondary index of DT bindings 13f8b50363SGabriel Fernandez * (see Documentatoin/devicetree/bindings/clock/st,stm32-rcc.txt) 14f8b50363SGabriel Fernandez * 15f8b50363SGabriel Fernandez * e.g: 16f8b50363SGabriel Fernandez <assigned-clocks = <&rcc 1 CLK_LSE>; 17f8b50363SGabriel Fernandez */ 18f8b50363SGabriel Fernandez 19f8b50363SGabriel Fernandez #ifndef _DT_BINDINGS_CLK_STMFX_H 20f8b50363SGabriel Fernandez #define _DT_BINDINGS_CLK_STMFX_H 21f8b50363SGabriel Fernandez 22f8b50363SGabriel Fernandez #define SYSTICK 0 23f8b50363SGabriel Fernandez #define FCLK 1 24f8b50363SGabriel Fernandez #define CLK_LSI 2 25f8b50363SGabriel Fernandez #define CLK_LSE 3 26f8b50363SGabriel Fernandez #define CLK_HSE_RTC 4 27f8b50363SGabriel Fernandez #define CLK_RTC 5 28f8b50363SGabriel Fernandez #define PLL_VCO_I2S 6 29f8b50363SGabriel Fernandez #define PLL_VCO_SAI 7 30f8b50363SGabriel Fernandez #define CLK_LCD 8 31f8b50363SGabriel Fernandez #define CLK_I2S 9 32f8b50363SGabriel Fernandez #define CLK_SAI1 10 33f8b50363SGabriel Fernandez #define CLK_SAI2 11 34f8b50363SGabriel Fernandez #define CLK_I2SQ_PDIV 12 35f8b50363SGabriel Fernandez #define CLK_SAIQ_PDIV 13 36f8b50363SGabriel Fernandez 37f8b50363SGabriel Fernandez #define END_PRIMARY_CLK 14 38f8b50363SGabriel Fernandez 3952af8557SGabriel Fernandez #define CLK_HSI 14 4052af8557SGabriel Fernandez #define CLK_SYSCLK 15 4152af8557SGabriel Fernandez #define CLK_HDMI_CEC 16 4252af8557SGabriel Fernandez #define CLK_SPDIF 17 4352af8557SGabriel Fernandez #define CLK_USART1 18 4452af8557SGabriel Fernandez #define CLK_USART2 19 4552af8557SGabriel Fernandez #define CLK_USART3 20 4652af8557SGabriel Fernandez #define CLK_UART4 21 4752af8557SGabriel Fernandez #define CLK_UART5 22 4852af8557SGabriel Fernandez #define CLK_USART6 23 4952af8557SGabriel Fernandez #define CLK_UART7 24 5052af8557SGabriel Fernandez #define CLK_UART8 25 5152af8557SGabriel Fernandez #define CLK_I2C1 26 5252af8557SGabriel Fernandez #define CLK_I2C2 27 5352af8557SGabriel Fernandez #define CLK_I2C3 28 5452af8557SGabriel Fernandez #define CLK_I2C4 29 5552af8557SGabriel Fernandez #define CLK_LPTIMER 30 5652af8557SGabriel Fernandez 5752af8557SGabriel Fernandez #define END_PRIMARY_CLK_F7 31 5852af8557SGabriel Fernandez 59f8b50363SGabriel Fernandez #endif 60