1b2441318SGreg Kroah-Hartman /* SPDX-License-Identifier: GPL-2.0 */
21befe7e4SGabriel FERNANDEZ /*
31befe7e4SGabriel FERNANDEZ  * This header provides constants clk index STMicroelectronics
41befe7e4SGabriel FERNANDEZ  * STiH407 SoC.
51befe7e4SGabriel FERNANDEZ  */
61befe7e4SGabriel FERNANDEZ #ifndef _DT_BINDINGS_CLK_STIH407
71befe7e4SGabriel FERNANDEZ #define _DT_BINDINGS_CLK_STIH407
81befe7e4SGabriel FERNANDEZ 
96cb4f8ddSLee Jones /* CLOCKGEN A0 */
106cb4f8ddSLee Jones #define CLK_IC_LMI0		0
116cb4f8ddSLee Jones #define CLK_IC_LMI1		1
126cb4f8ddSLee Jones 
131befe7e4SGabriel FERNANDEZ /* CLOCKGEN C0 */
1477deed2bSGabriel FERNANDEZ #define CLK_ICN_GPU		0
1577deed2bSGabriel FERNANDEZ #define CLK_FDMA		1
1677deed2bSGabriel FERNANDEZ #define CLK_NAND		2
1777deed2bSGabriel FERNANDEZ #define CLK_HVA			3
1877deed2bSGabriel FERNANDEZ #define CLK_PROC_STFE		4
1977deed2bSGabriel FERNANDEZ #define CLK_PROC_TP		5
2077deed2bSGabriel FERNANDEZ #define CLK_RX_ICN_DMU		6
2177deed2bSGabriel FERNANDEZ #define CLK_RX_ICN_DISP_0	6
2277deed2bSGabriel FERNANDEZ #define CLK_RX_ICN_DISP_1	6
2377deed2bSGabriel FERNANDEZ #define CLK_RX_ICN_HVA		7
2477deed2bSGabriel FERNANDEZ #define CLK_RX_ICN_TS		7
2577deed2bSGabriel FERNANDEZ #define CLK_ICN_CPU		8
2677deed2bSGabriel FERNANDEZ #define CLK_TX_ICN_DMU		9
2777deed2bSGabriel FERNANDEZ #define CLK_TX_ICN_HVA		9
2877deed2bSGabriel FERNANDEZ #define CLK_TX_ICN_TS		9
2977deed2bSGabriel FERNANDEZ #define CLK_ICN_COMPO		9
3077deed2bSGabriel FERNANDEZ #define CLK_MMC_0		10
3177deed2bSGabriel FERNANDEZ #define CLK_MMC_1		11
3277deed2bSGabriel FERNANDEZ #define CLK_JPEGDEC		12
3377deed2bSGabriel FERNANDEZ #define CLK_ICN_REG		13
3477deed2bSGabriel FERNANDEZ #define CLK_TRACE_A9		13
3577deed2bSGabriel FERNANDEZ #define CLK_PTI_STM		13
361befe7e4SGabriel FERNANDEZ #define CLK_EXT2F_A9		13
3777deed2bSGabriel FERNANDEZ #define CLK_IC_BDISP_0		14
3877deed2bSGabriel FERNANDEZ #define CLK_IC_BDISP_1		15
3977deed2bSGabriel FERNANDEZ #define CLK_PP_DMU		16
4077deed2bSGabriel FERNANDEZ #define CLK_VID_DMU		17
4177deed2bSGabriel FERNANDEZ #define CLK_DSS_LPC		18
4277deed2bSGabriel FERNANDEZ #define CLK_ST231_AUD_0		19
4377deed2bSGabriel FERNANDEZ #define CLK_ST231_GP_0		19
4477deed2bSGabriel FERNANDEZ #define CLK_ST231_GP_1		20
4577deed2bSGabriel FERNANDEZ #define CLK_ST231_DMU		21
4677deed2bSGabriel FERNANDEZ #define CLK_ICN_LMI		22
4777deed2bSGabriel FERNANDEZ #define CLK_TX_ICN_DISP_0	23
4877deed2bSGabriel FERNANDEZ #define CLK_TX_ICN_DISP_1	23
4977deed2bSGabriel FERNANDEZ #define CLK_ICN_SBC		24
5077deed2bSGabriel FERNANDEZ #define CLK_STFE_FRC2		25
5177deed2bSGabriel FERNANDEZ #define CLK_ETH_PHY		26
5277deed2bSGabriel FERNANDEZ #define CLK_ETH_REF_PHYCLK	27
5377deed2bSGabriel FERNANDEZ #define CLK_FLASH_PROMIP	28
5477deed2bSGabriel FERNANDEZ #define CLK_MAIN_DISP		29
5577deed2bSGabriel FERNANDEZ #define CLK_AUX_DISP		30
5677deed2bSGabriel FERNANDEZ #define CLK_COMPO_DVP		31
571befe7e4SGabriel FERNANDEZ 
5877deed2bSGabriel FERNANDEZ /* CLOCKGEN D0 */
5977deed2bSGabriel FERNANDEZ #define CLK_PCM_0		0
6077deed2bSGabriel FERNANDEZ #define CLK_PCM_1		1
6177deed2bSGabriel FERNANDEZ #define CLK_PCM_2		2
6277deed2bSGabriel FERNANDEZ #define CLK_SPDIFF		3
6377deed2bSGabriel FERNANDEZ 
6477deed2bSGabriel FERNANDEZ /* CLOCKGEN D2 */
6577deed2bSGabriel FERNANDEZ #define CLK_PIX_MAIN_DISP	0
6677deed2bSGabriel FERNANDEZ #define CLK_PIX_PIP		1
6777deed2bSGabriel FERNANDEZ #define CLK_PIX_GDP1		2
6877deed2bSGabriel FERNANDEZ #define CLK_PIX_GDP2		3
6977deed2bSGabriel FERNANDEZ #define CLK_PIX_GDP3		4
7077deed2bSGabriel FERNANDEZ #define CLK_PIX_GDP4		5
7177deed2bSGabriel FERNANDEZ #define CLK_PIX_AUX_DISP	6
7277deed2bSGabriel FERNANDEZ #define CLK_DENC		7
7377deed2bSGabriel FERNANDEZ #define CLK_PIX_HDDAC		8
7477deed2bSGabriel FERNANDEZ #define CLK_HDDAC		9
7577deed2bSGabriel FERNANDEZ #define CLK_SDDAC		10
7677deed2bSGabriel FERNANDEZ #define CLK_PIX_DVO		11
7777deed2bSGabriel FERNANDEZ #define CLK_DVO			12
7877deed2bSGabriel FERNANDEZ #define CLK_PIX_HDMI		13
7977deed2bSGabriel FERNANDEZ #define CLK_TMDS_HDMI		14
8077deed2bSGabriel FERNANDEZ #define CLK_REF_HDMIPHY		15
8177deed2bSGabriel FERNANDEZ 
8277deed2bSGabriel FERNANDEZ /* CLOCKGEN D3 */
8377deed2bSGabriel FERNANDEZ #define CLK_STFE_FRC1		0
8477deed2bSGabriel FERNANDEZ #define CLK_TSOUT_0		1
8577deed2bSGabriel FERNANDEZ #define CLK_TSOUT_1		2
8677deed2bSGabriel FERNANDEZ #define CLK_MCHI		3
8777deed2bSGabriel FERNANDEZ #define CLK_VSENS_COMPO		4
8877deed2bSGabriel FERNANDEZ #define CLK_FRC1_REMOTE		5
8977deed2bSGabriel FERNANDEZ #define CLK_LPC_0		6
9077deed2bSGabriel FERNANDEZ #define CLK_LPC_1		7
911befe7e4SGabriel FERNANDEZ #endif
92