17fce1e39SEmil Renner Berthing /* SPDX-License-Identifier: GPL-2.0 OR MIT */ 27fce1e39SEmil Renner Berthing /* 37fce1e39SEmil Renner Berthing * Copyright 2022 Emil Renner Berthing <kernel@esmil.dk> 4*14b14a57SXingyu Wu * Copyright 2022 StarFive Technology Co., Ltd. 57fce1e39SEmil Renner Berthing */ 67fce1e39SEmil Renner Berthing 77fce1e39SEmil Renner Berthing #ifndef __DT_BINDINGS_CLOCK_STARFIVE_JH7110_CRG_H__ 87fce1e39SEmil Renner Berthing #define __DT_BINDINGS_CLOCK_STARFIVE_JH7110_CRG_H__ 97fce1e39SEmil Renner Berthing 10bd348ca2SXingyu Wu /* PLL clocks */ 11bd348ca2SXingyu Wu #define JH7110_PLLCLK_PLL0_OUT 0 12bd348ca2SXingyu Wu #define JH7110_PLLCLK_PLL1_OUT 1 13bd348ca2SXingyu Wu #define JH7110_PLLCLK_PLL2_OUT 2 14bd348ca2SXingyu Wu #define JH7110_PLLCLK_END 3 15bd348ca2SXingyu Wu 167fce1e39SEmil Renner Berthing /* SYSCRG clocks */ 177fce1e39SEmil Renner Berthing #define JH7110_SYSCLK_CPU_ROOT 0 187fce1e39SEmil Renner Berthing #define JH7110_SYSCLK_CPU_CORE 1 197fce1e39SEmil Renner Berthing #define JH7110_SYSCLK_CPU_BUS 2 207fce1e39SEmil Renner Berthing #define JH7110_SYSCLK_GPU_ROOT 3 217fce1e39SEmil Renner Berthing #define JH7110_SYSCLK_PERH_ROOT 4 227fce1e39SEmil Renner Berthing #define JH7110_SYSCLK_BUS_ROOT 5 237fce1e39SEmil Renner Berthing #define JH7110_SYSCLK_NOCSTG_BUS 6 247fce1e39SEmil Renner Berthing #define JH7110_SYSCLK_AXI_CFG0 7 257fce1e39SEmil Renner Berthing #define JH7110_SYSCLK_STG_AXIAHB 8 267fce1e39SEmil Renner Berthing #define JH7110_SYSCLK_AHB0 9 277fce1e39SEmil Renner Berthing #define JH7110_SYSCLK_AHB1 10 287fce1e39SEmil Renner Berthing #define JH7110_SYSCLK_APB_BUS 11 297fce1e39SEmil Renner Berthing #define JH7110_SYSCLK_APB0 12 307fce1e39SEmil Renner Berthing #define JH7110_SYSCLK_PLL0_DIV2 13 317fce1e39SEmil Renner Berthing #define JH7110_SYSCLK_PLL1_DIV2 14 327fce1e39SEmil Renner Berthing #define JH7110_SYSCLK_PLL2_DIV2 15 337fce1e39SEmil Renner Berthing #define JH7110_SYSCLK_AUDIO_ROOT 16 347fce1e39SEmil Renner Berthing #define JH7110_SYSCLK_MCLK_INNER 17 357fce1e39SEmil Renner Berthing #define JH7110_SYSCLK_MCLK 18 367fce1e39SEmil Renner Berthing #define JH7110_SYSCLK_MCLK_OUT 19 377fce1e39SEmil Renner Berthing #define JH7110_SYSCLK_ISP_2X 20 387fce1e39SEmil Renner Berthing #define JH7110_SYSCLK_ISP_AXI 21 397fce1e39SEmil Renner Berthing #define JH7110_SYSCLK_GCLK0 22 407fce1e39SEmil Renner Berthing #define JH7110_SYSCLK_GCLK1 23 417fce1e39SEmil Renner Berthing #define JH7110_SYSCLK_GCLK2 24 427fce1e39SEmil Renner Berthing #define JH7110_SYSCLK_CORE 25 437fce1e39SEmil Renner Berthing #define JH7110_SYSCLK_CORE1 26 447fce1e39SEmil Renner Berthing #define JH7110_SYSCLK_CORE2 27 457fce1e39SEmil Renner Berthing #define JH7110_SYSCLK_CORE3 28 467fce1e39SEmil Renner Berthing #define JH7110_SYSCLK_CORE4 29 477fce1e39SEmil Renner Berthing #define JH7110_SYSCLK_DEBUG 30 487fce1e39SEmil Renner Berthing #define JH7110_SYSCLK_RTC_TOGGLE 31 497fce1e39SEmil Renner Berthing #define JH7110_SYSCLK_TRACE0 32 507fce1e39SEmil Renner Berthing #define JH7110_SYSCLK_TRACE1 33 517fce1e39SEmil Renner Berthing #define JH7110_SYSCLK_TRACE2 34 527fce1e39SEmil Renner Berthing #define JH7110_SYSCLK_TRACE3 35 537fce1e39SEmil Renner Berthing #define JH7110_SYSCLK_TRACE4 36 547fce1e39SEmil Renner Berthing #define JH7110_SYSCLK_TRACE_COM 37 557fce1e39SEmil Renner Berthing #define JH7110_SYSCLK_NOC_BUS_CPU_AXI 38 567fce1e39SEmil Renner Berthing #define JH7110_SYSCLK_NOC_BUS_AXICFG0_AXI 39 577fce1e39SEmil Renner Berthing #define JH7110_SYSCLK_OSC_DIV2 40 587fce1e39SEmil Renner Berthing #define JH7110_SYSCLK_PLL1_DIV4 41 597fce1e39SEmil Renner Berthing #define JH7110_SYSCLK_PLL1_DIV8 42 607fce1e39SEmil Renner Berthing #define JH7110_SYSCLK_DDR_BUS 43 617fce1e39SEmil Renner Berthing #define JH7110_SYSCLK_DDR_AXI 44 627fce1e39SEmil Renner Berthing #define JH7110_SYSCLK_GPU_CORE 45 637fce1e39SEmil Renner Berthing #define JH7110_SYSCLK_GPU_CORE_CLK 46 647fce1e39SEmil Renner Berthing #define JH7110_SYSCLK_GPU_SYS_CLK 47 657fce1e39SEmil Renner Berthing #define JH7110_SYSCLK_GPU_APB 48 667fce1e39SEmil Renner Berthing #define JH7110_SYSCLK_GPU_RTC_TOGGLE 49 677fce1e39SEmil Renner Berthing #define JH7110_SYSCLK_NOC_BUS_GPU_AXI 50 687fce1e39SEmil Renner Berthing #define JH7110_SYSCLK_ISP_TOP_CORE 51 697fce1e39SEmil Renner Berthing #define JH7110_SYSCLK_ISP_TOP_AXI 52 707fce1e39SEmil Renner Berthing #define JH7110_SYSCLK_NOC_BUS_ISP_AXI 53 717fce1e39SEmil Renner Berthing #define JH7110_SYSCLK_HIFI4_CORE 54 727fce1e39SEmil Renner Berthing #define JH7110_SYSCLK_HIFI4_AXI 55 737fce1e39SEmil Renner Berthing #define JH7110_SYSCLK_AXI_CFG1_MAIN 56 747fce1e39SEmil Renner Berthing #define JH7110_SYSCLK_AXI_CFG1_AHB 57 757fce1e39SEmil Renner Berthing #define JH7110_SYSCLK_VOUT_SRC 58 767fce1e39SEmil Renner Berthing #define JH7110_SYSCLK_VOUT_AXI 59 777fce1e39SEmil Renner Berthing #define JH7110_SYSCLK_NOC_BUS_DISP_AXI 60 787fce1e39SEmil Renner Berthing #define JH7110_SYSCLK_VOUT_TOP_AHB 61 797fce1e39SEmil Renner Berthing #define JH7110_SYSCLK_VOUT_TOP_AXI 62 807fce1e39SEmil Renner Berthing #define JH7110_SYSCLK_VOUT_TOP_HDMITX0_MCLK 63 817fce1e39SEmil Renner Berthing #define JH7110_SYSCLK_VOUT_TOP_MIPIPHY_REF 64 827fce1e39SEmil Renner Berthing #define JH7110_SYSCLK_JPEGC_AXI 65 837fce1e39SEmil Renner Berthing #define JH7110_SYSCLK_CODAJ12_AXI 66 847fce1e39SEmil Renner Berthing #define JH7110_SYSCLK_CODAJ12_CORE 67 857fce1e39SEmil Renner Berthing #define JH7110_SYSCLK_CODAJ12_APB 68 867fce1e39SEmil Renner Berthing #define JH7110_SYSCLK_VDEC_AXI 69 877fce1e39SEmil Renner Berthing #define JH7110_SYSCLK_WAVE511_AXI 70 887fce1e39SEmil Renner Berthing #define JH7110_SYSCLK_WAVE511_BPU 71 897fce1e39SEmil Renner Berthing #define JH7110_SYSCLK_WAVE511_VCE 72 907fce1e39SEmil Renner Berthing #define JH7110_SYSCLK_WAVE511_APB 73 917fce1e39SEmil Renner Berthing #define JH7110_SYSCLK_VDEC_JPG 74 927fce1e39SEmil Renner Berthing #define JH7110_SYSCLK_VDEC_MAIN 75 937fce1e39SEmil Renner Berthing #define JH7110_SYSCLK_NOC_BUS_VDEC_AXI 76 947fce1e39SEmil Renner Berthing #define JH7110_SYSCLK_VENC_AXI 77 957fce1e39SEmil Renner Berthing #define JH7110_SYSCLK_WAVE420L_AXI 78 967fce1e39SEmil Renner Berthing #define JH7110_SYSCLK_WAVE420L_BPU 79 977fce1e39SEmil Renner Berthing #define JH7110_SYSCLK_WAVE420L_VCE 80 987fce1e39SEmil Renner Berthing #define JH7110_SYSCLK_WAVE420L_APB 81 997fce1e39SEmil Renner Berthing #define JH7110_SYSCLK_NOC_BUS_VENC_AXI 82 1007fce1e39SEmil Renner Berthing #define JH7110_SYSCLK_AXI_CFG0_MAIN_DIV 83 1017fce1e39SEmil Renner Berthing #define JH7110_SYSCLK_AXI_CFG0_MAIN 84 1027fce1e39SEmil Renner Berthing #define JH7110_SYSCLK_AXI_CFG0_HIFI4 85 1037fce1e39SEmil Renner Berthing #define JH7110_SYSCLK_AXIMEM2_AXI 86 1047fce1e39SEmil Renner Berthing #define JH7110_SYSCLK_QSPI_AHB 87 1057fce1e39SEmil Renner Berthing #define JH7110_SYSCLK_QSPI_APB 88 1067fce1e39SEmil Renner Berthing #define JH7110_SYSCLK_QSPI_REF_SRC 89 1077fce1e39SEmil Renner Berthing #define JH7110_SYSCLK_QSPI_REF 90 1087fce1e39SEmil Renner Berthing #define JH7110_SYSCLK_SDIO0_AHB 91 1097fce1e39SEmil Renner Berthing #define JH7110_SYSCLK_SDIO1_AHB 92 1107fce1e39SEmil Renner Berthing #define JH7110_SYSCLK_SDIO0_SDCARD 93 1117fce1e39SEmil Renner Berthing #define JH7110_SYSCLK_SDIO1_SDCARD 94 1127fce1e39SEmil Renner Berthing #define JH7110_SYSCLK_USB_125M 95 1137fce1e39SEmil Renner Berthing #define JH7110_SYSCLK_NOC_BUS_STG_AXI 96 1147fce1e39SEmil Renner Berthing #define JH7110_SYSCLK_GMAC1_AHB 97 1157fce1e39SEmil Renner Berthing #define JH7110_SYSCLK_GMAC1_AXI 98 1167fce1e39SEmil Renner Berthing #define JH7110_SYSCLK_GMAC_SRC 99 1177fce1e39SEmil Renner Berthing #define JH7110_SYSCLK_GMAC1_GTXCLK 100 1187fce1e39SEmil Renner Berthing #define JH7110_SYSCLK_GMAC1_RMII_RTX 101 1197fce1e39SEmil Renner Berthing #define JH7110_SYSCLK_GMAC1_PTP 102 1207fce1e39SEmil Renner Berthing #define JH7110_SYSCLK_GMAC1_RX 103 1217fce1e39SEmil Renner Berthing #define JH7110_SYSCLK_GMAC1_RX_INV 104 1227fce1e39SEmil Renner Berthing #define JH7110_SYSCLK_GMAC1_TX 105 1237fce1e39SEmil Renner Berthing #define JH7110_SYSCLK_GMAC1_TX_INV 106 1247fce1e39SEmil Renner Berthing #define JH7110_SYSCLK_GMAC1_GTXC 107 1257fce1e39SEmil Renner Berthing #define JH7110_SYSCLK_GMAC0_GTXCLK 108 1267fce1e39SEmil Renner Berthing #define JH7110_SYSCLK_GMAC0_PTP 109 1277fce1e39SEmil Renner Berthing #define JH7110_SYSCLK_GMAC_PHY 110 1287fce1e39SEmil Renner Berthing #define JH7110_SYSCLK_GMAC0_GTXC 111 1297fce1e39SEmil Renner Berthing #define JH7110_SYSCLK_IOMUX_APB 112 1307fce1e39SEmil Renner Berthing #define JH7110_SYSCLK_MAILBOX_APB 113 1317fce1e39SEmil Renner Berthing #define JH7110_SYSCLK_INT_CTRL_APB 114 1327fce1e39SEmil Renner Berthing #define JH7110_SYSCLK_CAN0_APB 115 1337fce1e39SEmil Renner Berthing #define JH7110_SYSCLK_CAN0_TIMER 116 1347fce1e39SEmil Renner Berthing #define JH7110_SYSCLK_CAN0_CAN 117 1357fce1e39SEmil Renner Berthing #define JH7110_SYSCLK_CAN1_APB 118 1367fce1e39SEmil Renner Berthing #define JH7110_SYSCLK_CAN1_TIMER 119 1377fce1e39SEmil Renner Berthing #define JH7110_SYSCLK_CAN1_CAN 120 1387fce1e39SEmil Renner Berthing #define JH7110_SYSCLK_PWM_APB 121 1397fce1e39SEmil Renner Berthing #define JH7110_SYSCLK_WDT_APB 122 1407fce1e39SEmil Renner Berthing #define JH7110_SYSCLK_WDT_CORE 123 1417fce1e39SEmil Renner Berthing #define JH7110_SYSCLK_TIMER_APB 124 1427fce1e39SEmil Renner Berthing #define JH7110_SYSCLK_TIMER0 125 1437fce1e39SEmil Renner Berthing #define JH7110_SYSCLK_TIMER1 126 1447fce1e39SEmil Renner Berthing #define JH7110_SYSCLK_TIMER2 127 1457fce1e39SEmil Renner Berthing #define JH7110_SYSCLK_TIMER3 128 1467fce1e39SEmil Renner Berthing #define JH7110_SYSCLK_TEMP_APB 129 1477fce1e39SEmil Renner Berthing #define JH7110_SYSCLK_TEMP_CORE 130 1487fce1e39SEmil Renner Berthing #define JH7110_SYSCLK_SPI0_APB 131 1497fce1e39SEmil Renner Berthing #define JH7110_SYSCLK_SPI1_APB 132 1507fce1e39SEmil Renner Berthing #define JH7110_SYSCLK_SPI2_APB 133 1517fce1e39SEmil Renner Berthing #define JH7110_SYSCLK_SPI3_APB 134 1527fce1e39SEmil Renner Berthing #define JH7110_SYSCLK_SPI4_APB 135 1537fce1e39SEmil Renner Berthing #define JH7110_SYSCLK_SPI5_APB 136 1547fce1e39SEmil Renner Berthing #define JH7110_SYSCLK_SPI6_APB 137 1557fce1e39SEmil Renner Berthing #define JH7110_SYSCLK_I2C0_APB 138 1567fce1e39SEmil Renner Berthing #define JH7110_SYSCLK_I2C1_APB 139 1577fce1e39SEmil Renner Berthing #define JH7110_SYSCLK_I2C2_APB 140 1587fce1e39SEmil Renner Berthing #define JH7110_SYSCLK_I2C3_APB 141 1597fce1e39SEmil Renner Berthing #define JH7110_SYSCLK_I2C4_APB 142 1607fce1e39SEmil Renner Berthing #define JH7110_SYSCLK_I2C5_APB 143 1617fce1e39SEmil Renner Berthing #define JH7110_SYSCLK_I2C6_APB 144 1627fce1e39SEmil Renner Berthing #define JH7110_SYSCLK_UART0_APB 145 1637fce1e39SEmil Renner Berthing #define JH7110_SYSCLK_UART0_CORE 146 1647fce1e39SEmil Renner Berthing #define JH7110_SYSCLK_UART1_APB 147 1657fce1e39SEmil Renner Berthing #define JH7110_SYSCLK_UART1_CORE 148 1667fce1e39SEmil Renner Berthing #define JH7110_SYSCLK_UART2_APB 149 1677fce1e39SEmil Renner Berthing #define JH7110_SYSCLK_UART2_CORE 150 1687fce1e39SEmil Renner Berthing #define JH7110_SYSCLK_UART3_APB 151 1697fce1e39SEmil Renner Berthing #define JH7110_SYSCLK_UART3_CORE 152 1707fce1e39SEmil Renner Berthing #define JH7110_SYSCLK_UART4_APB 153 1717fce1e39SEmil Renner Berthing #define JH7110_SYSCLK_UART4_CORE 154 1727fce1e39SEmil Renner Berthing #define JH7110_SYSCLK_UART5_APB 155 1737fce1e39SEmil Renner Berthing #define JH7110_SYSCLK_UART5_CORE 156 1747fce1e39SEmil Renner Berthing #define JH7110_SYSCLK_PWMDAC_APB 157 1757fce1e39SEmil Renner Berthing #define JH7110_SYSCLK_PWMDAC_CORE 158 1767fce1e39SEmil Renner Berthing #define JH7110_SYSCLK_SPDIF_APB 159 1777fce1e39SEmil Renner Berthing #define JH7110_SYSCLK_SPDIF_CORE 160 1787fce1e39SEmil Renner Berthing #define JH7110_SYSCLK_I2STX0_APB 161 1797fce1e39SEmil Renner Berthing #define JH7110_SYSCLK_I2STX0_BCLK_MST 162 1807fce1e39SEmil Renner Berthing #define JH7110_SYSCLK_I2STX0_BCLK_MST_INV 163 1817fce1e39SEmil Renner Berthing #define JH7110_SYSCLK_I2STX0_LRCK_MST 164 1827fce1e39SEmil Renner Berthing #define JH7110_SYSCLK_I2STX0_BCLK 165 1837fce1e39SEmil Renner Berthing #define JH7110_SYSCLK_I2STX0_BCLK_INV 166 1847fce1e39SEmil Renner Berthing #define JH7110_SYSCLK_I2STX0_LRCK 167 1857fce1e39SEmil Renner Berthing #define JH7110_SYSCLK_I2STX1_APB 168 1867fce1e39SEmil Renner Berthing #define JH7110_SYSCLK_I2STX1_BCLK_MST 169 1877fce1e39SEmil Renner Berthing #define JH7110_SYSCLK_I2STX1_BCLK_MST_INV 170 1887fce1e39SEmil Renner Berthing #define JH7110_SYSCLK_I2STX1_LRCK_MST 171 1897fce1e39SEmil Renner Berthing #define JH7110_SYSCLK_I2STX1_BCLK 172 1907fce1e39SEmil Renner Berthing #define JH7110_SYSCLK_I2STX1_BCLK_INV 173 1917fce1e39SEmil Renner Berthing #define JH7110_SYSCLK_I2STX1_LRCK 174 1927fce1e39SEmil Renner Berthing #define JH7110_SYSCLK_I2SRX_APB 175 1937fce1e39SEmil Renner Berthing #define JH7110_SYSCLK_I2SRX_BCLK_MST 176 1947fce1e39SEmil Renner Berthing #define JH7110_SYSCLK_I2SRX_BCLK_MST_INV 177 1957fce1e39SEmil Renner Berthing #define JH7110_SYSCLK_I2SRX_LRCK_MST 178 1967fce1e39SEmil Renner Berthing #define JH7110_SYSCLK_I2SRX_BCLK 179 1977fce1e39SEmil Renner Berthing #define JH7110_SYSCLK_I2SRX_BCLK_INV 180 1987fce1e39SEmil Renner Berthing #define JH7110_SYSCLK_I2SRX_LRCK 181 1997fce1e39SEmil Renner Berthing #define JH7110_SYSCLK_PDM_DMIC 182 2007fce1e39SEmil Renner Berthing #define JH7110_SYSCLK_PDM_APB 183 2017fce1e39SEmil Renner Berthing #define JH7110_SYSCLK_TDM_AHB 184 2027fce1e39SEmil Renner Berthing #define JH7110_SYSCLK_TDM_APB 185 2037fce1e39SEmil Renner Berthing #define JH7110_SYSCLK_TDM_INTERNAL 186 2047fce1e39SEmil Renner Berthing #define JH7110_SYSCLK_TDM_TDM 187 2057fce1e39SEmil Renner Berthing #define JH7110_SYSCLK_TDM_TDM_INV 188 2067fce1e39SEmil Renner Berthing #define JH7110_SYSCLK_JTAG_CERTIFICATION_TRNG 189 2077fce1e39SEmil Renner Berthing 2087fce1e39SEmil Renner Berthing #define JH7110_SYSCLK_END 190 2097fce1e39SEmil Renner Berthing 2103de0c910SEmil Renner Berthing /* AONCRG clocks */ 2113de0c910SEmil Renner Berthing #define JH7110_AONCLK_OSC_DIV4 0 2123de0c910SEmil Renner Berthing #define JH7110_AONCLK_APB_FUNC 1 2133de0c910SEmil Renner Berthing #define JH7110_AONCLK_GMAC0_AHB 2 2143de0c910SEmil Renner Berthing #define JH7110_AONCLK_GMAC0_AXI 3 2153de0c910SEmil Renner Berthing #define JH7110_AONCLK_GMAC0_RMII_RTX 4 2163de0c910SEmil Renner Berthing #define JH7110_AONCLK_GMAC0_TX 5 2173de0c910SEmil Renner Berthing #define JH7110_AONCLK_GMAC0_TX_INV 6 2183de0c910SEmil Renner Berthing #define JH7110_AONCLK_GMAC0_RX 7 2193de0c910SEmil Renner Berthing #define JH7110_AONCLK_GMAC0_RX_INV 8 2203de0c910SEmil Renner Berthing #define JH7110_AONCLK_OTPC_APB 9 2213de0c910SEmil Renner Berthing #define JH7110_AONCLK_RTC_APB 10 2223de0c910SEmil Renner Berthing #define JH7110_AONCLK_RTC_INTERNAL 11 2233de0c910SEmil Renner Berthing #define JH7110_AONCLK_RTC_32K 12 2243de0c910SEmil Renner Berthing #define JH7110_AONCLK_RTC_CAL 13 2253de0c910SEmil Renner Berthing 2263de0c910SEmil Renner Berthing #define JH7110_AONCLK_END 14 2273de0c910SEmil Renner Berthing 228*14b14a57SXingyu Wu /* STGCRG clocks */ 229*14b14a57SXingyu Wu #define JH7110_STGCLK_HIFI4_CLK_CORE 0 230*14b14a57SXingyu Wu #define JH7110_STGCLK_USB0_APB 1 231*14b14a57SXingyu Wu #define JH7110_STGCLK_USB0_UTMI_APB 2 232*14b14a57SXingyu Wu #define JH7110_STGCLK_USB0_AXI 3 233*14b14a57SXingyu Wu #define JH7110_STGCLK_USB0_LPM 4 234*14b14a57SXingyu Wu #define JH7110_STGCLK_USB0_STB 5 235*14b14a57SXingyu Wu #define JH7110_STGCLK_USB0_APP_125 6 236*14b14a57SXingyu Wu #define JH7110_STGCLK_USB0_REFCLK 7 237*14b14a57SXingyu Wu #define JH7110_STGCLK_PCIE0_AXI_MST0 8 238*14b14a57SXingyu Wu #define JH7110_STGCLK_PCIE0_APB 9 239*14b14a57SXingyu Wu #define JH7110_STGCLK_PCIE0_TL 10 240*14b14a57SXingyu Wu #define JH7110_STGCLK_PCIE1_AXI_MST0 11 241*14b14a57SXingyu Wu #define JH7110_STGCLK_PCIE1_APB 12 242*14b14a57SXingyu Wu #define JH7110_STGCLK_PCIE1_TL 13 243*14b14a57SXingyu Wu #define JH7110_STGCLK_PCIE_SLV_MAIN 14 244*14b14a57SXingyu Wu #define JH7110_STGCLK_SEC_AHB 15 245*14b14a57SXingyu Wu #define JH7110_STGCLK_SEC_MISC_AHB 16 246*14b14a57SXingyu Wu #define JH7110_STGCLK_GRP0_MAIN 17 247*14b14a57SXingyu Wu #define JH7110_STGCLK_GRP0_BUS 18 248*14b14a57SXingyu Wu #define JH7110_STGCLK_GRP0_STG 19 249*14b14a57SXingyu Wu #define JH7110_STGCLK_GRP1_MAIN 20 250*14b14a57SXingyu Wu #define JH7110_STGCLK_GRP1_BUS 21 251*14b14a57SXingyu Wu #define JH7110_STGCLK_GRP1_STG 22 252*14b14a57SXingyu Wu #define JH7110_STGCLK_GRP1_HIFI 23 253*14b14a57SXingyu Wu #define JH7110_STGCLK_E2_RTC 24 254*14b14a57SXingyu Wu #define JH7110_STGCLK_E2_CORE 25 255*14b14a57SXingyu Wu #define JH7110_STGCLK_E2_DBG 26 256*14b14a57SXingyu Wu #define JH7110_STGCLK_DMA1P_AXI 27 257*14b14a57SXingyu Wu #define JH7110_STGCLK_DMA1P_AHB 28 258*14b14a57SXingyu Wu 259*14b14a57SXingyu Wu #define JH7110_STGCLK_END 29 260*14b14a57SXingyu Wu 2617fce1e39SEmil Renner Berthing #endif /* __DT_BINDINGS_CLOCK_STARFIVE_JH7110_CRG_H__ */ 262