1 /* 2 * Copyright 2014 Ulrich Hecht 3 * 4 * This program is free software; you can redistribute it and/or modify 5 * it under the terms of the GNU General Public License as published by 6 * the Free Software Foundation; either version 2 of the License, or 7 * (at your option) any later version. 8 */ 9 10 #ifndef __DT_BINDINGS_CLOCK_SH73A0_H__ 11 #define __DT_BINDINGS_CLOCK_SH73A0_H__ 12 13 /* CPG */ 14 #define SH73A0_CLK_MAIN 0 15 #define SH73A0_CLK_PLL0 1 16 #define SH73A0_CLK_PLL1 2 17 #define SH73A0_CLK_PLL2 3 18 #define SH73A0_CLK_PLL3 4 19 #define SH73A0_CLK_DSI0PHY 5 20 #define SH73A0_CLK_DSI1PHY 6 21 #define SH73A0_CLK_ZG 7 22 #define SH73A0_CLK_M3 8 23 #define SH73A0_CLK_B 9 24 #define SH73A0_CLK_M1 10 25 #define SH73A0_CLK_M2 11 26 #define SH73A0_CLK_Z 12 27 #define SH73A0_CLK_ZX 13 28 #define SH73A0_CLK_HP 14 29 30 /* MSTP0 */ 31 #define SH73A0_CLK_IIC2 1 32 #define SH73A0_CLK_MSIOF0 0 33 34 /* MSTP1 */ 35 #define SH73A0_CLK_CEU1 29 36 #define SH73A0_CLK_CSI2_RX1 28 37 #define SH73A0_CLK_CEU0 27 38 #define SH73A0_CLK_CSI2_RX0 26 39 #define SH73A0_CLK_TMU0 25 40 #define SH73A0_CLK_DSITX0 18 41 #define SH73A0_CLK_IIC0 16 42 #define SH73A0_CLK_SGX 12 43 #define SH73A0_CLK_LCDC0 0 44 45 /* MSTP2 */ 46 #define SH73A0_CLK_SCIFA7 19 47 #define SH73A0_CLK_SY_DMAC 18 48 #define SH73A0_CLK_MP_DMAC 17 49 #define SH73A0_CLK_MSIOF3 15 50 #define SH73A0_CLK_MSIOF1 8 51 #define SH73A0_CLK_SCIFA5 7 52 #define SH73A0_CLK_SCIFB 6 53 #define SH73A0_CLK_MSIOF2 5 54 #define SH73A0_CLK_SCIFA0 4 55 #define SH73A0_CLK_SCIFA1 3 56 #define SH73A0_CLK_SCIFA2 2 57 #define SH73A0_CLK_SCIFA3 1 58 #define SH73A0_CLK_SCIFA4 0 59 60 /* MSTP3 */ 61 #define SH73A0_CLK_SCIFA6 31 62 #define SH73A0_CLK_CMT1 29 63 #define SH73A0_CLK_FSI 28 64 #define SH73A0_CLK_IRDA 25 65 #define SH73A0_CLK_IIC1 23 66 #define SH73A0_CLK_USB 22 67 #define SH73A0_CLK_FLCTL 15 68 #define SH73A0_CLK_SDHI0 14 69 #define SH73A0_CLK_SDHI1 13 70 #define SH73A0_CLK_MMCIF0 12 71 #define SH73A0_CLK_SDHI2 11 72 #define SH73A0_CLK_TPU0 4 73 #define SH73A0_CLK_TPU1 3 74 #define SH73A0_CLK_TPU2 2 75 #define SH73A0_CLK_TPU3 1 76 #define SH73A0_CLK_TPU4 0 77 78 /* MSTP4 */ 79 #define SH73A0_CLK_IIC3 11 80 #define SH73A0_CLK_IIC4 10 81 #define SH73A0_CLK_KEYSC 3 82 83 /* MSTP5 */ 84 #define SH73A0_CLK_INTCA0 8 85 86 #endif 87