1972610fbSGeert Uytterhoeven /*
2972610fbSGeert Uytterhoeven  * Copyright (C) 2016 Renesas Electronics Corp.
3972610fbSGeert Uytterhoeven  *
4972610fbSGeert Uytterhoeven  * This program is free software; you can redistribute it and/or modify
5972610fbSGeert Uytterhoeven  * it under the terms of the GNU General Public License as published by
6972610fbSGeert Uytterhoeven  * the Free Software Foundation; either version 2 of the License, or
7972610fbSGeert Uytterhoeven  * (at your option) any later version.
8972610fbSGeert Uytterhoeven  */
9972610fbSGeert Uytterhoeven #ifndef __DT_BINDINGS_CLOCK_R8A7796_CPG_MSSR_H__
10972610fbSGeert Uytterhoeven #define __DT_BINDINGS_CLOCK_R8A7796_CPG_MSSR_H__
11972610fbSGeert Uytterhoeven 
12972610fbSGeert Uytterhoeven #include <dt-bindings/clock/renesas-cpg-mssr.h>
13972610fbSGeert Uytterhoeven 
14972610fbSGeert Uytterhoeven /* r8a7796 CPG Core Clocks */
15972610fbSGeert Uytterhoeven #define R8A7796_CLK_Z			0
16972610fbSGeert Uytterhoeven #define R8A7796_CLK_Z2			1
17972610fbSGeert Uytterhoeven #define R8A7796_CLK_ZR			2
18972610fbSGeert Uytterhoeven #define R8A7796_CLK_ZG			3
19972610fbSGeert Uytterhoeven #define R8A7796_CLK_ZTR			4
20972610fbSGeert Uytterhoeven #define R8A7796_CLK_ZTRD2		5
21972610fbSGeert Uytterhoeven #define R8A7796_CLK_ZT			6
22972610fbSGeert Uytterhoeven #define R8A7796_CLK_ZX			7
23972610fbSGeert Uytterhoeven #define R8A7796_CLK_S0D1		8
24972610fbSGeert Uytterhoeven #define R8A7796_CLK_S0D2		9
25972610fbSGeert Uytterhoeven #define R8A7796_CLK_S0D3		10
26972610fbSGeert Uytterhoeven #define R8A7796_CLK_S0D4		11
27972610fbSGeert Uytterhoeven #define R8A7796_CLK_S0D6		12
28972610fbSGeert Uytterhoeven #define R8A7796_CLK_S0D8		13
29972610fbSGeert Uytterhoeven #define R8A7796_CLK_S0D12		14
30972610fbSGeert Uytterhoeven #define R8A7796_CLK_S1D1		15
31972610fbSGeert Uytterhoeven #define R8A7796_CLK_S1D2		16
32972610fbSGeert Uytterhoeven #define R8A7796_CLK_S1D4		17
33972610fbSGeert Uytterhoeven #define R8A7796_CLK_S2D1		18
34972610fbSGeert Uytterhoeven #define R8A7796_CLK_S2D2		19
35972610fbSGeert Uytterhoeven #define R8A7796_CLK_S2D4		20
36972610fbSGeert Uytterhoeven #define R8A7796_CLK_S3D1		21
37972610fbSGeert Uytterhoeven #define R8A7796_CLK_S3D2		22
38972610fbSGeert Uytterhoeven #define R8A7796_CLK_S3D4		23
39972610fbSGeert Uytterhoeven #define R8A7796_CLK_LB			24
40972610fbSGeert Uytterhoeven #define R8A7796_CLK_CL			25
41972610fbSGeert Uytterhoeven #define R8A7796_CLK_ZB3			26
42972610fbSGeert Uytterhoeven #define R8A7796_CLK_ZB3D2		27
43972610fbSGeert Uytterhoeven #define R8A7796_CLK_ZB3D4		28
44972610fbSGeert Uytterhoeven #define R8A7796_CLK_CR			29
45972610fbSGeert Uytterhoeven #define R8A7796_CLK_CRD2		30
46972610fbSGeert Uytterhoeven #define R8A7796_CLK_SD0H		31
47972610fbSGeert Uytterhoeven #define R8A7796_CLK_SD0			32
48972610fbSGeert Uytterhoeven #define R8A7796_CLK_SD1H		33
49972610fbSGeert Uytterhoeven #define R8A7796_CLK_SD1			34
50972610fbSGeert Uytterhoeven #define R8A7796_CLK_SD2H		35
51972610fbSGeert Uytterhoeven #define R8A7796_CLK_SD2			36
52972610fbSGeert Uytterhoeven #define R8A7796_CLK_SD3H		37
53972610fbSGeert Uytterhoeven #define R8A7796_CLK_SD3			38
54972610fbSGeert Uytterhoeven #define R8A7796_CLK_SSP2		39
55972610fbSGeert Uytterhoeven #define R8A7796_CLK_SSP1		40
56972610fbSGeert Uytterhoeven #define R8A7796_CLK_SSPRS		41
57972610fbSGeert Uytterhoeven #define R8A7796_CLK_RPC			42
58972610fbSGeert Uytterhoeven #define R8A7796_CLK_RPCD2		43
59972610fbSGeert Uytterhoeven #define R8A7796_CLK_MSO			44
60972610fbSGeert Uytterhoeven #define R8A7796_CLK_CANFD		45
61972610fbSGeert Uytterhoeven #define R8A7796_CLK_HDMI		46
62972610fbSGeert Uytterhoeven #define R8A7796_CLK_CSI0		47
63972610fbSGeert Uytterhoeven #define R8A7796_CLK_CSIREF		48
64972610fbSGeert Uytterhoeven #define R8A7796_CLK_CP			49
65972610fbSGeert Uytterhoeven #define R8A7796_CLK_CPEX		50
66972610fbSGeert Uytterhoeven #define R8A7796_CLK_R			51
67972610fbSGeert Uytterhoeven #define R8A7796_CLK_OSC			52
68972610fbSGeert Uytterhoeven 
69972610fbSGeert Uytterhoeven #endif /* __DT_BINDINGS_CLOCK_R8A7796_CPG_MSSR_H__ */
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