19d0c3c68SGeert Uytterhoeven /*
29d0c3c68SGeert Uytterhoeven  * Copyright (C) 2015 Renesas Electronics Corp.
39d0c3c68SGeert Uytterhoeven  *
49d0c3c68SGeert Uytterhoeven  * This program is free software; you can redistribute it and/or modify
59d0c3c68SGeert Uytterhoeven  * it under the terms of the GNU General Public License as published by
69d0c3c68SGeert Uytterhoeven  * the Free Software Foundation; either version 2 of the License, or
79d0c3c68SGeert Uytterhoeven  * (at your option) any later version.
89d0c3c68SGeert Uytterhoeven  */
99d0c3c68SGeert Uytterhoeven #ifndef __DT_BINDINGS_CLOCK_R8A7795_CPG_MSSR_H__
109d0c3c68SGeert Uytterhoeven #define __DT_BINDINGS_CLOCK_R8A7795_CPG_MSSR_H__
119d0c3c68SGeert Uytterhoeven 
129d0c3c68SGeert Uytterhoeven #include <dt-bindings/clock/renesas-cpg-mssr.h>
139d0c3c68SGeert Uytterhoeven 
149d0c3c68SGeert Uytterhoeven /* r8a7795 CPG Core Clocks */
159d0c3c68SGeert Uytterhoeven #define R8A7795_CLK_Z			0
169d0c3c68SGeert Uytterhoeven #define R8A7795_CLK_Z2			1
179d0c3c68SGeert Uytterhoeven #define R8A7795_CLK_ZR			2
189d0c3c68SGeert Uytterhoeven #define R8A7795_CLK_ZG			3
199d0c3c68SGeert Uytterhoeven #define R8A7795_CLK_ZTR			4
209d0c3c68SGeert Uytterhoeven #define R8A7795_CLK_ZTRD2		5
219d0c3c68SGeert Uytterhoeven #define R8A7795_CLK_ZT			6
229d0c3c68SGeert Uytterhoeven #define R8A7795_CLK_ZX			7
239d0c3c68SGeert Uytterhoeven #define R8A7795_CLK_S0D1		8
249d0c3c68SGeert Uytterhoeven #define R8A7795_CLK_S0D4		9
259d0c3c68SGeert Uytterhoeven #define R8A7795_CLK_S1D1		10
269d0c3c68SGeert Uytterhoeven #define R8A7795_CLK_S1D2		11
279d0c3c68SGeert Uytterhoeven #define R8A7795_CLK_S1D4		12
289d0c3c68SGeert Uytterhoeven #define R8A7795_CLK_S2D1		13
299d0c3c68SGeert Uytterhoeven #define R8A7795_CLK_S2D2		14
309d0c3c68SGeert Uytterhoeven #define R8A7795_CLK_S2D4		15
319d0c3c68SGeert Uytterhoeven #define R8A7795_CLK_S3D1		16
329d0c3c68SGeert Uytterhoeven #define R8A7795_CLK_S3D2		17
339d0c3c68SGeert Uytterhoeven #define R8A7795_CLK_S3D4		18
349d0c3c68SGeert Uytterhoeven #define R8A7795_CLK_LB			19
359d0c3c68SGeert Uytterhoeven #define R8A7795_CLK_CL			20
369d0c3c68SGeert Uytterhoeven #define R8A7795_CLK_ZB3			21
379d0c3c68SGeert Uytterhoeven #define R8A7795_CLK_ZB3D2		22
389d0c3c68SGeert Uytterhoeven #define R8A7795_CLK_CR			23
399d0c3c68SGeert Uytterhoeven #define R8A7795_CLK_CRD2		24
409d0c3c68SGeert Uytterhoeven #define R8A7795_CLK_SD0H		25
419d0c3c68SGeert Uytterhoeven #define R8A7795_CLK_SD0			26
429d0c3c68SGeert Uytterhoeven #define R8A7795_CLK_SD1H		27
439d0c3c68SGeert Uytterhoeven #define R8A7795_CLK_SD1			28
449d0c3c68SGeert Uytterhoeven #define R8A7795_CLK_SD2H		29
459d0c3c68SGeert Uytterhoeven #define R8A7795_CLK_SD2			30
469d0c3c68SGeert Uytterhoeven #define R8A7795_CLK_SD3H		31
479d0c3c68SGeert Uytterhoeven #define R8A7795_CLK_SD3			32
489d0c3c68SGeert Uytterhoeven #define R8A7795_CLK_SSP2		33
499d0c3c68SGeert Uytterhoeven #define R8A7795_CLK_SSP1		34
509d0c3c68SGeert Uytterhoeven #define R8A7795_CLK_SSPRS		35
519d0c3c68SGeert Uytterhoeven #define R8A7795_CLK_RPC			36
529d0c3c68SGeert Uytterhoeven #define R8A7795_CLK_RPCD2		37
539d0c3c68SGeert Uytterhoeven #define R8A7795_CLK_MSO			38
549d0c3c68SGeert Uytterhoeven #define R8A7795_CLK_CANFD		39
559d0c3c68SGeert Uytterhoeven #define R8A7795_CLK_HDMI		40
569d0c3c68SGeert Uytterhoeven #define R8A7795_CLK_CSI0		41
579d0c3c68SGeert Uytterhoeven #define R8A7795_CLK_CSIREF		42
589d0c3c68SGeert Uytterhoeven #define R8A7795_CLK_CP			43
599d0c3c68SGeert Uytterhoeven #define R8A7795_CLK_CPEX		44
609d0c3c68SGeert Uytterhoeven #define R8A7795_CLK_R			45
619d0c3c68SGeert Uytterhoeven #define R8A7795_CLK_OSC			46
629d0c3c68SGeert Uytterhoeven 
639d0c3c68SGeert Uytterhoeven #endif /* __DT_BINDINGS_CLOCK_R8A7795_CPG_MSSR_H__ */
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