1 /* 2 * Copyright (C) 2014 Renesas Electronics Corporation 3 * Copyright 2013 Ideas On Board SPRL 4 * 5 * This program is free software; you can redistribute it and/or modify 6 * it under the terms of the GNU General Public License as published by 7 * the Free Software Foundation; either version 2 of the License, or 8 * (at your option) any later version. 9 */ 10 11 #ifndef __DT_BINDINGS_CLOCK_R8A7794_H__ 12 #define __DT_BINDINGS_CLOCK_R8A7794_H__ 13 14 /* CPG */ 15 #define R8A7794_CLK_MAIN 0 16 #define R8A7794_CLK_PLL0 1 17 #define R8A7794_CLK_PLL1 2 18 #define R8A7794_CLK_PLL3 3 19 #define R8A7794_CLK_LB 4 20 #define R8A7794_CLK_QSPI 5 21 #define R8A7794_CLK_SDH 6 22 #define R8A7794_CLK_SD0 7 23 #define R8A7794_CLK_Z 8 24 25 /* MSTP0 */ 26 #define R8A7794_CLK_MSIOF0 0 27 28 /* MSTP1 */ 29 #define R8A7794_CLK_VCP0 1 30 #define R8A7794_CLK_VPC0 3 31 #define R8A7794_CLK_TMU1 11 32 #define R8A7794_CLK_3DG 12 33 #define R8A7794_CLK_2DDMAC 15 34 #define R8A7794_CLK_FDP1_0 19 35 #define R8A7794_CLK_TMU3 21 36 #define R8A7794_CLK_TMU2 22 37 #define R8A7794_CLK_CMT0 24 38 #define R8A7794_CLK_TMU0 25 39 #define R8A7794_CLK_VSP1_DU0 28 40 #define R8A7794_CLK_VSP1_S 31 41 42 /* MSTP2 */ 43 #define R8A7794_CLK_SCIFA2 2 44 #define R8A7794_CLK_SCIFA1 3 45 #define R8A7794_CLK_SCIFA0 4 46 #define R8A7794_CLK_MSIOF2 5 47 #define R8A7794_CLK_SCIFB0 6 48 #define R8A7794_CLK_SCIFB1 7 49 #define R8A7794_CLK_MSIOF1 8 50 #define R8A7794_CLK_SCIFB2 16 51 52 /* MSTP3 */ 53 #define R8A7794_CLK_CMT1 29 54 55 /* MSTP5 */ 56 #define R8A7794_CLK_THERMAL 22 57 #define R8A7794_CLK_PWM 23 58 59 /* MSTP7 */ 60 #define R8A7794_CLK_HSCIF2 13 61 #define R8A7794_CLK_SCIF5 14 62 #define R8A7794_CLK_SCIF4 15 63 #define R8A7794_CLK_HSCIF1 16 64 #define R8A7794_CLK_HSCIF0 17 65 #define R8A7794_CLK_SCIF3 18 66 #define R8A7794_CLK_SCIF2 19 67 #define R8A7794_CLK_SCIF1 20 68 #define R8A7794_CLK_SCIF0 21 69 70 /* MSTP8 */ 71 #define R8A7794_CLK_VIN1 10 72 #define R8A7794_CLK_VIN0 11 73 #define R8A7794_CLK_ETHER 13 74 75 /* MSTP9 */ 76 #define R8A7794_CLK_GPIO6 5 77 #define R8A7794_CLK_GPIO5 7 78 #define R8A7794_CLK_GPIO4 8 79 #define R8A7794_CLK_GPIO3 9 80 #define R8A7794_CLK_GPIO2 10 81 #define R8A7794_CLK_GPIO1 11 82 #define R8A7794_CLK_GPIO0 12 83 84 /* MSTP11 */ 85 #define R8A7794_CLK_SCIFA3 6 86 #define R8A7794_CLK_SCIFA4 7 87 #define R8A7794_CLK_SCIFA5 8 88 89 #endif /* __DT_BINDINGS_CLOCK_R8A7794_H__ */ 90