10dce5454SUlrich Hecht /* 20dce5454SUlrich Hecht * Copyright (C) 2014 Renesas Electronics Corporation 30dce5454SUlrich Hecht * Copyright 2013 Ideas On Board SPRL 40dce5454SUlrich Hecht * 50dce5454SUlrich Hecht * This program is free software; you can redistribute it and/or modify 60dce5454SUlrich Hecht * it under the terms of the GNU General Public License as published by 70dce5454SUlrich Hecht * the Free Software Foundation; either version 2 of the License, or 80dce5454SUlrich Hecht * (at your option) any later version. 90dce5454SUlrich Hecht */ 100dce5454SUlrich Hecht 110dce5454SUlrich Hecht #ifndef __DT_BINDINGS_CLOCK_R8A7794_H__ 120dce5454SUlrich Hecht #define __DT_BINDINGS_CLOCK_R8A7794_H__ 130dce5454SUlrich Hecht 140dce5454SUlrich Hecht /* CPG */ 150dce5454SUlrich Hecht #define R8A7794_CLK_MAIN 0 160dce5454SUlrich Hecht #define R8A7794_CLK_PLL0 1 170dce5454SUlrich Hecht #define R8A7794_CLK_PLL1 2 180dce5454SUlrich Hecht #define R8A7794_CLK_PLL3 3 190dce5454SUlrich Hecht #define R8A7794_CLK_LB 4 200dce5454SUlrich Hecht #define R8A7794_CLK_QSPI 5 210dce5454SUlrich Hecht #define R8A7794_CLK_SDH 6 220dce5454SUlrich Hecht #define R8A7794_CLK_SD0 7 230dce5454SUlrich Hecht #define R8A7794_CLK_Z 8 24e980f941SSimon Horman #define R8A7794_CLK_RCAN 9 250dce5454SUlrich Hecht 260dce5454SUlrich Hecht /* MSTP0 */ 270dce5454SUlrich Hecht #define R8A7794_CLK_MSIOF0 0 280dce5454SUlrich Hecht 290dce5454SUlrich Hecht /* MSTP1 */ 30dc3cf93dSYoshifumi Hosoya #define R8A7794_CLK_VCP0 1 31dc3cf93dSYoshifumi Hosoya #define R8A7794_CLK_VPC0 3 320dce5454SUlrich Hecht #define R8A7794_CLK_TMU1 11 333e58a542SKouei Abe #define R8A7794_CLK_3DG 12 34dc3cf93dSYoshifumi Hosoya #define R8A7794_CLK_2DDMAC 15 35dc3cf93dSYoshifumi Hosoya #define R8A7794_CLK_FDP1_0 19 360dce5454SUlrich Hecht #define R8A7794_CLK_TMU3 21 370dce5454SUlrich Hecht #define R8A7794_CLK_TMU2 22 380dce5454SUlrich Hecht #define R8A7794_CLK_CMT0 24 390dce5454SUlrich Hecht #define R8A7794_CLK_TMU0 25 40dc3cf93dSYoshifumi Hosoya #define R8A7794_CLK_VSP1_DU0 28 41dc3cf93dSYoshifumi Hosoya #define R8A7794_CLK_VSP1_S 31 420dce5454SUlrich Hecht 430dce5454SUlrich Hecht /* MSTP2 */ 440dce5454SUlrich Hecht #define R8A7794_CLK_SCIFA2 2 450dce5454SUlrich Hecht #define R8A7794_CLK_SCIFA1 3 460dce5454SUlrich Hecht #define R8A7794_CLK_SCIFA0 4 470dce5454SUlrich Hecht #define R8A7794_CLK_MSIOF2 5 480dce5454SUlrich Hecht #define R8A7794_CLK_SCIFB0 6 490dce5454SUlrich Hecht #define R8A7794_CLK_SCIFB1 7 500dce5454SUlrich Hecht #define R8A7794_CLK_MSIOF1 8 510dce5454SUlrich Hecht #define R8A7794_CLK_SCIFB2 16 52be16cd38SHiroyuki Yokoyama #define R8A7794_CLK_SYS_DMAC1 18 53be16cd38SHiroyuki Yokoyama #define R8A7794_CLK_SYS_DMAC0 19 540dce5454SUlrich Hecht 550dce5454SUlrich Hecht /* MSTP3 */ 568e181633SShinobu Uehara #define R8A7794_CLK_SDHI2 11 578e181633SShinobu Uehara #define R8A7794_CLK_SDHI1 12 588e181633SShinobu Uehara #define R8A7794_CLK_SDHI0 14 59deac150cSShinobu Uehara #define R8A7794_CLK_MMCIF0 15 600dce5454SUlrich Hecht #define R8A7794_CLK_CMT1 29 6122a9b44fSKazuya Mizuguchi #define R8A7794_CLK_USBDMAC0 30 6222a9b44fSKazuya Mizuguchi #define R8A7794_CLK_USBDMAC1 31 630dce5454SUlrich Hecht 641c5ca5dbSGeert Uytterhoeven /* MSTP4 */ 651c5ca5dbSGeert Uytterhoeven #define R8A7794_CLK_IRQC 7 661c5ca5dbSGeert Uytterhoeven 670dce5454SUlrich Hecht /* MSTP5 */ 680dce5454SUlrich Hecht #define R8A7794_CLK_THERMAL 22 690dce5454SUlrich Hecht #define R8A7794_CLK_PWM 23 700dce5454SUlrich Hecht 710dce5454SUlrich Hecht /* MSTP7 */ 72c7bab9f9SShinobu Uehara #define R8A7794_CLK_EHCI 3 73c7bab9f9SShinobu Uehara #define R8A7794_CLK_HSUSB 4 740dce5454SUlrich Hecht #define R8A7794_CLK_HSCIF2 13 750dce5454SUlrich Hecht #define R8A7794_CLK_SCIF5 14 760dce5454SUlrich Hecht #define R8A7794_CLK_SCIF4 15 770dce5454SUlrich Hecht #define R8A7794_CLK_HSCIF1 16 780dce5454SUlrich Hecht #define R8A7794_CLK_HSCIF0 17 790dce5454SUlrich Hecht #define R8A7794_CLK_SCIF3 18 800dce5454SUlrich Hecht #define R8A7794_CLK_SCIF2 19 810dce5454SUlrich Hecht #define R8A7794_CLK_SCIF1 20 820dce5454SUlrich Hecht #define R8A7794_CLK_SCIF0 21 839859cd3bSLaurent Pinchart #define R8A7794_CLK_DU0 24 840dce5454SUlrich Hecht 850dce5454SUlrich Hecht /* MSTP8 */ 86148ebf47SKoji Matsuoka #define R8A7794_CLK_VIN1 10 87148ebf47SKoji Matsuoka #define R8A7794_CLK_VIN0 11 88255a4042SSergei Shtylyov #define R8A7794_CLK_ETHERAVB 12 890dce5454SUlrich Hecht #define R8A7794_CLK_ETHER 13 900dce5454SUlrich Hecht 910dce5454SUlrich Hecht /* MSTP9 */ 920dce5454SUlrich Hecht #define R8A7794_CLK_GPIO6 5 930dce5454SUlrich Hecht #define R8A7794_CLK_GPIO5 7 940dce5454SUlrich Hecht #define R8A7794_CLK_GPIO4 8 950dce5454SUlrich Hecht #define R8A7794_CLK_GPIO3 9 960dce5454SUlrich Hecht #define R8A7794_CLK_GPIO2 10 970dce5454SUlrich Hecht #define R8A7794_CLK_GPIO1 11 980dce5454SUlrich Hecht #define R8A7794_CLK_GPIO0 12 99e980f941SSimon Horman #define R8A7794_CLK_RCAN1 15 100e980f941SSimon Horman #define R8A7794_CLK_RCAN0 16 1013281480bSHisashi Nakamura #define R8A7794_CLK_QSPI_MOD 17 102c5d82c99SKoji Matsuoka #define R8A7794_CLK_I2C5 25 103c5d82c99SKoji Matsuoka #define R8A7794_CLK_I2C4 27 104c5d82c99SKoji Matsuoka #define R8A7794_CLK_I2C3 28 105c5d82c99SKoji Matsuoka #define R8A7794_CLK_I2C2 29 106c5d82c99SKoji Matsuoka #define R8A7794_CLK_I2C1 30 107c5d82c99SKoji Matsuoka #define R8A7794_CLK_I2C0 31 1080dce5454SUlrich Hecht 1090dce5454SUlrich Hecht /* MSTP11 */ 1100dce5454SUlrich Hecht #define R8A7794_CLK_SCIFA3 6 1110dce5454SUlrich Hecht #define R8A7794_CLK_SCIFA4 7 1120dce5454SUlrich Hecht #define R8A7794_CLK_SCIFA5 8 1130dce5454SUlrich Hecht 1140dce5454SUlrich Hecht #endif /* __DT_BINDINGS_CLOCK_R8A7794_H__ */ 115