15d169ce7SKuninori Morimoto /* SPDX-License-Identifier: GPL-2.0+ 277d2e30dSGeert Uytterhoeven * 35d169ce7SKuninori Morimoto * Copyright (C) 2015 Renesas Electronics Corp. 477d2e30dSGeert Uytterhoeven */ 577d2e30dSGeert Uytterhoeven 677d2e30dSGeert Uytterhoeven #ifndef __DT_BINDINGS_CLOCK_R8A7793_CPG_MSSR_H__ 777d2e30dSGeert Uytterhoeven #define __DT_BINDINGS_CLOCK_R8A7793_CPG_MSSR_H__ 877d2e30dSGeert Uytterhoeven 977d2e30dSGeert Uytterhoeven #include <dt-bindings/clock/renesas-cpg-mssr.h> 1077d2e30dSGeert Uytterhoeven 1177d2e30dSGeert Uytterhoeven /* r8a7793 CPG Core Clocks */ 1277d2e30dSGeert Uytterhoeven #define R8A7793_CLK_Z 0 1377d2e30dSGeert Uytterhoeven #define R8A7793_CLK_ZG 1 1477d2e30dSGeert Uytterhoeven #define R8A7793_CLK_ZTR 2 1577d2e30dSGeert Uytterhoeven #define R8A7793_CLK_ZTRD2 3 1677d2e30dSGeert Uytterhoeven #define R8A7793_CLK_ZT 4 1777d2e30dSGeert Uytterhoeven #define R8A7793_CLK_ZX 5 1877d2e30dSGeert Uytterhoeven #define R8A7793_CLK_ZS 6 1977d2e30dSGeert Uytterhoeven #define R8A7793_CLK_HP 7 2077d2e30dSGeert Uytterhoeven #define R8A7793_CLK_I 8 2177d2e30dSGeert Uytterhoeven #define R8A7793_CLK_B 9 2277d2e30dSGeert Uytterhoeven #define R8A7793_CLK_LB 10 2377d2e30dSGeert Uytterhoeven #define R8A7793_CLK_P 11 2477d2e30dSGeert Uytterhoeven #define R8A7793_CLK_CL 12 2577d2e30dSGeert Uytterhoeven #define R8A7793_CLK_M2 13 2677d2e30dSGeert Uytterhoeven #define R8A7793_CLK_ADSP 14 2777d2e30dSGeert Uytterhoeven #define R8A7793_CLK_ZB3 15 2877d2e30dSGeert Uytterhoeven #define R8A7793_CLK_ZB3D2 16 2977d2e30dSGeert Uytterhoeven #define R8A7793_CLK_DDR 17 3077d2e30dSGeert Uytterhoeven #define R8A7793_CLK_SDH 18 3177d2e30dSGeert Uytterhoeven #define R8A7793_CLK_SD0 19 3277d2e30dSGeert Uytterhoeven #define R8A7793_CLK_SD2 20 3377d2e30dSGeert Uytterhoeven #define R8A7793_CLK_SD3 21 3477d2e30dSGeert Uytterhoeven #define R8A7793_CLK_MMC0 22 3577d2e30dSGeert Uytterhoeven #define R8A7793_CLK_MP 23 3677d2e30dSGeert Uytterhoeven #define R8A7793_CLK_SSP 24 3777d2e30dSGeert Uytterhoeven #define R8A7793_CLK_SSPRS 25 3877d2e30dSGeert Uytterhoeven #define R8A7793_CLK_QSPI 26 3977d2e30dSGeert Uytterhoeven #define R8A7793_CLK_CP 27 4077d2e30dSGeert Uytterhoeven #define R8A7793_CLK_RCAN 28 4177d2e30dSGeert Uytterhoeven #define R8A7793_CLK_R 29 4277d2e30dSGeert Uytterhoeven #define R8A7793_CLK_OSC 30 4377d2e30dSGeert Uytterhoeven 4477d2e30dSGeert Uytterhoeven #endif /* __DT_BINDINGS_CLOCK_R8A7793_CPG_MSSR_H__ */ 45