10e03e8aeSUlrich Hecht /* 20e03e8aeSUlrich Hecht * r8a7793 clock definition 30e03e8aeSUlrich Hecht * 40e03e8aeSUlrich Hecht * Copyright (C) 2014 Renesas Electronics Corporation 50e03e8aeSUlrich Hecht * 60e03e8aeSUlrich Hecht * This program is free software; you can redistribute it and/or modify 70e03e8aeSUlrich Hecht * it under the terms of the GNU General Public License as published by 80e03e8aeSUlrich Hecht * the Free Software Foundation; version 2 of the License. 90e03e8aeSUlrich Hecht * 100e03e8aeSUlrich Hecht * This program is distributed in the hope that it will be useful, 110e03e8aeSUlrich Hecht * but WITHOUT ANY WARRANTY; without even the implied warranty of 120e03e8aeSUlrich Hecht * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 130e03e8aeSUlrich Hecht * GNU General Public License for more details. 140e03e8aeSUlrich Hecht */ 150e03e8aeSUlrich Hecht 160e03e8aeSUlrich Hecht #ifndef __DT_BINDINGS_CLOCK_R8A7793_H__ 170e03e8aeSUlrich Hecht #define __DT_BINDINGS_CLOCK_R8A7793_H__ 180e03e8aeSUlrich Hecht 190e03e8aeSUlrich Hecht /* CPG */ 200e03e8aeSUlrich Hecht #define R8A7793_CLK_MAIN 0 210e03e8aeSUlrich Hecht #define R8A7793_CLK_PLL0 1 220e03e8aeSUlrich Hecht #define R8A7793_CLK_PLL1 2 230e03e8aeSUlrich Hecht #define R8A7793_CLK_PLL3 3 240e03e8aeSUlrich Hecht #define R8A7793_CLK_LB 4 250e03e8aeSUlrich Hecht #define R8A7793_CLK_QSPI 5 260e03e8aeSUlrich Hecht #define R8A7793_CLK_SDH 6 270e03e8aeSUlrich Hecht #define R8A7793_CLK_SD0 7 280e03e8aeSUlrich Hecht #define R8A7793_CLK_Z 8 290e03e8aeSUlrich Hecht #define R8A7793_CLK_RCAN 9 300e03e8aeSUlrich Hecht #define R8A7793_CLK_ADSP 10 310e03e8aeSUlrich Hecht 320e03e8aeSUlrich Hecht /* MSTP0 */ 330e03e8aeSUlrich Hecht #define R8A7793_CLK_MSIOF0 0 340e03e8aeSUlrich Hecht 350e03e8aeSUlrich Hecht /* MSTP1 */ 360e03e8aeSUlrich Hecht #define R8A7793_CLK_VCP0 1 370e03e8aeSUlrich Hecht #define R8A7793_CLK_VPC0 3 380e03e8aeSUlrich Hecht #define R8A7793_CLK_SSP1 9 390e03e8aeSUlrich Hecht #define R8A7793_CLK_TMU1 11 400e03e8aeSUlrich Hecht #define R8A7793_CLK_3DG 12 410e03e8aeSUlrich Hecht #define R8A7793_CLK_2DDMAC 15 420e03e8aeSUlrich Hecht #define R8A7793_CLK_FDP1_1 18 430e03e8aeSUlrich Hecht #define R8A7793_CLK_FDP1_0 19 440e03e8aeSUlrich Hecht #define R8A7793_CLK_TMU3 21 450e03e8aeSUlrich Hecht #define R8A7793_CLK_TMU2 22 460e03e8aeSUlrich Hecht #define R8A7793_CLK_CMT0 24 470e03e8aeSUlrich Hecht #define R8A7793_CLK_TMU0 25 480e03e8aeSUlrich Hecht #define R8A7793_CLK_VSP1_DU1 27 490e03e8aeSUlrich Hecht #define R8A7793_CLK_VSP1_DU0 28 500e03e8aeSUlrich Hecht #define R8A7793_CLK_VSP1_S 31 510e03e8aeSUlrich Hecht 520e03e8aeSUlrich Hecht /* MSTP2 */ 530e03e8aeSUlrich Hecht #define R8A7793_CLK_SCIFA2 2 540e03e8aeSUlrich Hecht #define R8A7793_CLK_SCIFA1 3 550e03e8aeSUlrich Hecht #define R8A7793_CLK_SCIFA0 4 560e03e8aeSUlrich Hecht #define R8A7793_CLK_MSIOF2 5 570e03e8aeSUlrich Hecht #define R8A7793_CLK_SCIFB0 6 580e03e8aeSUlrich Hecht #define R8A7793_CLK_SCIFB1 7 590e03e8aeSUlrich Hecht #define R8A7793_CLK_MSIOF1 8 600e03e8aeSUlrich Hecht #define R8A7793_CLK_SCIFB2 16 610e03e8aeSUlrich Hecht #define R8A7793_CLK_SYS_DMAC1 18 620e03e8aeSUlrich Hecht #define R8A7793_CLK_SYS_DMAC0 19 630e03e8aeSUlrich Hecht 640e03e8aeSUlrich Hecht /* MSTP3 */ 650e03e8aeSUlrich Hecht #define R8A7793_CLK_TPU0 4 660e03e8aeSUlrich Hecht #define R8A7793_CLK_SDHI2 11 670e03e8aeSUlrich Hecht #define R8A7793_CLK_SDHI1 12 680e03e8aeSUlrich Hecht #define R8A7793_CLK_SDHI0 14 690e03e8aeSUlrich Hecht #define R8A7793_CLK_MMCIF0 15 700e03e8aeSUlrich Hecht #define R8A7793_CLK_IIC0 18 710e03e8aeSUlrich Hecht #define R8A7793_CLK_PCIEC 19 720e03e8aeSUlrich Hecht #define R8A7793_CLK_IIC1 23 730e03e8aeSUlrich Hecht #define R8A7793_CLK_SSUSB 28 740e03e8aeSUlrich Hecht #define R8A7793_CLK_CMT1 29 750e03e8aeSUlrich Hecht #define R8A7793_CLK_USBDMAC0 30 760e03e8aeSUlrich Hecht #define R8A7793_CLK_USBDMAC1 31 770e03e8aeSUlrich Hecht 780e03e8aeSUlrich Hecht /* MSTP4 */ 790e03e8aeSUlrich Hecht #define R8A7793_CLK_IRQC 7 802f25c2d1SGeert Uytterhoeven #define R8A7793_CLK_INTC_SYS 8 810e03e8aeSUlrich Hecht 820e03e8aeSUlrich Hecht /* MSTP5 */ 830e03e8aeSUlrich Hecht #define R8A7793_CLK_AUDIO_DMAC1 1 840e03e8aeSUlrich Hecht #define R8A7793_CLK_AUDIO_DMAC0 2 850e03e8aeSUlrich Hecht #define R8A7793_CLK_ADSP_MOD 6 860e03e8aeSUlrich Hecht #define R8A7793_CLK_THERMAL 22 870e03e8aeSUlrich Hecht #define R8A7793_CLK_PWM 23 880e03e8aeSUlrich Hecht 890e03e8aeSUlrich Hecht /* MSTP7 */ 900e03e8aeSUlrich Hecht #define R8A7793_CLK_EHCI 3 910e03e8aeSUlrich Hecht #define R8A7793_CLK_HSUSB 4 920e03e8aeSUlrich Hecht #define R8A7793_CLK_HSCIF2 13 930e03e8aeSUlrich Hecht #define R8A7793_CLK_SCIF5 14 940e03e8aeSUlrich Hecht #define R8A7793_CLK_SCIF4 15 950e03e8aeSUlrich Hecht #define R8A7793_CLK_HSCIF1 16 960e03e8aeSUlrich Hecht #define R8A7793_CLK_HSCIF0 17 970e03e8aeSUlrich Hecht #define R8A7793_CLK_SCIF3 18 980e03e8aeSUlrich Hecht #define R8A7793_CLK_SCIF2 19 990e03e8aeSUlrich Hecht #define R8A7793_CLK_SCIF1 20 1000e03e8aeSUlrich Hecht #define R8A7793_CLK_SCIF0 21 1010e03e8aeSUlrich Hecht #define R8A7793_CLK_DU1 23 1020e03e8aeSUlrich Hecht #define R8A7793_CLK_DU0 24 1030e03e8aeSUlrich Hecht #define R8A7793_CLK_LVDS0 26 1040e03e8aeSUlrich Hecht 1050e03e8aeSUlrich Hecht /* MSTP8 */ 1060e03e8aeSUlrich Hecht #define R8A7793_CLK_IPMMU_SGX 0 1070e03e8aeSUlrich Hecht #define R8A7793_CLK_VIN2 9 1080e03e8aeSUlrich Hecht #define R8A7793_CLK_VIN1 10 1090e03e8aeSUlrich Hecht #define R8A7793_CLK_VIN0 11 1100e03e8aeSUlrich Hecht #define R8A7793_CLK_ETHER 13 1110e03e8aeSUlrich Hecht #define R8A7793_CLK_SATA1 14 1120e03e8aeSUlrich Hecht #define R8A7793_CLK_SATA0 15 1130e03e8aeSUlrich Hecht 1140e03e8aeSUlrich Hecht /* MSTP9 */ 1150e03e8aeSUlrich Hecht #define R8A7793_CLK_GPIO7 4 1160e03e8aeSUlrich Hecht #define R8A7793_CLK_GPIO6 5 1170e03e8aeSUlrich Hecht #define R8A7793_CLK_GPIO5 7 1180e03e8aeSUlrich Hecht #define R8A7793_CLK_GPIO4 8 1190e03e8aeSUlrich Hecht #define R8A7793_CLK_GPIO3 9 1200e03e8aeSUlrich Hecht #define R8A7793_CLK_GPIO2 10 1210e03e8aeSUlrich Hecht #define R8A7793_CLK_GPIO1 11 1220e03e8aeSUlrich Hecht #define R8A7793_CLK_GPIO0 12 1230e03e8aeSUlrich Hecht #define R8A7793_CLK_RCAN1 15 1240e03e8aeSUlrich Hecht #define R8A7793_CLK_RCAN0 16 1250e03e8aeSUlrich Hecht #define R8A7793_CLK_QSPI_MOD 17 1260e03e8aeSUlrich Hecht #define R8A7793_CLK_I2C5 25 1270e03e8aeSUlrich Hecht #define R8A7793_CLK_IICDVFS 26 1280e03e8aeSUlrich Hecht #define R8A7793_CLK_I2C4 27 1290e03e8aeSUlrich Hecht #define R8A7793_CLK_I2C3 28 1300e03e8aeSUlrich Hecht #define R8A7793_CLK_I2C2 29 1310e03e8aeSUlrich Hecht #define R8A7793_CLK_I2C1 30 1320e03e8aeSUlrich Hecht #define R8A7793_CLK_I2C0 31 1330e03e8aeSUlrich Hecht 1340e03e8aeSUlrich Hecht /* MSTP10 */ 1350e03e8aeSUlrich Hecht #define R8A7793_CLK_SSI_ALL 5 1360e03e8aeSUlrich Hecht #define R8A7793_CLK_SSI9 6 1370e03e8aeSUlrich Hecht #define R8A7793_CLK_SSI8 7 1380e03e8aeSUlrich Hecht #define R8A7793_CLK_SSI7 8 1390e03e8aeSUlrich Hecht #define R8A7793_CLK_SSI6 9 1400e03e8aeSUlrich Hecht #define R8A7793_CLK_SSI5 10 1410e03e8aeSUlrich Hecht #define R8A7793_CLK_SSI4 11 1420e03e8aeSUlrich Hecht #define R8A7793_CLK_SSI3 12 1430e03e8aeSUlrich Hecht #define R8A7793_CLK_SSI2 13 1440e03e8aeSUlrich Hecht #define R8A7793_CLK_SSI1 14 1450e03e8aeSUlrich Hecht #define R8A7793_CLK_SSI0 15 1460e03e8aeSUlrich Hecht #define R8A7793_CLK_SCU_ALL 17 1470e03e8aeSUlrich Hecht #define R8A7793_CLK_SCU_DVC1 18 1480e03e8aeSUlrich Hecht #define R8A7793_CLK_SCU_DVC0 19 149072d3265SSimon Horman #define R8A7793_CLK_SCU_CTU1_MIX1 20 150072d3265SSimon Horman #define R8A7793_CLK_SCU_CTU0_MIX0 21 1510e03e8aeSUlrich Hecht #define R8A7793_CLK_SCU_SRC9 22 1520e03e8aeSUlrich Hecht #define R8A7793_CLK_SCU_SRC8 23 1530e03e8aeSUlrich Hecht #define R8A7793_CLK_SCU_SRC7 24 1540e03e8aeSUlrich Hecht #define R8A7793_CLK_SCU_SRC6 25 1550e03e8aeSUlrich Hecht #define R8A7793_CLK_SCU_SRC5 26 1560e03e8aeSUlrich Hecht #define R8A7793_CLK_SCU_SRC4 27 1570e03e8aeSUlrich Hecht #define R8A7793_CLK_SCU_SRC3 28 1580e03e8aeSUlrich Hecht #define R8A7793_CLK_SCU_SRC2 29 1590e03e8aeSUlrich Hecht #define R8A7793_CLK_SCU_SRC1 30 1600e03e8aeSUlrich Hecht #define R8A7793_CLK_SCU_SRC0 31 1610e03e8aeSUlrich Hecht 1620e03e8aeSUlrich Hecht /* MSTP11 */ 1630e03e8aeSUlrich Hecht #define R8A7793_CLK_SCIFA3 6 1640e03e8aeSUlrich Hecht #define R8A7793_CLK_SCIFA4 7 1650e03e8aeSUlrich Hecht #define R8A7793_CLK_SCIFA5 8 1660e03e8aeSUlrich Hecht 1670e03e8aeSUlrich Hecht #endif /* __DT_BINDINGS_CLOCK_R8A7793_H__ */ 168