15d169ce7SKuninori Morimoto /* SPDX-License-Identifier: GPL-2.0
25d169ce7SKuninori Morimoto  *
30e03e8aeSUlrich Hecht  * r8a7793 clock definition
40e03e8aeSUlrich Hecht  *
50e03e8aeSUlrich Hecht  * Copyright (C) 2014  Renesas Electronics Corporation
60e03e8aeSUlrich Hecht  */
70e03e8aeSUlrich Hecht 
80e03e8aeSUlrich Hecht #ifndef __DT_BINDINGS_CLOCK_R8A7793_H__
90e03e8aeSUlrich Hecht #define __DT_BINDINGS_CLOCK_R8A7793_H__
100e03e8aeSUlrich Hecht 
110e03e8aeSUlrich Hecht /* CPG */
120e03e8aeSUlrich Hecht #define R8A7793_CLK_MAIN		0
130e03e8aeSUlrich Hecht #define R8A7793_CLK_PLL0		1
140e03e8aeSUlrich Hecht #define R8A7793_CLK_PLL1		2
150e03e8aeSUlrich Hecht #define R8A7793_CLK_PLL3		3
160e03e8aeSUlrich Hecht #define R8A7793_CLK_LB			4
170e03e8aeSUlrich Hecht #define R8A7793_CLK_QSPI		5
180e03e8aeSUlrich Hecht #define R8A7793_CLK_SDH			6
190e03e8aeSUlrich Hecht #define R8A7793_CLK_SD0			7
200e03e8aeSUlrich Hecht #define R8A7793_CLK_Z			8
210e03e8aeSUlrich Hecht #define R8A7793_CLK_RCAN		9
220e03e8aeSUlrich Hecht #define R8A7793_CLK_ADSP		10
230e03e8aeSUlrich Hecht 
240e03e8aeSUlrich Hecht /* MSTP0 */
250e03e8aeSUlrich Hecht #define R8A7793_CLK_MSIOF0		0
260e03e8aeSUlrich Hecht 
270e03e8aeSUlrich Hecht /* MSTP1 */
280e03e8aeSUlrich Hecht #define R8A7793_CLK_VCP0		1
290e03e8aeSUlrich Hecht #define R8A7793_CLK_VPC0		3
300e03e8aeSUlrich Hecht #define R8A7793_CLK_SSP1		9
310e03e8aeSUlrich Hecht #define R8A7793_CLK_TMU1		11
320e03e8aeSUlrich Hecht #define R8A7793_CLK_3DG			12
330e03e8aeSUlrich Hecht #define R8A7793_CLK_2DDMAC		15
340e03e8aeSUlrich Hecht #define R8A7793_CLK_FDP1_1		18
350e03e8aeSUlrich Hecht #define R8A7793_CLK_FDP1_0		19
360e03e8aeSUlrich Hecht #define R8A7793_CLK_TMU3		21
370e03e8aeSUlrich Hecht #define R8A7793_CLK_TMU2		22
380e03e8aeSUlrich Hecht #define R8A7793_CLK_CMT0		24
390e03e8aeSUlrich Hecht #define R8A7793_CLK_TMU0		25
400e03e8aeSUlrich Hecht #define R8A7793_CLK_VSP1_DU1		27
410e03e8aeSUlrich Hecht #define R8A7793_CLK_VSP1_DU0		28
420e03e8aeSUlrich Hecht #define R8A7793_CLK_VSP1_S		31
430e03e8aeSUlrich Hecht 
440e03e8aeSUlrich Hecht /* MSTP2 */
450e03e8aeSUlrich Hecht #define R8A7793_CLK_SCIFA2		2
460e03e8aeSUlrich Hecht #define R8A7793_CLK_SCIFA1		3
470e03e8aeSUlrich Hecht #define R8A7793_CLK_SCIFA0		4
480e03e8aeSUlrich Hecht #define R8A7793_CLK_MSIOF2		5
490e03e8aeSUlrich Hecht #define R8A7793_CLK_SCIFB0		6
500e03e8aeSUlrich Hecht #define R8A7793_CLK_SCIFB1		7
510e03e8aeSUlrich Hecht #define R8A7793_CLK_MSIOF1		8
520e03e8aeSUlrich Hecht #define R8A7793_CLK_SCIFB2		16
530e03e8aeSUlrich Hecht #define R8A7793_CLK_SYS_DMAC1		18
540e03e8aeSUlrich Hecht #define R8A7793_CLK_SYS_DMAC0		19
550e03e8aeSUlrich Hecht 
560e03e8aeSUlrich Hecht /* MSTP3 */
570e03e8aeSUlrich Hecht #define R8A7793_CLK_TPU0		4
580e03e8aeSUlrich Hecht #define R8A7793_CLK_SDHI2		11
590e03e8aeSUlrich Hecht #define R8A7793_CLK_SDHI1		12
600e03e8aeSUlrich Hecht #define R8A7793_CLK_SDHI0		14
610e03e8aeSUlrich Hecht #define R8A7793_CLK_MMCIF0		15
620e03e8aeSUlrich Hecht #define R8A7793_CLK_IIC0		18
630e03e8aeSUlrich Hecht #define R8A7793_CLK_PCIEC		19
640e03e8aeSUlrich Hecht #define R8A7793_CLK_IIC1		23
650e03e8aeSUlrich Hecht #define R8A7793_CLK_SSUSB		28
660e03e8aeSUlrich Hecht #define R8A7793_CLK_CMT1		29
670e03e8aeSUlrich Hecht #define R8A7793_CLK_USBDMAC0		30
680e03e8aeSUlrich Hecht #define R8A7793_CLK_USBDMAC1		31
690e03e8aeSUlrich Hecht 
700e03e8aeSUlrich Hecht /* MSTP4 */
710e03e8aeSUlrich Hecht #define R8A7793_CLK_IRQC		7
722f25c2d1SGeert Uytterhoeven #define R8A7793_CLK_INTC_SYS		8
730e03e8aeSUlrich Hecht 
740e03e8aeSUlrich Hecht /* MSTP5 */
750e03e8aeSUlrich Hecht #define R8A7793_CLK_AUDIO_DMAC1		1
760e03e8aeSUlrich Hecht #define R8A7793_CLK_AUDIO_DMAC0		2
770e03e8aeSUlrich Hecht #define R8A7793_CLK_ADSP_MOD		6
780e03e8aeSUlrich Hecht #define R8A7793_CLK_THERMAL		22
790e03e8aeSUlrich Hecht #define R8A7793_CLK_PWM			23
800e03e8aeSUlrich Hecht 
810e03e8aeSUlrich Hecht /* MSTP7 */
820e03e8aeSUlrich Hecht #define R8A7793_CLK_EHCI		3
830e03e8aeSUlrich Hecht #define R8A7793_CLK_HSUSB		4
840e03e8aeSUlrich Hecht #define R8A7793_CLK_HSCIF2		13
850e03e8aeSUlrich Hecht #define R8A7793_CLK_SCIF5		14
860e03e8aeSUlrich Hecht #define R8A7793_CLK_SCIF4		15
870e03e8aeSUlrich Hecht #define R8A7793_CLK_HSCIF1		16
880e03e8aeSUlrich Hecht #define R8A7793_CLK_HSCIF0		17
890e03e8aeSUlrich Hecht #define R8A7793_CLK_SCIF3		18
900e03e8aeSUlrich Hecht #define R8A7793_CLK_SCIF2		19
910e03e8aeSUlrich Hecht #define R8A7793_CLK_SCIF1		20
920e03e8aeSUlrich Hecht #define R8A7793_CLK_SCIF0		21
930e03e8aeSUlrich Hecht #define R8A7793_CLK_DU1			23
940e03e8aeSUlrich Hecht #define R8A7793_CLK_DU0			24
950e03e8aeSUlrich Hecht #define R8A7793_CLK_LVDS0		26
960e03e8aeSUlrich Hecht 
970e03e8aeSUlrich Hecht /* MSTP8 */
980e03e8aeSUlrich Hecht #define R8A7793_CLK_IPMMU_SGX		0
990e03e8aeSUlrich Hecht #define R8A7793_CLK_VIN2		9
1000e03e8aeSUlrich Hecht #define R8A7793_CLK_VIN1		10
1010e03e8aeSUlrich Hecht #define R8A7793_CLK_VIN0		11
1020e03e8aeSUlrich Hecht #define R8A7793_CLK_ETHER		13
1030e03e8aeSUlrich Hecht #define R8A7793_CLK_SATA1		14
1040e03e8aeSUlrich Hecht #define R8A7793_CLK_SATA0		15
1050e03e8aeSUlrich Hecht 
1060e03e8aeSUlrich Hecht /* MSTP9 */
1070e03e8aeSUlrich Hecht #define R8A7793_CLK_GPIO7		4
1080e03e8aeSUlrich Hecht #define R8A7793_CLK_GPIO6		5
1090e03e8aeSUlrich Hecht #define R8A7793_CLK_GPIO5		7
1100e03e8aeSUlrich Hecht #define R8A7793_CLK_GPIO4		8
1110e03e8aeSUlrich Hecht #define R8A7793_CLK_GPIO3		9
1120e03e8aeSUlrich Hecht #define R8A7793_CLK_GPIO2		10
1130e03e8aeSUlrich Hecht #define R8A7793_CLK_GPIO1		11
1140e03e8aeSUlrich Hecht #define R8A7793_CLK_GPIO0		12
1150e03e8aeSUlrich Hecht #define R8A7793_CLK_RCAN1		15
1160e03e8aeSUlrich Hecht #define R8A7793_CLK_RCAN0		16
1170e03e8aeSUlrich Hecht #define R8A7793_CLK_QSPI_MOD		17
1180e03e8aeSUlrich Hecht #define R8A7793_CLK_I2C5		25
1190e03e8aeSUlrich Hecht #define R8A7793_CLK_IICDVFS		26
1200e03e8aeSUlrich Hecht #define R8A7793_CLK_I2C4		27
1210e03e8aeSUlrich Hecht #define R8A7793_CLK_I2C3		28
1220e03e8aeSUlrich Hecht #define R8A7793_CLK_I2C2		29
1230e03e8aeSUlrich Hecht #define R8A7793_CLK_I2C1		30
1240e03e8aeSUlrich Hecht #define R8A7793_CLK_I2C0		31
1250e03e8aeSUlrich Hecht 
1260e03e8aeSUlrich Hecht /* MSTP10 */
1270e03e8aeSUlrich Hecht #define R8A7793_CLK_SSI_ALL		5
1280e03e8aeSUlrich Hecht #define R8A7793_CLK_SSI9		6
1290e03e8aeSUlrich Hecht #define R8A7793_CLK_SSI8		7
1300e03e8aeSUlrich Hecht #define R8A7793_CLK_SSI7		8
1310e03e8aeSUlrich Hecht #define R8A7793_CLK_SSI6		9
1320e03e8aeSUlrich Hecht #define R8A7793_CLK_SSI5		10
1330e03e8aeSUlrich Hecht #define R8A7793_CLK_SSI4		11
1340e03e8aeSUlrich Hecht #define R8A7793_CLK_SSI3		12
1350e03e8aeSUlrich Hecht #define R8A7793_CLK_SSI2		13
1360e03e8aeSUlrich Hecht #define R8A7793_CLK_SSI1		14
1370e03e8aeSUlrich Hecht #define R8A7793_CLK_SSI0		15
1380e03e8aeSUlrich Hecht #define R8A7793_CLK_SCU_ALL		17
1390e03e8aeSUlrich Hecht #define R8A7793_CLK_SCU_DVC1		18
1400e03e8aeSUlrich Hecht #define R8A7793_CLK_SCU_DVC0		19
141072d3265SSimon Horman #define R8A7793_CLK_SCU_CTU1_MIX1	20
142072d3265SSimon Horman #define R8A7793_CLK_SCU_CTU0_MIX0	21
1430e03e8aeSUlrich Hecht #define R8A7793_CLK_SCU_SRC9		22
1440e03e8aeSUlrich Hecht #define R8A7793_CLK_SCU_SRC8		23
1450e03e8aeSUlrich Hecht #define R8A7793_CLK_SCU_SRC7		24
1460e03e8aeSUlrich Hecht #define R8A7793_CLK_SCU_SRC6		25
1470e03e8aeSUlrich Hecht #define R8A7793_CLK_SCU_SRC5		26
1480e03e8aeSUlrich Hecht #define R8A7793_CLK_SCU_SRC4		27
1490e03e8aeSUlrich Hecht #define R8A7793_CLK_SCU_SRC3		28
1500e03e8aeSUlrich Hecht #define R8A7793_CLK_SCU_SRC2		29
1510e03e8aeSUlrich Hecht #define R8A7793_CLK_SCU_SRC1		30
1520e03e8aeSUlrich Hecht #define R8A7793_CLK_SCU_SRC0		31
1530e03e8aeSUlrich Hecht 
1540e03e8aeSUlrich Hecht /* MSTP11 */
1550e03e8aeSUlrich Hecht #define R8A7793_CLK_SCIFA3		6
1560e03e8aeSUlrich Hecht #define R8A7793_CLK_SCIFA4		7
1570e03e8aeSUlrich Hecht #define R8A7793_CLK_SCIFA5		8
1580e03e8aeSUlrich Hecht 
1590e03e8aeSUlrich Hecht #endif /* __DT_BINDINGS_CLOCK_R8A7793_H__ */
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