1 /* 2 * Copyright 2013 Ideas On Board SPRL 3 * 4 * This program is free software; you can redistribute it and/or modify 5 * it under the terms of the GNU General Public License as published by 6 * the Free Software Foundation; either version 2 of the License, or 7 * (at your option) any later version. 8 */ 9 10 #ifndef __DT_BINDINGS_CLOCK_R8A7790_H__ 11 #define __DT_BINDINGS_CLOCK_R8A7790_H__ 12 13 /* CPG */ 14 #define R8A7790_CLK_MAIN 0 15 #define R8A7790_CLK_PLL0 1 16 #define R8A7790_CLK_PLL1 2 17 #define R8A7790_CLK_PLL3 3 18 #define R8A7790_CLK_LB 4 19 #define R8A7790_CLK_QSPI 5 20 #define R8A7790_CLK_SDH 6 21 #define R8A7790_CLK_SD0 7 22 #define R8A7790_CLK_SD1 8 23 #define R8A7790_CLK_Z 9 24 25 /* MSTP0 */ 26 #define R8A7790_CLK_MSIOF0 0 27 28 /* MSTP1 */ 29 #define R8A7790_CLK_TMU1 11 30 #define R8A7790_CLK_TMU3 21 31 #define R8A7790_CLK_TMU2 22 32 #define R8A7790_CLK_CMT0 24 33 #define R8A7790_CLK_TMU0 25 34 #define R8A7790_CLK_VSP1_DU1 27 35 #define R8A7790_CLK_VSP1_DU0 28 36 #define R8A7790_CLK_VSP1_RT 30 37 #define R8A7790_CLK_VSP1_SY 31 38 39 /* MSTP2 */ 40 #define R8A7790_CLK_SCIFA2 2 41 #define R8A7790_CLK_SCIFA1 3 42 #define R8A7790_CLK_SCIFA0 4 43 #define R8A7790_CLK_MSIOF2 5 44 #define R8A7790_CLK_SCIFB0 6 45 #define R8A7790_CLK_SCIFB1 7 46 #define R8A7790_CLK_MSIOF1 8 47 #define R8A7790_CLK_MSIOF3 15 48 #define R8A7790_CLK_SCIFB2 16 49 #define R8A7790_CLK_SYS_DMAC0 18 50 #define R8A7790_CLK_SYS_DMAC1 19 51 52 /* MSTP3 */ 53 #define R8A7790_CLK_TPU0 4 54 #define R8A7790_CLK_MMCIF1 5 55 #define R8A7790_CLK_SDHI3 11 56 #define R8A7790_CLK_SDHI2 12 57 #define R8A7790_CLK_SDHI1 13 58 #define R8A7790_CLK_SDHI0 14 59 #define R8A7790_CLK_MMCIF0 15 60 #define R8A7790_CLK_SSUSB 28 61 #define R8A7790_CLK_CMT1 29 62 #define R8A7790_CLK_USBDMAC0 30 63 #define R8A7790_CLK_USBDMAC1 31 64 65 /* MSTP5 */ 66 #define R8A7790_CLK_THERMAL 22 67 #define R8A7790_CLK_PWM 23 68 69 /* MSTP7 */ 70 #define R8A7790_CLK_EHCI 3 71 #define R8A7790_CLK_HSUSB 4 72 #define R8A7790_CLK_HSCIF1 16 73 #define R8A7790_CLK_HSCIF0 17 74 #define R8A7790_CLK_SCIF1 20 75 #define R8A7790_CLK_SCIF0 21 76 #define R8A7790_CLK_DU2 22 77 #define R8A7790_CLK_DU1 23 78 #define R8A7790_CLK_DU0 24 79 #define R8A7790_CLK_LVDS1 25 80 #define R8A7790_CLK_LVDS0 26 81 82 /* MSTP8 */ 83 #define R8A7790_CLK_VIN3 8 84 #define R8A7790_CLK_VIN2 9 85 #define R8A7790_CLK_VIN1 10 86 #define R8A7790_CLK_VIN0 11 87 #define R8A7790_CLK_ETHER 13 88 #define R8A7790_CLK_SATA1 14 89 #define R8A7790_CLK_SATA0 15 90 91 /* MSTP9 */ 92 #define R8A7790_CLK_GPIO5 7 93 #define R8A7790_CLK_GPIO4 8 94 #define R8A7790_CLK_GPIO3 9 95 #define R8A7790_CLK_GPIO2 10 96 #define R8A7790_CLK_GPIO1 11 97 #define R8A7790_CLK_GPIO0 12 98 #define R8A7790_CLK_RCAN1 15 99 #define R8A7790_CLK_RCAN0 16 100 #define R8A7790_CLK_QSPI_MOD 17 101 #define R8A7790_CLK_IICDVFS 26 102 #define R8A7790_CLK_I2C3 28 103 #define R8A7790_CLK_I2C2 29 104 #define R8A7790_CLK_I2C1 30 105 #define R8A7790_CLK_I2C0 31 106 107 #endif /* __DT_BINDINGS_CLOCK_R8A7790_H__ */ 108