1477fa2bcSUlrich Hecht /* 2477fa2bcSUlrich Hecht * Copyright 2014 Ulrich Hecht 3477fa2bcSUlrich Hecht * 4477fa2bcSUlrich Hecht * This program is free software; you can redistribute it and/or modify 5477fa2bcSUlrich Hecht * it under the terms of the GNU General Public License as published by 6477fa2bcSUlrich Hecht * the Free Software Foundation; either version 2 of the License, or 7477fa2bcSUlrich Hecht * (at your option) any later version. 8477fa2bcSUlrich Hecht */ 9477fa2bcSUlrich Hecht 10477fa2bcSUlrich Hecht #ifndef __DT_BINDINGS_CLOCK_R8A7740_H__ 11477fa2bcSUlrich Hecht #define __DT_BINDINGS_CLOCK_R8A7740_H__ 12477fa2bcSUlrich Hecht 13477fa2bcSUlrich Hecht /* CPG */ 14477fa2bcSUlrich Hecht #define R8A7740_CLK_SYSTEM 0 15477fa2bcSUlrich Hecht #define R8A7740_CLK_PLLC0 1 16477fa2bcSUlrich Hecht #define R8A7740_CLK_PLLC1 2 17477fa2bcSUlrich Hecht #define R8A7740_CLK_PLLC2 3 18477fa2bcSUlrich Hecht #define R8A7740_CLK_R 4 19477fa2bcSUlrich Hecht #define R8A7740_CLK_USB24S 5 20477fa2bcSUlrich Hecht #define R8A7740_CLK_I 6 21477fa2bcSUlrich Hecht #define R8A7740_CLK_ZG 7 22477fa2bcSUlrich Hecht #define R8A7740_CLK_B 8 23477fa2bcSUlrich Hecht #define R8A7740_CLK_M1 9 24477fa2bcSUlrich Hecht #define R8A7740_CLK_HP 10 25477fa2bcSUlrich Hecht #define R8A7740_CLK_HPP 11 26477fa2bcSUlrich Hecht #define R8A7740_CLK_USBP 12 27477fa2bcSUlrich Hecht #define R8A7740_CLK_S 13 28477fa2bcSUlrich Hecht #define R8A7740_CLK_ZB 14 29477fa2bcSUlrich Hecht #define R8A7740_CLK_M3 15 30477fa2bcSUlrich Hecht #define R8A7740_CLK_CP 16 31477fa2bcSUlrich Hecht 32477fa2bcSUlrich Hecht /* MSTP1 */ 33477fa2bcSUlrich Hecht #define R8A7740_CLK_CEU21 28 34477fa2bcSUlrich Hecht #define R8A7740_CLK_CEU20 27 35477fa2bcSUlrich Hecht #define R8A7740_CLK_TMU0 25 36477fa2bcSUlrich Hecht #define R8A7740_CLK_LCDC1 17 37477fa2bcSUlrich Hecht #define R8A7740_CLK_IIC0 16 38477fa2bcSUlrich Hecht #define R8A7740_CLK_TMU1 11 39477fa2bcSUlrich Hecht #define R8A7740_CLK_LCDC0 0 40477fa2bcSUlrich Hecht 41477fa2bcSUlrich Hecht /* MSTP2 */ 42477fa2bcSUlrich Hecht #define R8A7740_CLK_SCIFA6 30 433ab84ee9SGeert Uytterhoeven #define R8A7740_CLK_INTCA 29 44477fa2bcSUlrich Hecht #define R8A7740_CLK_SCIFA7 22 45477fa2bcSUlrich Hecht #define R8A7740_CLK_DMAC1 18 46477fa2bcSUlrich Hecht #define R8A7740_CLK_DMAC2 17 47477fa2bcSUlrich Hecht #define R8A7740_CLK_DMAC3 16 48477fa2bcSUlrich Hecht #define R8A7740_CLK_USBDMAC 14 49477fa2bcSUlrich Hecht #define R8A7740_CLK_SCIFA5 7 50477fa2bcSUlrich Hecht #define R8A7740_CLK_SCIFB 6 51477fa2bcSUlrich Hecht #define R8A7740_CLK_SCIFA0 4 52477fa2bcSUlrich Hecht #define R8A7740_CLK_SCIFA1 3 53477fa2bcSUlrich Hecht #define R8A7740_CLK_SCIFA2 2 54477fa2bcSUlrich Hecht #define R8A7740_CLK_SCIFA3 1 55477fa2bcSUlrich Hecht #define R8A7740_CLK_SCIFA4 0 56477fa2bcSUlrich Hecht 57477fa2bcSUlrich Hecht /* MSTP3 */ 58477fa2bcSUlrich Hecht #define R8A7740_CLK_CMT1 29 59477fa2bcSUlrich Hecht #define R8A7740_CLK_FSI 28 60477fa2bcSUlrich Hecht #define R8A7740_CLK_IIC1 23 61477fa2bcSUlrich Hecht #define R8A7740_CLK_USBF 20 62477fa2bcSUlrich Hecht #define R8A7740_CLK_SDHI0 14 63477fa2bcSUlrich Hecht #define R8A7740_CLK_SDHI1 13 64477fa2bcSUlrich Hecht #define R8A7740_CLK_MMC 12 65477fa2bcSUlrich Hecht #define R8A7740_CLK_GETHER 9 66477fa2bcSUlrich Hecht #define R8A7740_CLK_TPU0 4 67477fa2bcSUlrich Hecht 68477fa2bcSUlrich Hecht /* MSTP4 */ 69477fa2bcSUlrich Hecht #define R8A7740_CLK_USBH 16 70477fa2bcSUlrich Hecht #define R8A7740_CLK_SDHI2 15 71477fa2bcSUlrich Hecht #define R8A7740_CLK_USBFUNC 7 72477fa2bcSUlrich Hecht #define R8A7740_CLK_USBPHY 6 73477fa2bcSUlrich Hecht 74477fa2bcSUlrich Hecht /* SUBCK* */ 75477fa2bcSUlrich Hecht #define R8A7740_CLK_SUBCK 9 76477fa2bcSUlrich Hecht #define R8A7740_CLK_SUBCK2 10 77477fa2bcSUlrich Hecht 78477fa2bcSUlrich Hecht #endif /* __DT_BINDINGS_CLOCK_R8A7740_H__ */ 79