1 /* 2 * Copyright (C) 2014 Renesas Solutions Corp. 3 * Copyright (C) 2014 Wolfram Sang, Sang Engineering <wsa@sang-engineering.com> 4 * 5 * This program is free software; you can redistribute it and/or modify 6 * it under the terms of the GNU General Public License as published by 7 * the Free Software Foundation; version 2 of the License. 8 */ 9 10 #ifndef __DT_BINDINGS_CLOCK_R7S72100_H__ 11 #define __DT_BINDINGS_CLOCK_R7S72100_H__ 12 13 #define R7S72100_CLK_PLL 0 14 15 /* MSTP2 */ 16 #define R7S72100_CLK_CORESIGHT 0 17 18 /* MSTP3 */ 19 #define R7S72100_CLK_IEBUS 7 20 #define R7S72100_CLK_IRDA 6 21 #define R7S72100_CLK_LIN0 5 22 #define R7S72100_CLK_LIN1 4 23 #define R7S72100_CLK_MTU2 3 24 #define R7S72100_CLK_CAN 2 25 #define R7S72100_CLK_ADCPWR 1 26 #define R7S72100_CLK_PWM 0 27 28 /* MSTP4 */ 29 #define R7S72100_CLK_SCIF0 7 30 #define R7S72100_CLK_SCIF1 6 31 #define R7S72100_CLK_SCIF2 5 32 #define R7S72100_CLK_SCIF3 4 33 #define R7S72100_CLK_SCIF4 3 34 #define R7S72100_CLK_SCIF5 2 35 #define R7S72100_CLK_SCIF6 1 36 #define R7S72100_CLK_SCIF7 0 37 38 /* MSTP5 */ 39 #define R7S72100_CLK_SCI0 7 40 #define R7S72100_CLK_SCI1 6 41 #define R7S72100_CLK_SG0 5 42 #define R7S72100_CLK_SG1 4 43 #define R7S72100_CLK_SG2 3 44 #define R7S72100_CLK_SG3 2 45 #define R7S72100_CLK_OSTM0 1 46 #define R7S72100_CLK_OSTM1 0 47 48 /* MSTP6 */ 49 #define R7S72100_CLK_ADC 7 50 #define R7S72100_CLK_CEU 6 51 #define R7S72100_CLK_DOC0 5 52 #define R7S72100_CLK_DOC1 4 53 #define R7S72100_CLK_DRC0 3 54 #define R7S72100_CLK_DRC1 2 55 #define R7S72100_CLK_JCU 1 56 #define R7S72100_CLK_RTC 0 57 58 /* MSTP7 */ 59 #define R7S72100_CLK_VDEC0 7 60 #define R7S72100_CLK_VDEC1 6 61 #define R7S72100_CLK_ETHER 4 62 #define R7S72100_CLK_NAND 3 63 #define R7S72100_CLK_USB0 1 64 #define R7S72100_CLK_USB1 0 65 66 /* MSTP8 */ 67 #define R7S72100_CLK_IMR0 7 68 #define R7S72100_CLK_IMR1 6 69 #define R7S72100_CLK_IMRDISP 5 70 #define R7S72100_CLK_MMCIF 4 71 #define R7S72100_CLK_MLB 3 72 #define R7S72100_CLK_ETHAVB 2 73 #define R7S72100_CLK_SCUX 1 74 75 /* MSTP9 */ 76 #define R7S72100_CLK_I2C0 7 77 #define R7S72100_CLK_I2C1 6 78 #define R7S72100_CLK_I2C2 5 79 #define R7S72100_CLK_I2C3 4 80 #define R7S72100_CLK_SPIBSC0 3 81 #define R7S72100_CLK_SPIBSC1 2 82 #define R7S72100_CLK_VDC50 1 /* and LVDS */ 83 #define R7S72100_CLK_VDC51 0 84 85 /* MSTP10 */ 86 #define R7S72100_CLK_SPI0 7 87 #define R7S72100_CLK_SPI1 6 88 #define R7S72100_CLK_SPI2 5 89 #define R7S72100_CLK_SPI3 4 90 #define R7S72100_CLK_SPI4 3 91 #define R7S72100_CLK_CDROM 2 92 #define R7S72100_CLK_SPDIF 1 93 #define R7S72100_CLK_RGPVG2 0 94 95 /* MSTP11 */ 96 #define R7S72100_CLK_SSI0 5 97 #define R7S72100_CLK_SSI1 4 98 #define R7S72100_CLK_SSI2 3 99 #define R7S72100_CLK_SSI3 2 100 #define R7S72100_CLK_SSI4 1 101 #define R7S72100_CLK_SSI5 0 102 103 /* MSTP12 */ 104 #define R7S72100_CLK_SDHI00 3 105 #define R7S72100_CLK_SDHI01 2 106 #define R7S72100_CLK_SDHI10 1 107 #define R7S72100_CLK_SDHI11 0 108 109 /* MSTP13 */ 110 #define R7S72100_CLK_PIX1 2 111 #define R7S72100_CLK_PIX0 1 112 113 #endif /* __DT_BINDINGS_CLOCK_R7S72100_H__ */ 114