19c92ab61SThomas Gleixner /* SPDX-License-Identifier: GPL-2.0-only */ 200f64b58SGeorgi Djakov /* 300f64b58SGeorgi Djakov * Copyright 2015 Linaro Limited 400f64b58SGeorgi Djakov */ 500f64b58SGeorgi Djakov 600f64b58SGeorgi Djakov #ifndef _DT_BINDINGS_CLK_MSM_RPMCC_H 700f64b58SGeorgi Djakov #define _DT_BINDINGS_CLK_MSM_RPMCC_H 800f64b58SGeorgi Djakov 9685dc94bSBjorn Andersson /* RPM clocks */ 10872f91b5SGeorgi Djakov #define RPM_PXO_CLK 0 11872f91b5SGeorgi Djakov #define RPM_PXO_A_CLK 1 12872f91b5SGeorgi Djakov #define RPM_CXO_CLK 2 13872f91b5SGeorgi Djakov #define RPM_CXO_A_CLK 3 14872f91b5SGeorgi Djakov #define RPM_APPS_FABRIC_CLK 4 15872f91b5SGeorgi Djakov #define RPM_APPS_FABRIC_A_CLK 5 16872f91b5SGeorgi Djakov #define RPM_CFPB_CLK 6 17872f91b5SGeorgi Djakov #define RPM_CFPB_A_CLK 7 18872f91b5SGeorgi Djakov #define RPM_QDSS_CLK 8 19872f91b5SGeorgi Djakov #define RPM_QDSS_A_CLK 9 20872f91b5SGeorgi Djakov #define RPM_DAYTONA_FABRIC_CLK 10 21872f91b5SGeorgi Djakov #define RPM_DAYTONA_FABRIC_A_CLK 11 22872f91b5SGeorgi Djakov #define RPM_EBI1_CLK 12 23872f91b5SGeorgi Djakov #define RPM_EBI1_A_CLK 13 24872f91b5SGeorgi Djakov #define RPM_MM_FABRIC_CLK 14 25872f91b5SGeorgi Djakov #define RPM_MM_FABRIC_A_CLK 15 26872f91b5SGeorgi Djakov #define RPM_MMFPB_CLK 16 27872f91b5SGeorgi Djakov #define RPM_MMFPB_A_CLK 17 28872f91b5SGeorgi Djakov #define RPM_SYS_FABRIC_CLK 18 29872f91b5SGeorgi Djakov #define RPM_SYS_FABRIC_A_CLK 19 30872f91b5SGeorgi Djakov #define RPM_SFPB_CLK 20 31872f91b5SGeorgi Djakov #define RPM_SFPB_A_CLK 21 32856e6bb9SLinus Walleij #define RPM_SMI_CLK 22 33856e6bb9SLinus Walleij #define RPM_SMI_A_CLK 23 34856e6bb9SLinus Walleij #define RPM_PLL4_CLK 24 358bcde658SSrinivas Kandagatla #define RPM_XO_D0 25 368bcde658SSrinivas Kandagatla #define RPM_XO_D1 26 378bcde658SSrinivas Kandagatla #define RPM_XO_A0 27 388bcde658SSrinivas Kandagatla #define RPM_XO_A1 28 398bcde658SSrinivas Kandagatla #define RPM_XO_A2 29 40872f91b5SGeorgi Djakov 41685dc94bSBjorn Andersson /* SMD RPM clocks */ 4200f64b58SGeorgi Djakov #define RPM_SMD_XO_CLK_SRC 0 4300f64b58SGeorgi Djakov #define RPM_SMD_XO_A_CLK_SRC 1 4400f64b58SGeorgi Djakov #define RPM_SMD_PCNOC_CLK 2 4500f64b58SGeorgi Djakov #define RPM_SMD_PCNOC_A_CLK 3 4600f64b58SGeorgi Djakov #define RPM_SMD_SNOC_CLK 4 4700f64b58SGeorgi Djakov #define RPM_SMD_SNOC_A_CLK 5 4800f64b58SGeorgi Djakov #define RPM_SMD_BIMC_CLK 6 4900f64b58SGeorgi Djakov #define RPM_SMD_BIMC_A_CLK 7 5000f64b58SGeorgi Djakov #define RPM_SMD_QDSS_CLK 8 5100f64b58SGeorgi Djakov #define RPM_SMD_QDSS_A_CLK 9 5200f64b58SGeorgi Djakov #define RPM_SMD_BB_CLK1 10 5300f64b58SGeorgi Djakov #define RPM_SMD_BB_CLK1_A 11 5400f64b58SGeorgi Djakov #define RPM_SMD_BB_CLK2 12 5500f64b58SGeorgi Djakov #define RPM_SMD_BB_CLK2_A 13 5600f64b58SGeorgi Djakov #define RPM_SMD_RF_CLK1 14 5700f64b58SGeorgi Djakov #define RPM_SMD_RF_CLK1_A 15 5800f64b58SGeorgi Djakov #define RPM_SMD_RF_CLK2 16 5900f64b58SGeorgi Djakov #define RPM_SMD_RF_CLK2_A 17 6000f64b58SGeorgi Djakov #define RPM_SMD_BB_CLK1_PIN 18 6100f64b58SGeorgi Djakov #define RPM_SMD_BB_CLK1_A_PIN 19 6200f64b58SGeorgi Djakov #define RPM_SMD_BB_CLK2_PIN 20 6300f64b58SGeorgi Djakov #define RPM_SMD_BB_CLK2_A_PIN 21 6400f64b58SGeorgi Djakov #define RPM_SMD_RF_CLK1_PIN 22 6500f64b58SGeorgi Djakov #define RPM_SMD_RF_CLK1_A_PIN 23 6600f64b58SGeorgi Djakov #define RPM_SMD_RF_CLK2_PIN 24 6700f64b58SGeorgi Djakov #define RPM_SMD_RF_CLK2_A_PIN 25 68685dc94bSBjorn Andersson #define RPM_SMD_PNOC_CLK 26 69685dc94bSBjorn Andersson #define RPM_SMD_PNOC_A_CLK 27 70685dc94bSBjorn Andersson #define RPM_SMD_CNOC_CLK 28 71685dc94bSBjorn Andersson #define RPM_SMD_CNOC_A_CLK 29 72685dc94bSBjorn Andersson #define RPM_SMD_MMSSNOC_AHB_CLK 30 73685dc94bSBjorn Andersson #define RPM_SMD_MMSSNOC_AHB_A_CLK 31 74685dc94bSBjorn Andersson #define RPM_SMD_GFX3D_CLK_SRC 32 75685dc94bSBjorn Andersson #define RPM_SMD_GFX3D_A_CLK_SRC 33 76685dc94bSBjorn Andersson #define RPM_SMD_OCMEMGX_CLK 34 77685dc94bSBjorn Andersson #define RPM_SMD_OCMEMGX_A_CLK 35 78685dc94bSBjorn Andersson #define RPM_SMD_CXO_D0 36 79685dc94bSBjorn Andersson #define RPM_SMD_CXO_D0_A 37 80685dc94bSBjorn Andersson #define RPM_SMD_CXO_D1 38 81685dc94bSBjorn Andersson #define RPM_SMD_CXO_D1_A 39 82685dc94bSBjorn Andersson #define RPM_SMD_CXO_A0 40 83685dc94bSBjorn Andersson #define RPM_SMD_CXO_A0_A 41 84685dc94bSBjorn Andersson #define RPM_SMD_CXO_A1 42 85685dc94bSBjorn Andersson #define RPM_SMD_CXO_A1_A 43 86685dc94bSBjorn Andersson #define RPM_SMD_CXO_A2 44 87685dc94bSBjorn Andersson #define RPM_SMD_CXO_A2_A 45 88685dc94bSBjorn Andersson #define RPM_SMD_DIV_CLK1 46 89685dc94bSBjorn Andersson #define RPM_SMD_DIV_A_CLK1 47 90685dc94bSBjorn Andersson #define RPM_SMD_DIV_CLK2 48 91685dc94bSBjorn Andersson #define RPM_SMD_DIV_A_CLK2 49 92685dc94bSBjorn Andersson #define RPM_SMD_DIFF_CLK 50 93685dc94bSBjorn Andersson #define RPM_SMD_DIFF_A_CLK 51 94685dc94bSBjorn Andersson #define RPM_SMD_CXO_D0_PIN 52 95685dc94bSBjorn Andersson #define RPM_SMD_CXO_D0_A_PIN 53 96685dc94bSBjorn Andersson #define RPM_SMD_CXO_D1_PIN 54 97685dc94bSBjorn Andersson #define RPM_SMD_CXO_D1_A_PIN 55 98685dc94bSBjorn Andersson #define RPM_SMD_CXO_A0_PIN 56 99685dc94bSBjorn Andersson #define RPM_SMD_CXO_A0_A_PIN 57 100685dc94bSBjorn Andersson #define RPM_SMD_CXO_A1_PIN 58 101685dc94bSBjorn Andersson #define RPM_SMD_CXO_A1_A_PIN 59 102685dc94bSBjorn Andersson #define RPM_SMD_CXO_A2_PIN 60 103685dc94bSBjorn Andersson #define RPM_SMD_CXO_A2_A_PIN 61 1047066fdd0SRajendra Nayak #define RPM_SMD_AGGR1_NOC_CLK 62 1057066fdd0SRajendra Nayak #define RPM_SMD_AGGR1_NOC_A_CLK 63 1067066fdd0SRajendra Nayak #define RPM_SMD_AGGR2_NOC_CLK 64 1077066fdd0SRajendra Nayak #define RPM_SMD_AGGR2_NOC_A_CLK 65 1087066fdd0SRajendra Nayak #define RPM_SMD_MMAXI_CLK 66 1097066fdd0SRajendra Nayak #define RPM_SMD_MMAXI_A_CLK 67 1107066fdd0SRajendra Nayak #define RPM_SMD_IPA_CLK 68 1117066fdd0SRajendra Nayak #define RPM_SMD_IPA_A_CLK 69 1127066fdd0SRajendra Nayak #define RPM_SMD_CE1_CLK 70 1137066fdd0SRajendra Nayak #define RPM_SMD_CE1_A_CLK 71 1147066fdd0SRajendra Nayak #define RPM_SMD_DIV_CLK3 72 1157066fdd0SRajendra Nayak #define RPM_SMD_DIV_A_CLK3 73 1167066fdd0SRajendra Nayak #define RPM_SMD_LN_BB_CLK 74 1177066fdd0SRajendra Nayak #define RPM_SMD_LN_BB_A_CLK 75 118eaeee28dSTaniya Das #define RPM_SMD_BIMC_GPU_CLK 76 119eaeee28dSTaniya Das #define RPM_SMD_BIMC_GPU_A_CLK 77 120eaeee28dSTaniya Das #define RPM_SMD_QPIC_CLK 78 121eaeee28dSTaniya Das #define RPM_SMD_QPIC_CLK_A 79 1226131dc81SJeffrey Hugo #define RPM_SMD_LN_BB_CLK1 80 1236131dc81SJeffrey Hugo #define RPM_SMD_LN_BB_CLK1_A 81 1246131dc81SJeffrey Hugo #define RPM_SMD_LN_BB_CLK2 82 1256131dc81SJeffrey Hugo #define RPM_SMD_LN_BB_CLK2_A 83 1266131dc81SJeffrey Hugo #define RPM_SMD_LN_BB_CLK3_PIN 84 1276131dc81SJeffrey Hugo #define RPM_SMD_LN_BB_CLK3_A_PIN 85 1286131dc81SJeffrey Hugo #define RPM_SMD_RF_CLK3 86 1296131dc81SJeffrey Hugo #define RPM_SMD_RF_CLK3_A 87 1306131dc81SJeffrey Hugo #define RPM_SMD_RF_CLK3_PIN 88 1316131dc81SJeffrey Hugo #define RPM_SMD_RF_CLK3_A_PIN 89 13200f64b58SGeorgi Djakov 13300f64b58SGeorgi Djakov #endif 134