100f64b58SGeorgi Djakov /* 200f64b58SGeorgi Djakov * Copyright 2015 Linaro Limited 300f64b58SGeorgi Djakov * 400f64b58SGeorgi Djakov * This software is licensed under the terms of the GNU General Public 500f64b58SGeorgi Djakov * License version 2, as published by the Free Software Foundation, and 600f64b58SGeorgi Djakov * may be copied, distributed, and modified under those terms. 700f64b58SGeorgi Djakov * 800f64b58SGeorgi Djakov * This program is distributed in the hope that it will be useful, 900f64b58SGeorgi Djakov * but WITHOUT ANY WARRANTY; without even the implied warranty of 1000f64b58SGeorgi Djakov * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 1100f64b58SGeorgi Djakov * GNU General Public License for more details. 1200f64b58SGeorgi Djakov */ 1300f64b58SGeorgi Djakov 1400f64b58SGeorgi Djakov #ifndef _DT_BINDINGS_CLK_MSM_RPMCC_H 1500f64b58SGeorgi Djakov #define _DT_BINDINGS_CLK_MSM_RPMCC_H 1600f64b58SGeorgi Djakov 17685dc94bSBjorn Andersson /* RPM clocks */ 18872f91b5SGeorgi Djakov #define RPM_PXO_CLK 0 19872f91b5SGeorgi Djakov #define RPM_PXO_A_CLK 1 20872f91b5SGeorgi Djakov #define RPM_CXO_CLK 2 21872f91b5SGeorgi Djakov #define RPM_CXO_A_CLK 3 22872f91b5SGeorgi Djakov #define RPM_APPS_FABRIC_CLK 4 23872f91b5SGeorgi Djakov #define RPM_APPS_FABRIC_A_CLK 5 24872f91b5SGeorgi Djakov #define RPM_CFPB_CLK 6 25872f91b5SGeorgi Djakov #define RPM_CFPB_A_CLK 7 26872f91b5SGeorgi Djakov #define RPM_QDSS_CLK 8 27872f91b5SGeorgi Djakov #define RPM_QDSS_A_CLK 9 28872f91b5SGeorgi Djakov #define RPM_DAYTONA_FABRIC_CLK 10 29872f91b5SGeorgi Djakov #define RPM_DAYTONA_FABRIC_A_CLK 11 30872f91b5SGeorgi Djakov #define RPM_EBI1_CLK 12 31872f91b5SGeorgi Djakov #define RPM_EBI1_A_CLK 13 32872f91b5SGeorgi Djakov #define RPM_MM_FABRIC_CLK 14 33872f91b5SGeorgi Djakov #define RPM_MM_FABRIC_A_CLK 15 34872f91b5SGeorgi Djakov #define RPM_MMFPB_CLK 16 35872f91b5SGeorgi Djakov #define RPM_MMFPB_A_CLK 17 36872f91b5SGeorgi Djakov #define RPM_SYS_FABRIC_CLK 18 37872f91b5SGeorgi Djakov #define RPM_SYS_FABRIC_A_CLK 19 38872f91b5SGeorgi Djakov #define RPM_SFPB_CLK 20 39872f91b5SGeorgi Djakov #define RPM_SFPB_A_CLK 21 40856e6bb9SLinus Walleij #define RPM_SMI_CLK 22 41856e6bb9SLinus Walleij #define RPM_SMI_A_CLK 23 42856e6bb9SLinus Walleij #define RPM_PLL4_CLK 24 43872f91b5SGeorgi Djakov 44685dc94bSBjorn Andersson /* SMD RPM clocks */ 4500f64b58SGeorgi Djakov #define RPM_SMD_XO_CLK_SRC 0 4600f64b58SGeorgi Djakov #define RPM_SMD_XO_A_CLK_SRC 1 4700f64b58SGeorgi Djakov #define RPM_SMD_PCNOC_CLK 2 4800f64b58SGeorgi Djakov #define RPM_SMD_PCNOC_A_CLK 3 4900f64b58SGeorgi Djakov #define RPM_SMD_SNOC_CLK 4 5000f64b58SGeorgi Djakov #define RPM_SMD_SNOC_A_CLK 5 5100f64b58SGeorgi Djakov #define RPM_SMD_BIMC_CLK 6 5200f64b58SGeorgi Djakov #define RPM_SMD_BIMC_A_CLK 7 5300f64b58SGeorgi Djakov #define RPM_SMD_QDSS_CLK 8 5400f64b58SGeorgi Djakov #define RPM_SMD_QDSS_A_CLK 9 5500f64b58SGeorgi Djakov #define RPM_SMD_BB_CLK1 10 5600f64b58SGeorgi Djakov #define RPM_SMD_BB_CLK1_A 11 5700f64b58SGeorgi Djakov #define RPM_SMD_BB_CLK2 12 5800f64b58SGeorgi Djakov #define RPM_SMD_BB_CLK2_A 13 5900f64b58SGeorgi Djakov #define RPM_SMD_RF_CLK1 14 6000f64b58SGeorgi Djakov #define RPM_SMD_RF_CLK1_A 15 6100f64b58SGeorgi Djakov #define RPM_SMD_RF_CLK2 16 6200f64b58SGeorgi Djakov #define RPM_SMD_RF_CLK2_A 17 6300f64b58SGeorgi Djakov #define RPM_SMD_BB_CLK1_PIN 18 6400f64b58SGeorgi Djakov #define RPM_SMD_BB_CLK1_A_PIN 19 6500f64b58SGeorgi Djakov #define RPM_SMD_BB_CLK2_PIN 20 6600f64b58SGeorgi Djakov #define RPM_SMD_BB_CLK2_A_PIN 21 6700f64b58SGeorgi Djakov #define RPM_SMD_RF_CLK1_PIN 22 6800f64b58SGeorgi Djakov #define RPM_SMD_RF_CLK1_A_PIN 23 6900f64b58SGeorgi Djakov #define RPM_SMD_RF_CLK2_PIN 24 7000f64b58SGeorgi Djakov #define RPM_SMD_RF_CLK2_A_PIN 25 71685dc94bSBjorn Andersson #define RPM_SMD_PNOC_CLK 26 72685dc94bSBjorn Andersson #define RPM_SMD_PNOC_A_CLK 27 73685dc94bSBjorn Andersson #define RPM_SMD_CNOC_CLK 28 74685dc94bSBjorn Andersson #define RPM_SMD_CNOC_A_CLK 29 75685dc94bSBjorn Andersson #define RPM_SMD_MMSSNOC_AHB_CLK 30 76685dc94bSBjorn Andersson #define RPM_SMD_MMSSNOC_AHB_A_CLK 31 77685dc94bSBjorn Andersson #define RPM_SMD_GFX3D_CLK_SRC 32 78685dc94bSBjorn Andersson #define RPM_SMD_GFX3D_A_CLK_SRC 33 79685dc94bSBjorn Andersson #define RPM_SMD_OCMEMGX_CLK 34 80685dc94bSBjorn Andersson #define RPM_SMD_OCMEMGX_A_CLK 35 81685dc94bSBjorn Andersson #define RPM_SMD_CXO_D0 36 82685dc94bSBjorn Andersson #define RPM_SMD_CXO_D0_A 37 83685dc94bSBjorn Andersson #define RPM_SMD_CXO_D1 38 84685dc94bSBjorn Andersson #define RPM_SMD_CXO_D1_A 39 85685dc94bSBjorn Andersson #define RPM_SMD_CXO_A0 40 86685dc94bSBjorn Andersson #define RPM_SMD_CXO_A0_A 41 87685dc94bSBjorn Andersson #define RPM_SMD_CXO_A1 42 88685dc94bSBjorn Andersson #define RPM_SMD_CXO_A1_A 43 89685dc94bSBjorn Andersson #define RPM_SMD_CXO_A2 44 90685dc94bSBjorn Andersson #define RPM_SMD_CXO_A2_A 45 91685dc94bSBjorn Andersson #define RPM_SMD_DIV_CLK1 46 92685dc94bSBjorn Andersson #define RPM_SMD_DIV_A_CLK1 47 93685dc94bSBjorn Andersson #define RPM_SMD_DIV_CLK2 48 94685dc94bSBjorn Andersson #define RPM_SMD_DIV_A_CLK2 49 95685dc94bSBjorn Andersson #define RPM_SMD_DIFF_CLK 50 96685dc94bSBjorn Andersson #define RPM_SMD_DIFF_A_CLK 51 97685dc94bSBjorn Andersson #define RPM_SMD_CXO_D0_PIN 52 98685dc94bSBjorn Andersson #define RPM_SMD_CXO_D0_A_PIN 53 99685dc94bSBjorn Andersson #define RPM_SMD_CXO_D1_PIN 54 100685dc94bSBjorn Andersson #define RPM_SMD_CXO_D1_A_PIN 55 101685dc94bSBjorn Andersson #define RPM_SMD_CXO_A0_PIN 56 102685dc94bSBjorn Andersson #define RPM_SMD_CXO_A0_A_PIN 57 103685dc94bSBjorn Andersson #define RPM_SMD_CXO_A1_PIN 58 104685dc94bSBjorn Andersson #define RPM_SMD_CXO_A1_A_PIN 59 105685dc94bSBjorn Andersson #define RPM_SMD_CXO_A2_PIN 60 106685dc94bSBjorn Andersson #define RPM_SMD_CXO_A2_A_PIN 61 1077066fdd0SRajendra Nayak #define RPM_SMD_AGGR1_NOC_CLK 62 1087066fdd0SRajendra Nayak #define RPM_SMD_AGGR1_NOC_A_CLK 63 1097066fdd0SRajendra Nayak #define RPM_SMD_AGGR2_NOC_CLK 64 1107066fdd0SRajendra Nayak #define RPM_SMD_AGGR2_NOC_A_CLK 65 1117066fdd0SRajendra Nayak #define RPM_SMD_MMAXI_CLK 66 1127066fdd0SRajendra Nayak #define RPM_SMD_MMAXI_A_CLK 67 1137066fdd0SRajendra Nayak #define RPM_SMD_IPA_CLK 68 1147066fdd0SRajendra Nayak #define RPM_SMD_IPA_A_CLK 69 1157066fdd0SRajendra Nayak #define RPM_SMD_CE1_CLK 70 1167066fdd0SRajendra Nayak #define RPM_SMD_CE1_A_CLK 71 1177066fdd0SRajendra Nayak #define RPM_SMD_DIV_CLK3 72 1187066fdd0SRajendra Nayak #define RPM_SMD_DIV_A_CLK3 73 1197066fdd0SRajendra Nayak #define RPM_SMD_LN_BB_CLK 74 1207066fdd0SRajendra Nayak #define RPM_SMD_LN_BB_A_CLK 75 12100f64b58SGeorgi Djakov 12200f64b58SGeorgi Djakov #endif 123