19c92ab61SThomas Gleixner /* SPDX-License-Identifier: GPL-2.0-only */
200f64b58SGeorgi Djakov /*
300f64b58SGeorgi Djakov  * Copyright 2015 Linaro Limited
400f64b58SGeorgi Djakov  */
500f64b58SGeorgi Djakov 
600f64b58SGeorgi Djakov #ifndef _DT_BINDINGS_CLK_MSM_RPMCC_H
700f64b58SGeorgi Djakov #define _DT_BINDINGS_CLK_MSM_RPMCC_H
800f64b58SGeorgi Djakov 
9685dc94bSBjorn Andersson /* RPM clocks */
10872f91b5SGeorgi Djakov #define RPM_PXO_CLK				0
11872f91b5SGeorgi Djakov #define RPM_PXO_A_CLK				1
12872f91b5SGeorgi Djakov #define RPM_CXO_CLK				2
13872f91b5SGeorgi Djakov #define RPM_CXO_A_CLK				3
14872f91b5SGeorgi Djakov #define RPM_APPS_FABRIC_CLK			4
15872f91b5SGeorgi Djakov #define RPM_APPS_FABRIC_A_CLK			5
16872f91b5SGeorgi Djakov #define RPM_CFPB_CLK				6
17872f91b5SGeorgi Djakov #define RPM_CFPB_A_CLK				7
18872f91b5SGeorgi Djakov #define RPM_QDSS_CLK				8
19872f91b5SGeorgi Djakov #define RPM_QDSS_A_CLK				9
20872f91b5SGeorgi Djakov #define RPM_DAYTONA_FABRIC_CLK			10
21872f91b5SGeorgi Djakov #define RPM_DAYTONA_FABRIC_A_CLK		11
22872f91b5SGeorgi Djakov #define RPM_EBI1_CLK				12
23872f91b5SGeorgi Djakov #define RPM_EBI1_A_CLK				13
24872f91b5SGeorgi Djakov #define RPM_MM_FABRIC_CLK			14
25872f91b5SGeorgi Djakov #define RPM_MM_FABRIC_A_CLK			15
26872f91b5SGeorgi Djakov #define RPM_MMFPB_CLK				16
27872f91b5SGeorgi Djakov #define RPM_MMFPB_A_CLK				17
28872f91b5SGeorgi Djakov #define RPM_SYS_FABRIC_CLK			18
29872f91b5SGeorgi Djakov #define RPM_SYS_FABRIC_A_CLK			19
30872f91b5SGeorgi Djakov #define RPM_SFPB_CLK				20
31872f91b5SGeorgi Djakov #define RPM_SFPB_A_CLK				21
32856e6bb9SLinus Walleij #define RPM_SMI_CLK				22
33856e6bb9SLinus Walleij #define RPM_SMI_A_CLK				23
34856e6bb9SLinus Walleij #define RPM_PLL4_CLK				24
358bcde658SSrinivas Kandagatla #define RPM_XO_D0				25
368bcde658SSrinivas Kandagatla #define RPM_XO_D1				26
378bcde658SSrinivas Kandagatla #define RPM_XO_A0				27
388bcde658SSrinivas Kandagatla #define RPM_XO_A1				28
398bcde658SSrinivas Kandagatla #define RPM_XO_A2				29
40eec15273SAnsuel Smith #define RPM_NSS_FABRIC_0_CLK			30
41eec15273SAnsuel Smith #define RPM_NSS_FABRIC_0_A_CLK			31
42eec15273SAnsuel Smith #define RPM_NSS_FABRIC_1_CLK			32
43eec15273SAnsuel Smith #define RPM_NSS_FABRIC_1_A_CLK			33
44872f91b5SGeorgi Djakov 
45685dc94bSBjorn Andersson /* SMD RPM clocks */
4600f64b58SGeorgi Djakov #define RPM_SMD_XO_CLK_SRC				0
4700f64b58SGeorgi Djakov #define RPM_SMD_XO_A_CLK_SRC			1
4800f64b58SGeorgi Djakov #define RPM_SMD_PCNOC_CLK				2
4900f64b58SGeorgi Djakov #define RPM_SMD_PCNOC_A_CLK				3
5000f64b58SGeorgi Djakov #define RPM_SMD_SNOC_CLK				4
5100f64b58SGeorgi Djakov #define RPM_SMD_SNOC_A_CLK				5
5200f64b58SGeorgi Djakov #define RPM_SMD_BIMC_CLK				6
5300f64b58SGeorgi Djakov #define RPM_SMD_BIMC_A_CLK				7
5400f64b58SGeorgi Djakov #define RPM_SMD_QDSS_CLK				8
5500f64b58SGeorgi Djakov #define RPM_SMD_QDSS_A_CLK				9
5600f64b58SGeorgi Djakov #define RPM_SMD_BB_CLK1				10
5700f64b58SGeorgi Djakov #define RPM_SMD_BB_CLK1_A				11
5800f64b58SGeorgi Djakov #define RPM_SMD_BB_CLK2				12
5900f64b58SGeorgi Djakov #define RPM_SMD_BB_CLK2_A				13
6000f64b58SGeorgi Djakov #define RPM_SMD_RF_CLK1				14
6100f64b58SGeorgi Djakov #define RPM_SMD_RF_CLK1_A				15
6200f64b58SGeorgi Djakov #define RPM_SMD_RF_CLK2				16
6300f64b58SGeorgi Djakov #define RPM_SMD_RF_CLK2_A				17
6400f64b58SGeorgi Djakov #define RPM_SMD_BB_CLK1_PIN				18
6500f64b58SGeorgi Djakov #define RPM_SMD_BB_CLK1_A_PIN			19
6600f64b58SGeorgi Djakov #define RPM_SMD_BB_CLK2_PIN				20
6700f64b58SGeorgi Djakov #define RPM_SMD_BB_CLK2_A_PIN			21
6800f64b58SGeorgi Djakov #define RPM_SMD_RF_CLK1_PIN				22
6900f64b58SGeorgi Djakov #define RPM_SMD_RF_CLK1_A_PIN			23
7000f64b58SGeorgi Djakov #define RPM_SMD_RF_CLK2_PIN				24
7100f64b58SGeorgi Djakov #define RPM_SMD_RF_CLK2_A_PIN			25
72685dc94bSBjorn Andersson #define RPM_SMD_PNOC_CLK			26
73685dc94bSBjorn Andersson #define RPM_SMD_PNOC_A_CLK			27
74685dc94bSBjorn Andersson #define RPM_SMD_CNOC_CLK			28
75685dc94bSBjorn Andersson #define RPM_SMD_CNOC_A_CLK			29
76685dc94bSBjorn Andersson #define RPM_SMD_MMSSNOC_AHB_CLK			30
77685dc94bSBjorn Andersson #define RPM_SMD_MMSSNOC_AHB_A_CLK		31
78685dc94bSBjorn Andersson #define RPM_SMD_GFX3D_CLK_SRC			32
79685dc94bSBjorn Andersson #define RPM_SMD_GFX3D_A_CLK_SRC			33
80685dc94bSBjorn Andersson #define RPM_SMD_OCMEMGX_CLK			34
81685dc94bSBjorn Andersson #define RPM_SMD_OCMEMGX_A_CLK			35
82685dc94bSBjorn Andersson #define RPM_SMD_CXO_D0				36
83685dc94bSBjorn Andersson #define RPM_SMD_CXO_D0_A			37
84685dc94bSBjorn Andersson #define RPM_SMD_CXO_D1				38
85685dc94bSBjorn Andersson #define RPM_SMD_CXO_D1_A			39
86685dc94bSBjorn Andersson #define RPM_SMD_CXO_A0				40
87685dc94bSBjorn Andersson #define RPM_SMD_CXO_A0_A			41
88685dc94bSBjorn Andersson #define RPM_SMD_CXO_A1				42
89685dc94bSBjorn Andersson #define RPM_SMD_CXO_A1_A			43
90685dc94bSBjorn Andersson #define RPM_SMD_CXO_A2				44
91685dc94bSBjorn Andersson #define RPM_SMD_CXO_A2_A			45
92685dc94bSBjorn Andersson #define RPM_SMD_DIV_CLK1			46
93685dc94bSBjorn Andersson #define RPM_SMD_DIV_A_CLK1			47
94685dc94bSBjorn Andersson #define RPM_SMD_DIV_CLK2			48
95685dc94bSBjorn Andersson #define RPM_SMD_DIV_A_CLK2			49
96685dc94bSBjorn Andersson #define RPM_SMD_DIFF_CLK			50
97685dc94bSBjorn Andersson #define RPM_SMD_DIFF_A_CLK			51
98685dc94bSBjorn Andersson #define RPM_SMD_CXO_D0_PIN			52
99685dc94bSBjorn Andersson #define RPM_SMD_CXO_D0_A_PIN			53
100685dc94bSBjorn Andersson #define RPM_SMD_CXO_D1_PIN			54
101685dc94bSBjorn Andersson #define RPM_SMD_CXO_D1_A_PIN			55
102685dc94bSBjorn Andersson #define RPM_SMD_CXO_A0_PIN			56
103685dc94bSBjorn Andersson #define RPM_SMD_CXO_A0_A_PIN			57
104685dc94bSBjorn Andersson #define RPM_SMD_CXO_A1_PIN			58
105685dc94bSBjorn Andersson #define RPM_SMD_CXO_A1_A_PIN			59
106685dc94bSBjorn Andersson #define RPM_SMD_CXO_A2_PIN			60
107685dc94bSBjorn Andersson #define RPM_SMD_CXO_A2_A_PIN			61
1087066fdd0SRajendra Nayak #define RPM_SMD_AGGR1_NOC_CLK			62
1097066fdd0SRajendra Nayak #define RPM_SMD_AGGR1_NOC_A_CLK			63
1107066fdd0SRajendra Nayak #define RPM_SMD_AGGR2_NOC_CLK			64
1117066fdd0SRajendra Nayak #define RPM_SMD_AGGR2_NOC_A_CLK			65
1127066fdd0SRajendra Nayak #define RPM_SMD_MMAXI_CLK			66
1137066fdd0SRajendra Nayak #define RPM_SMD_MMAXI_A_CLK			67
1147066fdd0SRajendra Nayak #define RPM_SMD_IPA_CLK				68
1157066fdd0SRajendra Nayak #define RPM_SMD_IPA_A_CLK			69
1167066fdd0SRajendra Nayak #define RPM_SMD_CE1_CLK				70
1177066fdd0SRajendra Nayak #define RPM_SMD_CE1_A_CLK			71
1187066fdd0SRajendra Nayak #define RPM_SMD_DIV_CLK3			72
1197066fdd0SRajendra Nayak #define RPM_SMD_DIV_A_CLK3			73
1207066fdd0SRajendra Nayak #define RPM_SMD_LN_BB_CLK			74
1217066fdd0SRajendra Nayak #define RPM_SMD_LN_BB_A_CLK			75
122eaeee28dSTaniya Das #define RPM_SMD_BIMC_GPU_CLK			76
123eaeee28dSTaniya Das #define RPM_SMD_BIMC_GPU_A_CLK			77
124eaeee28dSTaniya Das #define RPM_SMD_QPIC_CLK			78
125eaeee28dSTaniya Das #define RPM_SMD_QPIC_CLK_A			79
1266131dc81SJeffrey Hugo #define RPM_SMD_LN_BB_CLK1			80
1276131dc81SJeffrey Hugo #define RPM_SMD_LN_BB_CLK1_A			81
1286131dc81SJeffrey Hugo #define RPM_SMD_LN_BB_CLK2			82
1296131dc81SJeffrey Hugo #define RPM_SMD_LN_BB_CLK2_A			83
1306131dc81SJeffrey Hugo #define RPM_SMD_LN_BB_CLK3_PIN			84
1316131dc81SJeffrey Hugo #define RPM_SMD_LN_BB_CLK3_A_PIN		85
1326131dc81SJeffrey Hugo #define RPM_SMD_RF_CLK3				86
1336131dc81SJeffrey Hugo #define RPM_SMD_RF_CLK3_A			87
1346131dc81SJeffrey Hugo #define RPM_SMD_RF_CLK3_PIN			88
1356131dc81SJeffrey Hugo #define RPM_SMD_RF_CLK3_A_PIN			89
136b608013aSKonrad Dybcio #define RPM_SMD_MMSSNOC_AXI_CLK			90
137b608013aSKonrad Dybcio #define RPM_SMD_MMSSNOC_AXI_CLK_A		91
138b608013aSKonrad Dybcio #define RPM_SMD_CNOC_PERIPH_CLK			92
139b608013aSKonrad Dybcio #define RPM_SMD_CNOC_PERIPH_A_CLK		93
140b608013aSKonrad Dybcio #define RPM_SMD_LN_BB_CLK3			94
141b608013aSKonrad Dybcio #define RPM_SMD_LN_BB_CLK3_A			95
142b608013aSKonrad Dybcio #define RPM_SMD_LN_BB_CLK1_PIN			96
143b608013aSKonrad Dybcio #define RPM_SMD_LN_BB_CLK1_A_PIN		97
144b608013aSKonrad Dybcio #define RPM_SMD_LN_BB_CLK2_PIN			98
145b608013aSKonrad Dybcio #define RPM_SMD_LN_BB_CLK2_A_PIN		99
14659390282SVincent Knecht #define RPM_SMD_SYSMMNOC_CLK			100
14759390282SVincent Knecht #define RPM_SMD_SYSMMNOC_A_CLK			101
148b4297844SKonrad Dybcio #define RPM_SMD_CE2_CLK				102
149b4297844SKonrad Dybcio #define RPM_SMD_CE2_A_CLK			103
150b4297844SKonrad Dybcio #define RPM_SMD_CE3_CLK				104
151b4297844SKonrad Dybcio #define RPM_SMD_CE3_A_CLK			105
15204a572c5SIskren Chernev #define RPM_SMD_QUP_CLK				106
15304a572c5SIskren Chernev #define RPM_SMD_QUP_A_CLK			107
15404a572c5SIskren Chernev #define RPM_SMD_MMRT_CLK			108
15504a572c5SIskren Chernev #define RPM_SMD_MMRT_A_CLK			109
15604a572c5SIskren Chernev #define RPM_SMD_MMNRT_CLK			110
15704a572c5SIskren Chernev #define RPM_SMD_MMNRT_A_CLK			111
15804a572c5SIskren Chernev #define RPM_SMD_SNOC_PERIPH_CLK			112
15904a572c5SIskren Chernev #define RPM_SMD_SNOC_PERIPH_A_CLK		113
16004a572c5SIskren Chernev #define RPM_SMD_SNOC_LPASS_CLK			114
16104a572c5SIskren Chernev #define RPM_SMD_SNOC_LPASS_A_CLK		115
16278b727d0SShawn Guo #define RPM_SMD_HWKM_CLK			116
16378b727d0SShawn Guo #define RPM_SMD_HWKM_A_CLK			117
16478b727d0SShawn Guo #define RPM_SMD_PKA_CLK				118
16578b727d0SShawn Guo #define RPM_SMD_PKA_A_CLK			119
16678b727d0SShawn Guo #define RPM_SMD_CPUSS_GNOC_CLK			120
16778b727d0SShawn Guo #define RPM_SMD_CPUSS_GNOC_A_CLK		121
1685b2fa289SKonrad Dybcio #define RPM_SMD_MSS_CFG_AHB_CLK		122
1695b2fa289SKonrad Dybcio #define RPM_SMD_MSS_CFG_AHB_A_CLK		123
17065cfaf4eSKonrad Dybcio #define RPM_SMD_BIMC_FREQ_LOG			124
171*ba796801SDmitry Baryshkov #define RPM_SMD_LN_BB_CLK_PIN			125
172*ba796801SDmitry Baryshkov #define RPM_SMD_LN_BB_A_CLK_PIN			126
17300f64b58SGeorgi Djakov 
17400f64b58SGeorgi Djakov #endif
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