16d00b56fSStephen Boyd /*
26d00b56fSStephen Boyd  * Copyright (c) 2013, The Linux Foundation. All rights reserved.
36d00b56fSStephen Boyd  *
46d00b56fSStephen Boyd  * This software is licensed under the terms of the GNU General Public
56d00b56fSStephen Boyd  * License version 2, as published by the Free Software Foundation, and
66d00b56fSStephen Boyd  * may be copied, distributed, and modified under those terms.
76d00b56fSStephen Boyd  *
86d00b56fSStephen Boyd  * This program is distributed in the hope that it will be useful,
96d00b56fSStephen Boyd  * but WITHOUT ANY WARRANTY; without even the implied warranty of
106d00b56fSStephen Boyd  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
116d00b56fSStephen Boyd  * GNU General Public License for more details.
126d00b56fSStephen Boyd  */
136d00b56fSStephen Boyd 
146d00b56fSStephen Boyd #ifndef _DT_BINDINGS_CLK_MSM_MMCC_8960_H
156d00b56fSStephen Boyd #define _DT_BINDINGS_CLK_MSM_MMCC_8960_H
166d00b56fSStephen Boyd 
176d00b56fSStephen Boyd #define MMSS_AHB_SRC					0
186d00b56fSStephen Boyd #define FAB_AHB_CLK					1
196d00b56fSStephen Boyd #define APU_AHB_CLK					2
206d00b56fSStephen Boyd #define TV_ENC_AHB_CLK					3
216d00b56fSStephen Boyd #define AMP_AHB_CLK					4
226d00b56fSStephen Boyd #define DSI2_S_AHB_CLK					5
236d00b56fSStephen Boyd #define JPEGD_AHB_CLK					6
246d00b56fSStephen Boyd #define GFX2D0_AHB_CLK					7
256d00b56fSStephen Boyd #define DSI_S_AHB_CLK					8
266d00b56fSStephen Boyd #define DSI2_M_AHB_CLK					9
276d00b56fSStephen Boyd #define VPE_AHB_CLK					10
286d00b56fSStephen Boyd #define SMMU_AHB_CLK					11
296d00b56fSStephen Boyd #define HDMI_M_AHB_CLK					12
306d00b56fSStephen Boyd #define VFE_AHB_CLK					13
316d00b56fSStephen Boyd #define ROT_AHB_CLK					14
326d00b56fSStephen Boyd #define VCODEC_AHB_CLK					15
336d00b56fSStephen Boyd #define MDP_AHB_CLK					16
346d00b56fSStephen Boyd #define DSI_M_AHB_CLK					17
356d00b56fSStephen Boyd #define CSI_AHB_CLK					18
366d00b56fSStephen Boyd #define MMSS_IMEM_AHB_CLK				19
376d00b56fSStephen Boyd #define IJPEG_AHB_CLK					20
386d00b56fSStephen Boyd #define HDMI_S_AHB_CLK					21
396d00b56fSStephen Boyd #define GFX3D_AHB_CLK					22
406d00b56fSStephen Boyd #define GFX2D1_AHB_CLK					23
416d00b56fSStephen Boyd #define MMSS_FPB_CLK					24
426d00b56fSStephen Boyd #define MMSS_AXI_SRC					25
436d00b56fSStephen Boyd #define MMSS_FAB_CORE					26
446d00b56fSStephen Boyd #define FAB_MSP_AXI_CLK					27
456d00b56fSStephen Boyd #define JPEGD_AXI_CLK					28
466d00b56fSStephen Boyd #define GMEM_AXI_CLK					29
476d00b56fSStephen Boyd #define MDP_AXI_CLK					30
486d00b56fSStephen Boyd #define MMSS_IMEM_AXI_CLK				31
496d00b56fSStephen Boyd #define IJPEG_AXI_CLK					32
506d00b56fSStephen Boyd #define GFX3D_AXI_CLK					33
516d00b56fSStephen Boyd #define VCODEC_AXI_CLK					34
526d00b56fSStephen Boyd #define VFE_AXI_CLK					35
536d00b56fSStephen Boyd #define VPE_AXI_CLK					36
546d00b56fSStephen Boyd #define ROT_AXI_CLK					37
556d00b56fSStephen Boyd #define VCODEC_AXI_A_CLK				38
566d00b56fSStephen Boyd #define VCODEC_AXI_B_CLK				39
576d00b56fSStephen Boyd #define MM_AXI_S3_FCLK					40
586d00b56fSStephen Boyd #define MM_AXI_S2_FCLK					41
596d00b56fSStephen Boyd #define MM_AXI_S1_FCLK					42
606d00b56fSStephen Boyd #define MM_AXI_S0_FCLK					43
616d00b56fSStephen Boyd #define MM_AXI_S2_CLK					44
626d00b56fSStephen Boyd #define MM_AXI_S1_CLK					45
636d00b56fSStephen Boyd #define MM_AXI_S0_CLK					46
646d00b56fSStephen Boyd #define CSI0_SRC					47
656d00b56fSStephen Boyd #define CSI0_CLK					48
666d00b56fSStephen Boyd #define CSI0_PHY_CLK					49
676d00b56fSStephen Boyd #define CSI1_SRC					50
686d00b56fSStephen Boyd #define CSI1_CLK					51
696d00b56fSStephen Boyd #define CSI1_PHY_CLK					52
706d00b56fSStephen Boyd #define CSI2_SRC					53
716d00b56fSStephen Boyd #define CSI2_CLK					54
726d00b56fSStephen Boyd #define CSI2_PHY_CLK					55
736d00b56fSStephen Boyd #define DSI_SRC						56
746d00b56fSStephen Boyd #define DSI_CLK						57
756d00b56fSStephen Boyd #define CSI_PIX_CLK					58
766d00b56fSStephen Boyd #define CSI_RDI_CLK					59
776d00b56fSStephen Boyd #define MDP_VSYNC_CLK					60
786d00b56fSStephen Boyd #define HDMI_DIV_CLK					61
796d00b56fSStephen Boyd #define HDMI_APP_CLK					62
806d00b56fSStephen Boyd #define CSI_PIX1_CLK					63
816d00b56fSStephen Boyd #define CSI_RDI2_CLK					64
826d00b56fSStephen Boyd #define CSI_RDI1_CLK					65
836d00b56fSStephen Boyd #define GFX2D0_SRC					66
846d00b56fSStephen Boyd #define GFX2D0_CLK					67
856d00b56fSStephen Boyd #define GFX2D1_SRC					68
866d00b56fSStephen Boyd #define GFX2D1_CLK					69
876d00b56fSStephen Boyd #define GFX3D_SRC					70
886d00b56fSStephen Boyd #define GFX3D_CLK					71
896d00b56fSStephen Boyd #define IJPEG_SRC					72
906d00b56fSStephen Boyd #define IJPEG_CLK					73
916d00b56fSStephen Boyd #define JPEGD_SRC					74
926d00b56fSStephen Boyd #define JPEGD_CLK					75
936d00b56fSStephen Boyd #define MDP_SRC						76
946d00b56fSStephen Boyd #define MDP_CLK						77
956d00b56fSStephen Boyd #define MDP_LUT_CLK					78
966d00b56fSStephen Boyd #define DSI2_PIXEL_SRC					79
976d00b56fSStephen Boyd #define DSI2_PIXEL_CLK					80
986d00b56fSStephen Boyd #define DSI2_SRC					81
996d00b56fSStephen Boyd #define DSI2_CLK					82
1006d00b56fSStephen Boyd #define DSI1_BYTE_SRC					83
1016d00b56fSStephen Boyd #define DSI1_BYTE_CLK					84
1026d00b56fSStephen Boyd #define DSI2_BYTE_SRC					85
1036d00b56fSStephen Boyd #define DSI2_BYTE_CLK					86
1046d00b56fSStephen Boyd #define DSI1_ESC_SRC					87
1056d00b56fSStephen Boyd #define DSI1_ESC_CLK					88
1066d00b56fSStephen Boyd #define DSI2_ESC_SRC					89
1076d00b56fSStephen Boyd #define DSI2_ESC_CLK					90
1086d00b56fSStephen Boyd #define ROT_SRC						91
1096d00b56fSStephen Boyd #define ROT_CLK						92
1106d00b56fSStephen Boyd #define TV_ENC_CLK					93
1116d00b56fSStephen Boyd #define TV_DAC_CLK					94
1126d00b56fSStephen Boyd #define HDMI_TV_CLK					95
1136d00b56fSStephen Boyd #define MDP_TV_CLK					96
1146d00b56fSStephen Boyd #define TV_SRC						97
1156d00b56fSStephen Boyd #define VCODEC_SRC					98
1166d00b56fSStephen Boyd #define VCODEC_CLK					99
1176d00b56fSStephen Boyd #define VFE_SRC						100
1186d00b56fSStephen Boyd #define VFE_CLK						101
1196d00b56fSStephen Boyd #define VFE_CSI_CLK					102
1206d00b56fSStephen Boyd #define VPE_SRC						103
1216d00b56fSStephen Boyd #define VPE_CLK						104
1226d00b56fSStephen Boyd #define DSI_PIXEL_SRC					105
1236d00b56fSStephen Boyd #define DSI_PIXEL_CLK					106
1246d00b56fSStephen Boyd #define CAMCLK0_SRC					107
1256d00b56fSStephen Boyd #define CAMCLK0_CLK					108
1266d00b56fSStephen Boyd #define CAMCLK1_SRC					109
1276d00b56fSStephen Boyd #define CAMCLK1_CLK					110
1286d00b56fSStephen Boyd #define CAMCLK2_SRC					111
1296d00b56fSStephen Boyd #define CAMCLK2_CLK					112
1306d00b56fSStephen Boyd #define CSIPHYTIMER_SRC					113
1316d00b56fSStephen Boyd #define CSIPHY2_TIMER_CLK				114
1326d00b56fSStephen Boyd #define CSIPHY1_TIMER_CLK				115
1336d00b56fSStephen Boyd #define CSIPHY0_TIMER_CLK				116
1346d00b56fSStephen Boyd #define PLL1						117
1356d00b56fSStephen Boyd #define PLL2						118
136e216ce60SStephen Boyd #define RGB_TV_CLK					119
137e216ce60SStephen Boyd #define NPL_TV_CLK					120
138e216ce60SStephen Boyd #define VCAP_AHB_CLK					121
139e216ce60SStephen Boyd #define VCAP_AXI_CLK					122
140e216ce60SStephen Boyd #define VCAP_SRC					123
141e216ce60SStephen Boyd #define VCAP_CLK					124
142e216ce60SStephen Boyd #define VCAP_NPL_CLK					125
143e216ce60SStephen Boyd #define PLL15						126
1446d00b56fSStephen Boyd 
1456d00b56fSStephen Boyd #endif
146