1c1e81a3bSJames Liao /* 2c1e81a3bSJames Liao * Copyright (c) 2014 MediaTek Inc. 3c1e81a3bSJames Liao * Author: James Liao <jamesjj.liao@mediatek.com> 4c1e81a3bSJames Liao * 5c1e81a3bSJames Liao * This program is free software; you can redistribute it and/or modify 6c1e81a3bSJames Liao * it under the terms of the GNU General Public License version 2 as 7c1e81a3bSJames Liao * published by the Free Software Foundation. 8c1e81a3bSJames Liao * 9c1e81a3bSJames Liao * This program is distributed in the hope that it will be useful, 10c1e81a3bSJames Liao * but WITHOUT ANY WARRANTY; without even the implied warranty of 11c1e81a3bSJames Liao * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 12c1e81a3bSJames Liao * GNU General Public License for more details. 13c1e81a3bSJames Liao */ 14c1e81a3bSJames Liao 15c1e81a3bSJames Liao #ifndef _DT_BINDINGS_CLK_MT8173_H 16c1e81a3bSJames Liao #define _DT_BINDINGS_CLK_MT8173_H 17c1e81a3bSJames Liao 18c1e81a3bSJames Liao /* TOPCKGEN */ 19c1e81a3bSJames Liao 20c1e81a3bSJames Liao #define CLK_TOP_CLKPH_MCK_O 1 21c1e81a3bSJames Liao #define CLK_TOP_DPI 2 22c1e81a3bSJames Liao #define CLK_TOP_USB_SYSPLL_125M 3 23c1e81a3bSJames Liao #define CLK_TOP_HDMITX_DIG_CTS 4 24c1e81a3bSJames Liao #define CLK_TOP_ARMCA7PLL_754M 5 25c1e81a3bSJames Liao #define CLK_TOP_ARMCA7PLL_502M 6 26c1e81a3bSJames Liao #define CLK_TOP_MAIN_H546M 7 27c1e81a3bSJames Liao #define CLK_TOP_MAIN_H364M 8 28c1e81a3bSJames Liao #define CLK_TOP_MAIN_H218P4M 9 29c1e81a3bSJames Liao #define CLK_TOP_MAIN_H156M 10 30c1e81a3bSJames Liao #define CLK_TOP_TVDPLL_445P5M 11 31c1e81a3bSJames Liao #define CLK_TOP_TVDPLL_594M 12 32c1e81a3bSJames Liao #define CLK_TOP_UNIV_624M 13 33c1e81a3bSJames Liao #define CLK_TOP_UNIV_416M 14 34c1e81a3bSJames Liao #define CLK_TOP_UNIV_249P6M 15 35c1e81a3bSJames Liao #define CLK_TOP_UNIV_178P3M 16 36c1e81a3bSJames Liao #define CLK_TOP_UNIV_48M 17 37c1e81a3bSJames Liao #define CLK_TOP_CLKRTC_EXT 18 38c1e81a3bSJames Liao #define CLK_TOP_CLKRTC_INT 19 39c1e81a3bSJames Liao #define CLK_TOP_FPC 20 40c1e81a3bSJames Liao #define CLK_TOP_HDMITXPLL_D2 21 41c1e81a3bSJames Liao #define CLK_TOP_HDMITXPLL_D3 22 42c1e81a3bSJames Liao #define CLK_TOP_ARMCA7PLL_D2 23 43c1e81a3bSJames Liao #define CLK_TOP_ARMCA7PLL_D3 24 44c1e81a3bSJames Liao #define CLK_TOP_APLL1 25 45c1e81a3bSJames Liao #define CLK_TOP_APLL2 26 46c1e81a3bSJames Liao #define CLK_TOP_DMPLL 27 47c1e81a3bSJames Liao #define CLK_TOP_DMPLL_D2 28 48c1e81a3bSJames Liao #define CLK_TOP_DMPLL_D4 29 49c1e81a3bSJames Liao #define CLK_TOP_DMPLL_D8 30 50c1e81a3bSJames Liao #define CLK_TOP_DMPLL_D16 31 51c1e81a3bSJames Liao #define CLK_TOP_LVDSPLL_D2 32 52c1e81a3bSJames Liao #define CLK_TOP_LVDSPLL_D4 33 53c1e81a3bSJames Liao #define CLK_TOP_LVDSPLL_D8 34 54c1e81a3bSJames Liao #define CLK_TOP_MMPLL 35 55c1e81a3bSJames Liao #define CLK_TOP_MMPLL_D2 36 56c1e81a3bSJames Liao #define CLK_TOP_MSDCPLL 37 57c1e81a3bSJames Liao #define CLK_TOP_MSDCPLL_D2 38 58c1e81a3bSJames Liao #define CLK_TOP_MSDCPLL_D4 39 59c1e81a3bSJames Liao #define CLK_TOP_MSDCPLL2 40 60c1e81a3bSJames Liao #define CLK_TOP_MSDCPLL2_D2 41 61c1e81a3bSJames Liao #define CLK_TOP_MSDCPLL2_D4 42 62c1e81a3bSJames Liao #define CLK_TOP_SYSPLL_D2 43 63c1e81a3bSJames Liao #define CLK_TOP_SYSPLL1_D2 44 64c1e81a3bSJames Liao #define CLK_TOP_SYSPLL1_D4 45 65c1e81a3bSJames Liao #define CLK_TOP_SYSPLL1_D8 46 66c1e81a3bSJames Liao #define CLK_TOP_SYSPLL1_D16 47 67c1e81a3bSJames Liao #define CLK_TOP_SYSPLL_D3 48 68c1e81a3bSJames Liao #define CLK_TOP_SYSPLL2_D2 49 69c1e81a3bSJames Liao #define CLK_TOP_SYSPLL2_D4 50 70c1e81a3bSJames Liao #define CLK_TOP_SYSPLL_D5 51 71c1e81a3bSJames Liao #define CLK_TOP_SYSPLL3_D2 52 72c1e81a3bSJames Liao #define CLK_TOP_SYSPLL3_D4 53 73c1e81a3bSJames Liao #define CLK_TOP_SYSPLL_D7 54 74c1e81a3bSJames Liao #define CLK_TOP_SYSPLL4_D2 55 75c1e81a3bSJames Liao #define CLK_TOP_SYSPLL4_D4 56 76c1e81a3bSJames Liao #define CLK_TOP_TVDPLL 57 77c1e81a3bSJames Liao #define CLK_TOP_TVDPLL_D2 58 78c1e81a3bSJames Liao #define CLK_TOP_TVDPLL_D4 59 79c1e81a3bSJames Liao #define CLK_TOP_TVDPLL_D8 60 80c1e81a3bSJames Liao #define CLK_TOP_TVDPLL_D16 61 81c1e81a3bSJames Liao #define CLK_TOP_UNIVPLL_D2 62 82c1e81a3bSJames Liao #define CLK_TOP_UNIVPLL1_D2 63 83c1e81a3bSJames Liao #define CLK_TOP_UNIVPLL1_D4 64 84c1e81a3bSJames Liao #define CLK_TOP_UNIVPLL1_D8 65 85c1e81a3bSJames Liao #define CLK_TOP_UNIVPLL_D3 66 86c1e81a3bSJames Liao #define CLK_TOP_UNIVPLL2_D2 67 87c1e81a3bSJames Liao #define CLK_TOP_UNIVPLL2_D4 68 88c1e81a3bSJames Liao #define CLK_TOP_UNIVPLL2_D8 69 89c1e81a3bSJames Liao #define CLK_TOP_UNIVPLL_D5 70 90c1e81a3bSJames Liao #define CLK_TOP_UNIVPLL3_D2 71 91c1e81a3bSJames Liao #define CLK_TOP_UNIVPLL3_D4 72 92c1e81a3bSJames Liao #define CLK_TOP_UNIVPLL3_D8 73 93c1e81a3bSJames Liao #define CLK_TOP_UNIVPLL_D7 74 94c1e81a3bSJames Liao #define CLK_TOP_UNIVPLL_D26 75 95c1e81a3bSJames Liao #define CLK_TOP_UNIVPLL_D52 76 96c1e81a3bSJames Liao #define CLK_TOP_VCODECPLL 77 97c1e81a3bSJames Liao #define CLK_TOP_VCODECPLL_370P5 78 98c1e81a3bSJames Liao #define CLK_TOP_VENCPLL 79 99c1e81a3bSJames Liao #define CLK_TOP_VENCPLL_D2 80 100c1e81a3bSJames Liao #define CLK_TOP_VENCPLL_D4 81 101c1e81a3bSJames Liao #define CLK_TOP_AXI_SEL 82 102c1e81a3bSJames Liao #define CLK_TOP_MEM_SEL 83 103c1e81a3bSJames Liao #define CLK_TOP_DDRPHYCFG_SEL 84 104c1e81a3bSJames Liao #define CLK_TOP_MM_SEL 85 105c1e81a3bSJames Liao #define CLK_TOP_PWM_SEL 86 106c1e81a3bSJames Liao #define CLK_TOP_VDEC_SEL 87 107c1e81a3bSJames Liao #define CLK_TOP_VENC_SEL 88 108c1e81a3bSJames Liao #define CLK_TOP_MFG_SEL 89 109c1e81a3bSJames Liao #define CLK_TOP_CAMTG_SEL 90 110c1e81a3bSJames Liao #define CLK_TOP_UART_SEL 91 111c1e81a3bSJames Liao #define CLK_TOP_SPI_SEL 92 112c1e81a3bSJames Liao #define CLK_TOP_USB20_SEL 93 113c1e81a3bSJames Liao #define CLK_TOP_USB30_SEL 94 114c1e81a3bSJames Liao #define CLK_TOP_MSDC50_0_H_SEL 95 115c1e81a3bSJames Liao #define CLK_TOP_MSDC50_0_SEL 96 116c1e81a3bSJames Liao #define CLK_TOP_MSDC30_1_SEL 97 117c1e81a3bSJames Liao #define CLK_TOP_MSDC30_2_SEL 98 118c1e81a3bSJames Liao #define CLK_TOP_MSDC30_3_SEL 99 119c1e81a3bSJames Liao #define CLK_TOP_AUDIO_SEL 100 120c1e81a3bSJames Liao #define CLK_TOP_AUD_INTBUS_SEL 101 121c1e81a3bSJames Liao #define CLK_TOP_PMICSPI_SEL 102 122c1e81a3bSJames Liao #define CLK_TOP_SCP_SEL 103 123c1e81a3bSJames Liao #define CLK_TOP_ATB_SEL 104 124c1e81a3bSJames Liao #define CLK_TOP_VENC_LT_SEL 105 125c1e81a3bSJames Liao #define CLK_TOP_DPI0_SEL 106 126c1e81a3bSJames Liao #define CLK_TOP_IRDA_SEL 107 127c1e81a3bSJames Liao #define CLK_TOP_CCI400_SEL 108 128c1e81a3bSJames Liao #define CLK_TOP_AUD_1_SEL 109 129c1e81a3bSJames Liao #define CLK_TOP_AUD_2_SEL 110 130c1e81a3bSJames Liao #define CLK_TOP_MEM_MFG_IN_SEL 111 131c1e81a3bSJames Liao #define CLK_TOP_AXI_MFG_IN_SEL 112 132c1e81a3bSJames Liao #define CLK_TOP_SCAM_SEL 113 133c1e81a3bSJames Liao #define CLK_TOP_SPINFI_IFR_SEL 114 134c1e81a3bSJames Liao #define CLK_TOP_HDMI_SEL 115 135c1e81a3bSJames Liao #define CLK_TOP_DPILVDS_SEL 116 136c1e81a3bSJames Liao #define CLK_TOP_MSDC50_2_H_SEL 117 137c1e81a3bSJames Liao #define CLK_TOP_HDCP_SEL 118 138c1e81a3bSJames Liao #define CLK_TOP_HDCP_24M_SEL 119 139c1e81a3bSJames Liao #define CLK_TOP_RTC_SEL 120 140c1e81a3bSJames Liao #define CLK_TOP_APLL1_DIV0 121 141c1e81a3bSJames Liao #define CLK_TOP_APLL1_DIV1 122 142c1e81a3bSJames Liao #define CLK_TOP_APLL1_DIV2 123 143c1e81a3bSJames Liao #define CLK_TOP_APLL1_DIV3 124 144c1e81a3bSJames Liao #define CLK_TOP_APLL1_DIV4 125 145c1e81a3bSJames Liao #define CLK_TOP_APLL1_DIV5 126 146c1e81a3bSJames Liao #define CLK_TOP_APLL2_DIV0 127 147c1e81a3bSJames Liao #define CLK_TOP_APLL2_DIV1 128 148c1e81a3bSJames Liao #define CLK_TOP_APLL2_DIV2 129 149c1e81a3bSJames Liao #define CLK_TOP_APLL2_DIV3 130 150c1e81a3bSJames Liao #define CLK_TOP_APLL2_DIV4 131 151c1e81a3bSJames Liao #define CLK_TOP_APLL2_DIV5 132 152c1e81a3bSJames Liao #define CLK_TOP_I2S0_M_SEL 133 153c1e81a3bSJames Liao #define CLK_TOP_I2S1_M_SEL 134 154c1e81a3bSJames Liao #define CLK_TOP_I2S2_M_SEL 135 155c1e81a3bSJames Liao #define CLK_TOP_I2S3_M_SEL 136 156c1e81a3bSJames Liao #define CLK_TOP_I2S3_B_SEL 137 157c1e81a3bSJames Liao #define CLK_TOP_NR_CLK 138 158c1e81a3bSJames Liao 159c1e81a3bSJames Liao /* APMIXED_SYS */ 160c1e81a3bSJames Liao 161c1e81a3bSJames Liao #define CLK_APMIXED_ARMCA15PLL 1 162c1e81a3bSJames Liao #define CLK_APMIXED_ARMCA7PLL 2 163c1e81a3bSJames Liao #define CLK_APMIXED_MAINPLL 3 164c1e81a3bSJames Liao #define CLK_APMIXED_UNIVPLL 4 165c1e81a3bSJames Liao #define CLK_APMIXED_MMPLL 5 166c1e81a3bSJames Liao #define CLK_APMIXED_MSDCPLL 6 167c1e81a3bSJames Liao #define CLK_APMIXED_VENCPLL 7 168c1e81a3bSJames Liao #define CLK_APMIXED_TVDPLL 8 169c1e81a3bSJames Liao #define CLK_APMIXED_MPLL 9 170c1e81a3bSJames Liao #define CLK_APMIXED_VCODECPLL 10 171c1e81a3bSJames Liao #define CLK_APMIXED_APLL1 11 172c1e81a3bSJames Liao #define CLK_APMIXED_APLL2 12 173c1e81a3bSJames Liao #define CLK_APMIXED_LVDSPLL 13 174c1e81a3bSJames Liao #define CLK_APMIXED_MSDCPLL2 14 175c1e81a3bSJames Liao #define CLK_APMIXED_NR_CLK 15 176c1e81a3bSJames Liao 177c1e81a3bSJames Liao /* INFRA_SYS */ 178c1e81a3bSJames Liao 179c1e81a3bSJames Liao #define CLK_INFRA_DBGCLK 1 180c1e81a3bSJames Liao #define CLK_INFRA_SMI 2 181c1e81a3bSJames Liao #define CLK_INFRA_AUDIO 3 182c1e81a3bSJames Liao #define CLK_INFRA_GCE 4 183c1e81a3bSJames Liao #define CLK_INFRA_L2C_SRAM 5 184c1e81a3bSJames Liao #define CLK_INFRA_M4U 6 185c1e81a3bSJames Liao #define CLK_INFRA_CPUM 7 186c1e81a3bSJames Liao #define CLK_INFRA_KP 8 187c1e81a3bSJames Liao #define CLK_INFRA_CEC 9 188c1e81a3bSJames Liao #define CLK_INFRA_PMICSPI 10 189c1e81a3bSJames Liao #define CLK_INFRA_PMICWRAP 11 1902d61fe0fSJoe.C #define CLK_INFRA_CLK_13M 12 1912d61fe0fSJoe.C #define CLK_INFRA_NR_CLK 13 192c1e81a3bSJames Liao 193c1e81a3bSJames Liao /* PERI_SYS */ 194c1e81a3bSJames Liao 195c1e81a3bSJames Liao #define CLK_PERI_NFI 1 196c1e81a3bSJames Liao #define CLK_PERI_THERM 2 197c1e81a3bSJames Liao #define CLK_PERI_PWM1 3 198c1e81a3bSJames Liao #define CLK_PERI_PWM2 4 199c1e81a3bSJames Liao #define CLK_PERI_PWM3 5 200c1e81a3bSJames Liao #define CLK_PERI_PWM4 6 201c1e81a3bSJames Liao #define CLK_PERI_PWM5 7 202c1e81a3bSJames Liao #define CLK_PERI_PWM6 8 203c1e81a3bSJames Liao #define CLK_PERI_PWM7 9 204c1e81a3bSJames Liao #define CLK_PERI_PWM 10 205c1e81a3bSJames Liao #define CLK_PERI_USB0 11 206c1e81a3bSJames Liao #define CLK_PERI_USB1 12 207c1e81a3bSJames Liao #define CLK_PERI_AP_DMA 13 208c1e81a3bSJames Liao #define CLK_PERI_MSDC30_0 14 209c1e81a3bSJames Liao #define CLK_PERI_MSDC30_1 15 210c1e81a3bSJames Liao #define CLK_PERI_MSDC30_2 16 211c1e81a3bSJames Liao #define CLK_PERI_MSDC30_3 17 212c1e81a3bSJames Liao #define CLK_PERI_NLI_ARB 18 213c1e81a3bSJames Liao #define CLK_PERI_IRDA 19 214c1e81a3bSJames Liao #define CLK_PERI_UART0 20 215c1e81a3bSJames Liao #define CLK_PERI_UART1 21 216c1e81a3bSJames Liao #define CLK_PERI_UART2 22 217c1e81a3bSJames Liao #define CLK_PERI_UART3 23 218c1e81a3bSJames Liao #define CLK_PERI_I2C0 24 219c1e81a3bSJames Liao #define CLK_PERI_I2C1 25 220c1e81a3bSJames Liao #define CLK_PERI_I2C2 26 221c1e81a3bSJames Liao #define CLK_PERI_I2C3 27 222c1e81a3bSJames Liao #define CLK_PERI_I2C4 28 223c1e81a3bSJames Liao #define CLK_PERI_AUXADC 29 224c1e81a3bSJames Liao #define CLK_PERI_SPI0 30 225c1e81a3bSJames Liao #define CLK_PERI_I2C5 31 226c1e81a3bSJames Liao #define CLK_PERI_NFIECC 32 227c1e81a3bSJames Liao #define CLK_PERI_SPI 33 228c1e81a3bSJames Liao #define CLK_PERI_IRRX 34 229c1e81a3bSJames Liao #define CLK_PERI_I2C6 35 230c1e81a3bSJames Liao #define CLK_PERI_UART0_SEL 36 231c1e81a3bSJames Liao #define CLK_PERI_UART1_SEL 37 232c1e81a3bSJames Liao #define CLK_PERI_UART2_SEL 38 233c1e81a3bSJames Liao #define CLK_PERI_UART3_SEL 39 234c1e81a3bSJames Liao #define CLK_PERI_NR_CLK 40 235c1e81a3bSJames Liao 236c1e81a3bSJames Liao #endif /* _DT_BINDINGS_CLK_MT8173_H */ 237