1 /*
2  * Meson8b clock tree IDs
3  */
4 
5 #ifndef __MESON8B_CLKC_H
6 #define __MESON8B_CLKC_H
7 
8 #define CLKID_UNUSED		0
9 #define CLKID_XTAL		1
10 #define CLKID_PLL_FIXED		2
11 #define CLKID_PLL_VID		3
12 #define CLKID_PLL_SYS		4
13 #define CLKID_FCLK_DIV2		5
14 #define CLKID_FCLK_DIV3		6
15 #define CLKID_FCLK_DIV4		7
16 #define CLKID_FCLK_DIV5		8
17 #define CLKID_FCLK_DIV7		9
18 #define CLKID_CLK81		10
19 #define CLKID_MALI		11
20 #define CLKID_CPUCLK		12
21 #define CLKID_ZERO		13
22 #define CLKID_MPEG_SEL		14
23 #define CLKID_MPEG_DIV		15
24 #define CLKID_SAR_ADC		23
25 #define CLKID_SDIO		30
26 #define CLKID_SANA		69
27 
28 #endif /* __MESON8B_CLKC_H */
29